JPH0433156B2 - - Google Patents

Info

Publication number
JPH0433156B2
JPH0433156B2 JP59030525A JP3052584A JPH0433156B2 JP H0433156 B2 JPH0433156 B2 JP H0433156B2 JP 59030525 A JP59030525 A JP 59030525A JP 3052584 A JP3052584 A JP 3052584A JP H0433156 B2 JPH0433156 B2 JP H0433156B2
Authority
JP
Japan
Prior art keywords
layer
solder
wiring conductor
forming
solder layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59030525A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60175485A (ja
Inventor
Eiichi Tsunashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3052584A priority Critical patent/JPS60175485A/ja
Publication of JPS60175485A publication Critical patent/JPS60175485A/ja
Publication of JPH0433156B2 publication Critical patent/JPH0433156B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP3052584A 1984-02-20 1984-02-20 はんだ層形成方法 Granted JPS60175485A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3052584A JPS60175485A (ja) 1984-02-20 1984-02-20 はんだ層形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3052584A JPS60175485A (ja) 1984-02-20 1984-02-20 はんだ層形成方法

Publications (2)

Publication Number Publication Date
JPS60175485A JPS60175485A (ja) 1985-09-09
JPH0433156B2 true JPH0433156B2 (en:Method) 1992-06-02

Family

ID=12306221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3052584A Granted JPS60175485A (ja) 1984-02-20 1984-02-20 はんだ層形成方法

Country Status (1)

Country Link
JP (1) JPS60175485A (en:Method)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0682707B2 (ja) * 1988-10-21 1994-10-19 日本電気株式会社 半導体装置
JP4748889B2 (ja) * 2000-12-26 2011-08-17 イビデン株式会社 多層プリント配線板の製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5787195A (en) * 1980-11-20 1982-05-31 Kenwood Corp Printed circuit

Also Published As

Publication number Publication date
JPS60175485A (ja) 1985-09-09

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