JPH0411884B2 - - Google Patents

Info

Publication number
JPH0411884B2
JPH0411884B2 JP56179692A JP17969281A JPH0411884B2 JP H0411884 B2 JPH0411884 B2 JP H0411884B2 JP 56179692 A JP56179692 A JP 56179692A JP 17969281 A JP17969281 A JP 17969281A JP H0411884 B2 JPH0411884 B2 JP H0411884B2
Authority
JP
Japan
Prior art keywords
field effect
type field
clock
signal
clock signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56179692A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5881334A (ja
Inventor
Masaru Shibukawa
Hideo Nakamura
Kyoshi Matsubara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56179692A priority Critical patent/JPS5881334A/ja
Priority to US06/437,674 priority patent/US4570219A/en
Priority to KR8205080A priority patent/KR880000337B1/ko
Priority to GB08232104A priority patent/GB2109188B/en
Priority to DE19823241786 priority patent/DE3241786A1/de
Publication of JPS5881334A publication Critical patent/JPS5881334A/ja
Publication of JPH0411884B2 publication Critical patent/JPH0411884B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30083—Power or thermal control instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/226—Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Microcomputers (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Power Sources (AREA)
  • Executing Machine-Instructions (AREA)
JP56179692A 1981-11-11 1981-11-11 情報処理装置 Granted JPS5881334A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP56179692A JPS5881334A (ja) 1981-11-11 1981-11-11 情報処理装置
US06/437,674 US4570219A (en) 1981-11-11 1982-10-29 CMOS Circuit with reduced power dissipation and a digital data processor using the same
KR8205080A KR880000337B1 (ko) 1981-11-11 1982-11-10 상보형 트랜지스터 회로 및 그를 사용한 정보처리 장치
GB08232104A GB2109188B (en) 1981-11-11 1982-11-10 An improved cmos circuit and an information processor utilizing the cmos circuit
DE19823241786 DE3241786A1 (de) 1981-11-11 1982-11-11 Cmos-kreis mit einem verminderten leistungsverlust und diesen kreis verwendender digitaler datenprozessor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56179692A JPS5881334A (ja) 1981-11-11 1981-11-11 情報処理装置

Publications (2)

Publication Number Publication Date
JPS5881334A JPS5881334A (ja) 1983-05-16
JPH0411884B2 true JPH0411884B2 (en, 2012) 1992-03-02

Family

ID=16070200

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56179692A Granted JPS5881334A (ja) 1981-11-11 1981-11-11 情報処理装置

Country Status (5)

Country Link
US (1) US4570219A (en, 2012)
JP (1) JPS5881334A (en, 2012)
KR (1) KR880000337B1 (en, 2012)
DE (1) DE3241786A1 (en, 2012)
GB (1) GB2109188B (en, 2012)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024790A (ja) * 1983-07-20 1985-02-07 Hitachi Ltd 同期クロツク発生回路
US4780843A (en) * 1983-11-07 1988-10-25 Motorola, Inc. Wait mode power reduction system and method for data processor
AU578569B2 (en) * 1984-05-31 1988-10-27 Nec Corporation Hot standby communications system
JPS60254928A (ja) * 1984-05-31 1985-12-16 Nec Corp セツト・スタンバイ通信方式
US4825407A (en) * 1984-07-26 1989-04-25 Miles Inc. Method and circuit for controlling single chip microcomputer
JPS6145354A (ja) * 1984-08-10 1986-03-05 Nec Corp マイクロプロセツサ
JPH0720062B2 (ja) * 1985-06-18 1995-03-06 松下電器産業株式会社 ダイナミツク論理回路の誤動作防止回路
JPS63163912A (ja) * 1986-12-26 1988-07-07 Toshiba Corp マイクロコンピユ−タシステム
US4736119A (en) * 1987-02-04 1988-04-05 American Telephone And Telegraph Company, At&T Bell Laboratories Dynamic CMOS current surge control
JPH07104800B2 (ja) * 1987-05-25 1995-11-13 日本電気株式会社 プログラム評価装置
JPH02201516A (ja) * 1989-01-31 1990-08-09 Toshiba Corp パワーセーブ方式
CA2282912C (en) * 1989-06-30 2000-09-12 John P. Fairbanks Computer power management system
US5355503A (en) * 1990-05-31 1994-10-11 National Semiconductor Corporation Event driven scanning of data input equipment using multi-input wake-up techniques
US5396635A (en) * 1990-06-01 1995-03-07 Vadem Corporation Power conservation apparatus having multiple power reduction levels dependent upon the activity of the computer system
WO1992007317A1 (en) * 1990-10-12 1992-04-30 Intel Corporation Slow memory refresh in a computer with a limited supply of power
US5287298A (en) * 1990-10-23 1994-02-15 Matsushita Electric Industrial Co., Ltd. Oscillation control apparatus for a portable battery-driven terminal
JPH0511876A (ja) * 1990-12-25 1993-01-22 Mitsubishi Electric Corp デイジタル回路装置
FI88657C (fi) * 1991-02-12 1993-06-10 Nokia Mobile Phones Ltd Foerfarande foer att minska stroemfoerbrukningen i en mobiltelefon
US5254888A (en) * 1992-03-27 1993-10-19 Picopower Technology Inc. Switchable clock circuit for microprocessors to thereby save power
US6343363B1 (en) * 1994-09-22 2002-01-29 National Semiconductor Corporation Method of invoking a low power mode in a computer system using a halt instruction
US5420808A (en) * 1993-05-13 1995-05-30 International Business Machines Corporation Circuitry and method for reducing power consumption within an electronic circuit
DE4321315C1 (de) * 1993-06-26 1995-01-05 Itt Ind Gmbh Deutsche Takterzeugungsschaltung für taktgesteuerte Logikschaltungen
US5467042A (en) * 1993-11-08 1995-11-14 Cirrus Logic, Inc. Low power clocking apparatus and method
US5677849A (en) * 1993-11-08 1997-10-14 Cirrus Logic, Inc. Selective low power clocking apparatus and method
JPH0934867A (ja) * 1995-07-24 1997-02-07 Mitsubishi Electric Corp マイクロコンピュータ
US5825648A (en) * 1996-03-26 1998-10-20 Casio Phonemate, Inc. Backup system for a time of day clock in an electronic device
JPH10326129A (ja) * 1997-05-23 1998-12-08 Mitsubishi Electric Corp 半導体装置
US7552350B2 (en) 2000-09-27 2009-06-23 Huron Ip Llc System and method for activity or event base dynamic energy conserving server reconfiguration
USRE40866E1 (en) 2000-09-27 2009-08-04 Huron Ip Llc System, method, and architecture for dynamic server power management and dynamic workload management for multiserver environment
US7228441B2 (en) 2000-09-27 2007-06-05 Huron Ip Llc Multi-server and multi-CPU power management system and method
US7032119B2 (en) * 2000-09-27 2006-04-18 Amphus, Inc. Dynamic power and workload management for multi-server system
US7822967B2 (en) * 2000-09-27 2010-10-26 Huron Ip Llc Apparatus, architecture, and method for integrated modular server system providing dynamically power-managed and work-load managed network devices
US20030196126A1 (en) * 2002-04-11 2003-10-16 Fung Henry T. System, method, and architecture for dynamic server power management and dynamic workload management for multi-server environment
US20060248360A1 (en) * 2001-05-18 2006-11-02 Fung Henry T Multi-server and multi-CPU power management system and method
US7388248B2 (en) * 2004-09-01 2008-06-17 Micron Technology, Inc. Dielectric relaxation memory
US7893721B2 (en) * 2007-02-26 2011-02-22 Nec Corporation Dual rail domino circuit and logic circuit
CN115033519B (zh) * 2022-06-30 2023-07-25 中国科学院长春光学精密机械与物理研究所 长时间工作的探测器spi寄存器的预防打翻方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50103965A (en, 2012) * 1974-01-14 1975-08-16
JPS5818648B2 (ja) * 1975-03-28 1983-04-14 株式会社東芝 キ−読込み装置
US4164666A (en) * 1976-06-08 1979-08-14 Toyko Shibaura Electric Co., Ltd. Electronic apparatus using complementary MOS transistor dynamic clocked logic circuits
JPS533120A (en) * 1976-06-30 1978-01-12 Canon Inc Control circuit
US4134073A (en) * 1976-07-12 1979-01-09 Honeywell Information Systems Inc. Clock system having adaptive synchronization feature
JPS5368051A (en) * 1976-11-29 1978-06-17 Sharp Corp Integrated circuit device
JPS53116750A (en) * 1977-03-23 1978-10-12 Citizen Watch Co Ltd Portable electronic unit
JPS53149450A (en) * 1977-06-01 1978-12-26 Hitachi Maxell Ltd Inner cutting blade unit of reciprocating electric razor
US4241418A (en) * 1977-11-23 1980-12-23 Honeywell Information Systems Inc. Clock system having a dynamically selectable clock period
US4171539A (en) * 1977-12-19 1979-10-16 The Bendix Corporation Power strobed digital computer system
JPS54144152A (en) * 1978-04-28 1979-11-10 Sharp Corp Integrated circuit device
US4316247A (en) * 1979-10-30 1982-02-16 Texas Instruments, Inc. Low power consumption data processing system
DE2951162A1 (de) * 1979-12-19 1981-07-02 Casio Computer Co., Ltd., Tokyo Vorrichtung zum steuern des energieverbrauchs fuer eine elektronische digitale datenverarbeitungsvorrichtung
US4434465A (en) * 1981-04-13 1984-02-28 Texas Instruments Incorporated Shared microinstruction states in control ROM addressing for a microcoded single chip microcomputer

Also Published As

Publication number Publication date
KR840002601A (ko) 1984-07-02
US4570219A (en) 1986-02-11
GB2109188B (en) 1986-01-02
JPS5881334A (ja) 1983-05-16
GB2109188A (en) 1983-05-25
DE3241786A1 (de) 1983-05-26
KR880000337B1 (ko) 1988-03-20
DE3241786C2 (en, 2012) 1991-01-17

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