JPH0255331U - - Google Patents

Info

Publication number
JPH0255331U
JPH0255331U JP1988133189U JP13318988U JPH0255331U JP H0255331 U JPH0255331 U JP H0255331U JP 1988133189 U JP1988133189 U JP 1988133189U JP 13318988 U JP13318988 U JP 13318988U JP H0255331 U JPH0255331 U JP H0255331U
Authority
JP
Japan
Prior art keywords
memory
data
address
address pointer
accesses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988133189U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988133189U priority Critical patent/JPH0255331U/ja
Priority to US07/476,485 priority patent/US5127010A/en
Priority to EP19890911094 priority patent/EP0393205A4/en
Priority to PCT/JP1989/001037 priority patent/WO1990004228A1/ja
Publication of JPH0255331U publication Critical patent/JPH0255331U/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31919Storing and outputting test patterns
    • G01R31/31921Storing and outputting test patterns using compression techniques, e.g. patterns sequencer

Description

【図面の簡単な説明】
第1図はこの考案によるパターン発生器の一例
を示すブロツク図、第2図は従来のパターン発生
器を示すブロツク図である。

Claims (1)

  1. 【実用新案登録請求の範囲】 プログラムカウンタによりインストラクシヨン
    メモリをアクセスし、そのインストラクシヨンメ
    モリの出力から試験パターンを得るパターン発生
    器において、 ランダムロジツクを試験するパターンを格納し
    たデータバツフアメモリと、 そのデータバツフアメモリをアクセスするアド
    レスポインタと、 そのアドレスポインタに任意のアドレスデータ
    を設定するそのアドレスデータを保持するロード
    データメモリと、 上記アドレスポインタに対するロード/インク
    リメントを制御するその制御データを保持する制
    御命令メモリとを備え、 上記ロードデータメモリ及び制御命令メモリは
    上記プログラムカウンタによつて同時にアクセス
    されてなるパターン発生器。
JP1988133189U 1988-10-11 1988-10-11 Pending JPH0255331U (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP1988133189U JPH0255331U (ja) 1988-10-11 1988-10-11
US07/476,485 US5127010A (en) 1988-10-11 1989-10-09 Pattern generator
EP19890911094 EP0393205A4 (en) 1988-10-11 1989-10-09 Pattern generator
PCT/JP1989/001037 WO1990004228A1 (en) 1988-10-11 1989-10-09 Pattern generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988133189U JPH0255331U (ja) 1988-10-11 1988-10-11

Publications (1)

Publication Number Publication Date
JPH0255331U true JPH0255331U (ja) 1990-04-20

Family

ID=15098781

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988133189U Pending JPH0255331U (ja) 1988-10-11 1988-10-11

Country Status (4)

Country Link
US (1) US5127010A (ja)
EP (1) EP0393205A4 (ja)
JP (1) JPH0255331U (ja)
WO (1) WO1990004228A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05233473A (ja) * 1991-12-18 1993-09-10 Internatl Business Mach Corp <Ibm> 半導体メモリテストシステム

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5265102A (en) * 1989-06-16 1993-11-23 Advantest Corporation Test pattern generator
JPH0758320B2 (ja) * 1990-06-18 1995-06-21 株式会社東芝 情報処理装置の自己診断回路および自己診断方法
JPH05119122A (ja) * 1991-10-25 1993-05-18 Fujitsu Ltd スキヤン回路のテストパターン生成方法
JP3150611B2 (ja) * 1996-03-29 2001-03-26 株式会社東芝 パターン発生装置
US6061815A (en) * 1996-12-09 2000-05-09 Schlumberger Technologies, Inc. Programming utility register to generate addresses in algorithmic pattern generator
US5883905A (en) * 1997-02-18 1999-03-16 Schlumberger Technologies, Inc. Pattern generator with extended register programming
US7839146B2 (en) * 2003-06-24 2010-11-23 Medtronic, Inc. Magnetic resonance imaging interference immune device
US7523367B2 (en) * 2005-06-30 2009-04-21 International Business Machines Corporation Method and apparatus to verify non-deterministic results in an efficient random manner
US8607111B2 (en) * 2006-08-30 2013-12-10 Micron Technology, Inc. Sub-instruction repeats for algorithmic pattern generators
US8135975B2 (en) * 2007-03-09 2012-03-13 Analog Devices, Inc. Software programmable timing architecture

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4293950A (en) * 1978-04-03 1981-10-06 Nippon Telegraph And Telephone Public Corporation Test pattern generating apparatus
US4313200A (en) * 1978-08-28 1982-01-26 Takeda Riken Kogyo Kabushikikaisha Logic test system permitting test pattern changes without dummy cycles
JPS58774A (ja) * 1981-06-25 1983-01-05 Toshiba Corp 高速パタ−ン発生器
JPS5854774A (ja) * 1981-09-28 1983-03-31 Ricoh Co Ltd フアクシミリ−ocrシステムにおける受信認知方法
JPS5994086A (ja) * 1982-11-19 1984-05-30 Advantest Corp 論理回路試験装置
JPS5997065A (ja) * 1982-11-25 1984-06-04 Advantest Corp 論理回路試験装置の試験パタ−ン発生装置
US4635096A (en) * 1983-04-08 1987-01-06 Sony Corporation Test signal generator
JPH0641966B2 (ja) * 1984-02-15 1994-06-01 株式会社アドバンテスト パタ−ン発生装置
JPS60247942A (ja) * 1984-05-23 1985-12-07 Advantest Corp 半導体メモリ試験装置
JPS61201343A (ja) * 1985-03-05 1986-09-06 Hitachi Ltd テストパタ−ン発生制御方法及びその装置
DE3515802A1 (de) * 1985-05-02 1986-11-06 Siemens AG, 1000 Berlin und 8000 München Anordnung zur schnellen erzeugung von grossen pruefdatenwortmengen in einer pruefeinrichtung
US4696005A (en) * 1985-06-03 1987-09-22 International Business Machines Corporation Apparatus for reducing test data storage requirements for high speed VLSI circuit testing
JPS62118272A (ja) * 1985-11-19 1987-05-29 Ando Electric Co Ltd パタ−ン発生装置
JPS62140299A (ja) * 1985-12-13 1987-06-23 Advantest Corp パタ−ン発生装置
US4718065A (en) * 1986-03-31 1988-01-05 Tandem Computers Incorporated In-line scan control apparatus for data processor testing

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05233473A (ja) * 1991-12-18 1993-09-10 Internatl Business Mach Corp <Ibm> 半導体メモリテストシステム

Also Published As

Publication number Publication date
EP0393205A1 (en) 1990-10-24
US5127010A (en) 1992-06-30
WO1990004228A1 (en) 1990-04-19
EP0393205A4 (en) 1992-07-01

Similar Documents

Publication Publication Date Title
JPH0255331U (ja)
JPH0542525Y2 (ja)
JP2694758B2 (ja) ビット・フィールド制御装置
JPH0187448U (ja)
JPS63132371U (ja)
JPH0311435B2 (ja)
JPH0420698U (ja)
JPH0360087U (ja)
JPS6019978U (ja) パツケ−ジ試験機用ピンアクセス回路
JPS63178349A (ja) マイクロプロセツサ
JPS6010349A (ja) スキヤン方式
JPS6019533B2 (ja) 制御装置
JPH02104450U (ja)
JPH0417532B2 (ja)
JPH0246245U (ja)
JPS63168545U (ja)
JPH0447753U (ja)
JPS6348251U (ja)
JPH0363246U (ja)
JPS5872797U (ja) メモリ制御装置
JPH0381575U (ja)
JPH0475976U (ja)
JPH0344672U (ja)
JPH0278088A (ja) メモリアクセス制御方式
JPH0371500U (ja)