JPH0216013B2 - - Google Patents
Info
- Publication number
- JPH0216013B2 JPH0216013B2 JP58206968A JP20696883A JPH0216013B2 JP H0216013 B2 JPH0216013 B2 JP H0216013B2 JP 58206968 A JP58206968 A JP 58206968A JP 20696883 A JP20696883 A JP 20696883A JP H0216013 B2 JPH0216013 B2 JP H0216013B2
- Authority
- JP
- Japan
- Prior art keywords
- package
- semiconductor chip
- bonding
- zil
- bonding pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20696883A JPS6098652A (ja) | 1983-11-02 | 1983-11-02 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20696883A JPS6098652A (ja) | 1983-11-02 | 1983-11-02 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6098652A JPS6098652A (ja) | 1985-06-01 |
JPH0216013B2 true JPH0216013B2 (enrdf_load_stackoverflow) | 1990-04-13 |
Family
ID=16531982
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20696883A Granted JPS6098652A (ja) | 1983-11-02 | 1983-11-02 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6098652A (enrdf_load_stackoverflow) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0635910U (ja) * | 1992-10-16 | 1994-05-13 | 株式会社ニコン | ビーム射出装置 |
JPH0657572U (ja) * | 1993-01-14 | 1994-08-09 | レーザーテクノ株式会社 | 墨出し用レーザー装置 |
WO2023100383A1 (ja) | 2021-11-30 | 2023-06-08 | 株式会社タムラ製作所 | はんだ合金、はんだ接合材、ソルダペースト及び半導体パッケージ |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62114256A (ja) * | 1985-11-13 | 1987-05-26 | Mitsubishi Electric Corp | 半導体装置 |
JPS63208235A (ja) * | 1987-02-24 | 1988-08-29 | Nec Corp | 半導体装置 |
JP2763004B2 (ja) * | 1987-10-20 | 1998-06-11 | 株式会社 日立製作所 | 半導体装置 |
US4990996A (en) * | 1987-12-18 | 1991-02-05 | Zilog, Inc. | Bonding pad scheme |
JP2560805B2 (ja) * | 1988-10-06 | 1996-12-04 | 三菱電機株式会社 | 半導体装置 |
JPH03238839A (ja) * | 1990-02-15 | 1991-10-24 | Nec Corp | 半導体集積回路装置 |
US5905300A (en) * | 1994-03-31 | 1999-05-18 | Vlsi Technology, Inc. | Reinforced leadframe to substrate attachment |
JP2679669B2 (ja) * | 1995-02-28 | 1997-11-19 | 日本電気株式会社 | 半導体装置 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5531822Y2 (enrdf_load_stackoverflow) * | 1974-12-05 | 1980-07-29 | ||
JPS5456360A (en) * | 1977-10-14 | 1979-05-07 | Hitachi Ltd | Production of semiconductor chips |
JPS5895044U (ja) * | 1981-12-18 | 1983-06-28 | セイコーインスツルメンツ株式会社 | Icチツプの端子構造 |
-
1983
- 1983-11-02 JP JP20696883A patent/JPS6098652A/ja active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0635910U (ja) * | 1992-10-16 | 1994-05-13 | 株式会社ニコン | ビーム射出装置 |
JPH0657572U (ja) * | 1993-01-14 | 1994-08-09 | レーザーテクノ株式会社 | 墨出し用レーザー装置 |
WO2023100383A1 (ja) | 2021-11-30 | 2023-06-08 | 株式会社タムラ製作所 | はんだ合金、はんだ接合材、ソルダペースト及び半導体パッケージ |
Also Published As
Publication number | Publication date |
---|---|
JPS6098652A (ja) | 1985-06-01 |
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