JPH0160959B2 - - Google Patents
Info
- Publication number
- JPH0160959B2 JPH0160959B2 JP58097989A JP9798983A JPH0160959B2 JP H0160959 B2 JPH0160959 B2 JP H0160959B2 JP 58097989 A JP58097989 A JP 58097989A JP 9798983 A JP9798983 A JP 9798983A JP H0160959 B2 JPH0160959 B2 JP H0160959B2
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- conductor layer
- multilayer ceramic
- wet multilayer
- printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 37
- 239000000758 substrate Substances 0.000 claims description 36
- 239000000919 ceramic Substances 0.000 claims description 27
- 239000003990 capacitor Substances 0.000 claims description 16
- 238000003780 insertion Methods 0.000 claims description 15
- 230000037431 insertion Effects 0.000 claims description 15
- 230000000149 penetrating effect Effects 0.000 claims 2
- 238000005476 soldering Methods 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 8
- 230000010354 integration Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Landscapes
- Laminated Bodies (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Circuits Of Receivers In General (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58097989A JPS59224197A (ja) | 1983-06-03 | 1983-06-03 | 湿式多層セラミツク基板 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58097989A JPS59224197A (ja) | 1983-06-03 | 1983-06-03 | 湿式多層セラミツク基板 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59224197A JPS59224197A (ja) | 1984-12-17 |
| JPH0160959B2 true JPH0160959B2 (US20090163788A1-20090625-C00002.png) | 1989-12-26 |
Family
ID=14207073
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58097989A Granted JPS59224197A (ja) | 1983-06-03 | 1983-06-03 | 湿式多層セラミツク基板 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59224197A (US20090163788A1-20090625-C00002.png) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6269589A (ja) * | 1985-09-22 | 1987-03-30 | 小田 和一 | 印刷形成多層プリント基板 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5439580A (en) * | 1977-09-02 | 1979-03-27 | Fujitsu Ltd | Semiconductor device |
| JPS557720A (en) * | 1978-06-30 | 1980-01-19 | Ricoh Co Ltd | Electrostatic latent image developing method |
| JPS55133597A (en) * | 1979-04-06 | 1980-10-17 | Hitachi Ltd | Multilayer circuit board |
-
1983
- 1983-06-03 JP JP58097989A patent/JPS59224197A/ja active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5439580A (en) * | 1977-09-02 | 1979-03-27 | Fujitsu Ltd | Semiconductor device |
| JPS557720A (en) * | 1978-06-30 | 1980-01-19 | Ricoh Co Ltd | Electrostatic latent image developing method |
| JPS55133597A (en) * | 1979-04-06 | 1980-10-17 | Hitachi Ltd | Multilayer circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59224197A (ja) | 1984-12-17 |
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