JPH0142013B2 - - Google Patents

Info

Publication number
JPH0142013B2
JPH0142013B2 JP59108475A JP10847584A JPH0142013B2 JP H0142013 B2 JPH0142013 B2 JP H0142013B2 JP 59108475 A JP59108475 A JP 59108475A JP 10847584 A JP10847584 A JP 10847584A JP H0142013 B2 JPH0142013 B2 JP H0142013B2
Authority
JP
Japan
Prior art keywords
input
circuit
output
cmos
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59108475A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60252979A (ja
Inventor
Hiroshi Yokochi
Kazuhiko Myazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=14485697&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH0142013(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP59108475A priority Critical patent/JPS60252979A/ja
Priority to KR1019850003675A priority patent/KR910001327B1/ko
Priority to US06/739,304 priority patent/US4680491A/en
Priority to EP85106665A priority patent/EP0163305B1/en
Priority to DE8585106665T priority patent/DE3583537D1/de
Publication of JPS60252979A publication Critical patent/JPS60252979A/ja
Publication of JPH0142013B2 publication Critical patent/JPH0142013B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4072Drivers or receivers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/02Shaping pulses by amplifying
    • H03K5/026Shaping pulses by amplifying with a bidirectional operation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Logic Circuits (AREA)
  • Microcomputers (AREA)
JP59108475A 1984-05-30 1984-05-30 Cmos入出力回路 Granted JPS60252979A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP59108475A JPS60252979A (ja) 1984-05-30 1984-05-30 Cmos入出力回路
KR1019850003675A KR910001327B1 (ko) 1984-05-30 1985-05-28 Cmos 입 출력회로
US06/739,304 US4680491A (en) 1984-05-30 1985-05-29 CMOS data input-output circuit
EP85106665A EP0163305B1 (en) 1984-05-30 1985-05-30 Cmos type input-output circuit
DE8585106665T DE3583537D1 (de) 1984-05-30 1985-05-30 Cmos-eingabe-/ausgabeschaltung.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59108475A JPS60252979A (ja) 1984-05-30 1984-05-30 Cmos入出力回路

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP3212315A Division JPH05233840A (ja) 1991-08-23 1991-08-23 半導体装置

Publications (2)

Publication Number Publication Date
JPS60252979A JPS60252979A (ja) 1985-12-13
JPH0142013B2 true JPH0142013B2 (en, 2012) 1989-09-08

Family

ID=14485697

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59108475A Granted JPS60252979A (ja) 1984-05-30 1984-05-30 Cmos入出力回路

Country Status (5)

Country Link
US (1) US4680491A (en, 2012)
EP (1) EP0163305B1 (en, 2012)
JP (1) JPS60252979A (en, 2012)
KR (1) KR910001327B1 (en, 2012)
DE (1) DE3583537D1 (en, 2012)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208251A (ja) * 1985-03-12 1986-09-16 Matsushita Electronics Corp 集積回路装置
JPS62197856A (ja) * 1986-02-25 1987-09-01 Matsushita Electric Ind Co Ltd マイクロコンピユ−タ
FR2609831B1 (fr) * 1987-01-16 1989-03-31 Thomson Semiconducteurs Circuit de lecture pour memoire
US4804864A (en) * 1987-03-09 1989-02-14 Rockwell International Corporation Multiphase CMOS toggle flip-flop
US4829515A (en) * 1987-05-01 1989-05-09 Digital Equipment Corporation High performance low pin count bus interface
US4774422A (en) * 1987-05-01 1988-09-27 Digital Equipment Corporation High speed low pin count bus interface
JPH01100656A (ja) * 1987-10-13 1989-04-18 Nec Corp マイクロコンピュータの出力回路
US4835418A (en) * 1987-11-17 1989-05-30 Xilinx, Inc. Three-state bidirectional buffer
US4908796A (en) * 1988-05-24 1990-03-13 Dallas Semiconductor Corporation Registered outputs for a memory device
US4987319A (en) * 1988-09-08 1991-01-22 Kawasaki Steel Corporation Programmable input/output circuit and programmable logic device
US4982115A (en) * 1989-02-02 1991-01-01 Rockwell International Corporation Digital signal direction detection circuit
JPH0821846B2 (ja) * 1989-02-03 1996-03-04 日本電気株式会社 ワイアード信号ドライブ回路
EP0420203A3 (en) * 1989-09-29 1991-06-19 Siemens Aktiengesellschaft Circuit for controlling a bidirectional bus drive
US5105105A (en) * 1990-03-21 1992-04-14 Thunderbird Technologies, Inc. High speed logic and memory family using ring segment buffer
US5030853A (en) * 1990-03-21 1991-07-09 Thunderbird Technologies, Inc. High speed logic and memory family using ring segment buffer
US5043606A (en) * 1990-03-30 1991-08-27 Seagate Technology, Inc. Apparatus and method for programmably controlling the polarity of an I/O signal of a magnetic disk drive
JP2604276B2 (ja) * 1990-11-20 1997-04-30 三菱電機株式会社 半導体記憶装置
JPH05233840A (ja) * 1991-08-23 1993-09-10 Oki Electric Ind Co Ltd 半導体装置
DE69320417T3 (de) * 1992-06-12 2004-05-19 Texas Instruments Inc., Dallas Verfahren und Gerät zur Änderung der Taktfrequenz eines Prozessors
US5602496A (en) * 1992-06-17 1997-02-11 Advanced Micro Devices, Inc. Input buffer circuit including an input level translator with sleep function
US5424589A (en) * 1993-02-12 1995-06-13 The Board Of Trustees Of The Leland Stanford Junior University Electrically programmable inter-chip interconnect architecture
US5324996A (en) * 1993-02-16 1994-06-28 Ast Research, Inc. Floating fault tolerant input buffer circuit
US5373470A (en) * 1993-03-26 1994-12-13 United Memories, Inc. Method and circuit for configuring I/O devices
JP3406444B2 (ja) * 1995-01-10 2003-05-12 富士通株式会社 データ転送システムのバス制御装置
US5517135A (en) * 1995-07-26 1996-05-14 Xilinx, Inc. Bidirectional tristate buffer with default input
CA2192426C (en) * 1996-01-03 2000-08-01 Richard Ng Bidirectional voltage translator
FR2753586B1 (fr) * 1996-09-18 1998-11-20 Sgs Thomson Microelectronics Circuit tampon de sortie de signaux logiques
US6023174A (en) * 1997-07-11 2000-02-08 Vanguard International Semiconductor Corporation Adjustable, full CMOS input buffer for TTL, CMOS, or low swing input protocols
JPH11175502A (ja) * 1997-12-08 1999-07-02 Mitsubishi Electric Corp 半導体装置
DE19855372A1 (de) * 1998-12-01 2000-06-08 Bosch Gmbh Robert Vorrichtung zur bidirektionalen Signalübertragung
JP2000183719A (ja) * 1998-12-11 2000-06-30 Nec Corp 入力回路、出力回路及び入出力回路、並びに該入出力回路を備えた信号伝送システム
KR100465599B1 (ko) 2001-12-07 2005-01-13 주식회사 하이닉스반도체 데이타 출력 버퍼
US7230450B2 (en) * 2004-05-18 2007-06-12 Intel Corporation Programming semiconductor dies for pin map compatibility
US7577029B2 (en) 2007-05-04 2009-08-18 Mosaid Technologies Incorporated Multi-level cell access buffer with dual function
US7795914B2 (en) * 2007-11-02 2010-09-14 International Business Machines Corporation Circuit design methodology to reduce leakage power
US10322309B2 (en) 2014-09-19 2019-06-18 Doree Feldman Weighted garment

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4063225A (en) * 1976-03-08 1977-12-13 Rca Corporation Memory cell and array
JPS6041364B2 (ja) * 1980-08-29 1985-09-17 富士通株式会社 出力バッファ回路
JPH11774A (ja) * 1997-06-10 1999-01-06 Ishikawajima Harima Heavy Ind Co Ltd レーザ・ウォータジェット複合切断方法及び装置

Also Published As

Publication number Publication date
DE3583537D1 (de) 1991-08-29
EP0163305A3 (en) 1988-05-18
JPS60252979A (ja) 1985-12-13
EP0163305A2 (en) 1985-12-04
EP0163305B1 (en) 1991-07-24
KR910001327B1 (ko) 1991-03-04
KR850008017A (ko) 1985-12-11
US4680491A (en) 1987-07-14

Similar Documents

Publication Publication Date Title
JPH0142013B2 (en, 2012)
US6690191B2 (en) Bi-directional output buffer
EP0072686B1 (en) A buffer circuit including inverter circuitry
US4697107A (en) Four-state I/O control circuit
JPH084221B2 (ja) データ処理システムのバス補助回路
US5285409A (en) Serial input/output memory with a high speed test device
US5025414A (en) Serial bus interface capable of transferring data in different formats
KR100439089B1 (ko) 데이터처리시스템,외부장치액세스방법,및데이터처리기
US5752077A (en) Data processing system having a multi-function input/output port with individual pull-up and pull-down control
US5440248A (en) Power-saver differential input buffer
US5684411A (en) Self-configuring bus
US6211702B1 (en) Input circuit
US4918329A (en) Data transmission system
US4567575A (en) Voltage level compensating interface circuit for inter-logic circuit data transmission system
US6704826B1 (en) Digital signal isolation
US6150844A (en) High voltage tolerance output stage
JPH05233840A (ja) 半導体装置
US4447813A (en) Programmable bus for the control of electronic apparatus
JPS62297916A (ja) デ−タ入力回路
JP2500100Y2 (ja) 出力デ―タ制御回路
JPH0454510Y2 (en, 2012)
JPS62125712A (ja) 入出力回路
JP3255662B2 (ja) 出力回路及びデータ転送装置
JP3015460B2 (ja) 半導体集積回路
JPH0467665B2 (en, 2012)

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term