JP7489181B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP7489181B2 JP7489181B2 JP2019203742A JP2019203742A JP7489181B2 JP 7489181 B2 JP7489181 B2 JP 7489181B2 JP 2019203742 A JP2019203742 A JP 2019203742A JP 2019203742 A JP2019203742 A JP 2019203742A JP 7489181 B2 JP7489181 B2 JP 7489181B2
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- semiconductor element
- electrode
- bonding material
- conductive bonding
- lower electrode
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Description
先ず、図1を用いて、本実施例に係る半導体装置の構造と機能について説明する。図1は、本実施例の車載用交流発電機(オルタネータ)用半導体装置(整流素子)200の縦構造の断面を模式的に示す図である。
次に、半導体装置200に備えられた電子回路体100の詳細な構成を説明する。なお、図1において、電子回路体100を破線で示しているのは、電子回路体100が占める領域を表記するためである。
以上のように、電子回路体100は、第1の樹脂1hで封止されて、一体的に構成されており、下部電極1gおよび上部電極1dの各一面は、それぞれ電子回路体100の表面に露出する構造となる。この露出した下部電極1gの一面は、ベース2の台座2aに、上部電極1dの一面は、リード3のリードヘッダ3aに、それぞれ第2の導電性接合材4によって電気的に接続され、半導体装置200を構成する。
1b…コンデンサ
1c…制御回路チップ
1d…上部電極(第2の内部電極)
1e…(第1の)導電性接合材(電子回路体の接合材)
1f…ワイヤ
1g…下部電極(第1の内部電極)
1h…モールド樹脂(第1の樹脂,電子回路体の樹脂)
1i…リードフレーム(支持体)
2…ベース(第1の外部電極,第1の外部端子)
2a…台座(第1の電極面部)
3…リード(第2の外部電極,第2の外部端子)
3a…リードヘッダ(第2の電極面部)
4…第2の導電性接合材(半導体装置の接合材)
5…モールド樹脂(第2の樹脂,半導体装置の樹脂)
7a…(第1の)半導体素子1aの角部近傍
7b…(第2の)半導体素子1aの角部近傍
7c…(第3の)半導体素子1aの角部近傍
7d…(第4の)半導体素子1aの角部近傍
8a…(第1の)下部電極1gの端部
8b…(第2の)下部電極1gの端部
9a…(第1の)半導体素子1aの端部
9b…(第2の)半導体素子1aの端部
10a…半導体素子(ダイオード)
10e…導電性接合材(半導体装置の接合材)
20…ベース(第1の外部電極,第1の外部端子)
20a…台座(第1の電極面部)
30…リード(第2の外部電極,第2の外部端子)
30a…リードヘッダ(第2の電極面部)
50…モールド樹脂(半導体装置の樹脂)
100…電子回路体
200…半導体装置(整流素子)
300…半導体装置(整流素子)
L…外周部絶縁層(SiO2)
p1…応力集中箇所(上)
p2…応力集中箇所(下)
J…上部電極1dにおける半導体素子1aと接続する面の端部から下部電極1gにおける半導体素子1aと接続する面の端部までの距離
W…上部電極1dにおける半導体素子1aと接続する面の端部から半導体素子1a端部までの距離
X…JをWで割り無次元化した値
Tb…曲げ応力方向
Tj…はんだ熱応力方向
D2…半導体素子1aの第一の主面における下部電極1gとの接続端部から半導体素子1aの端部までの領域
S…ソース電極(第2の主端子)
D…ドレイン電極(第1の主端子)
C…ゲート電極(制御電極)
Claims (11)
- 片面にのみゲート電極を有する半導体素子と、
前記半導体素子の前記ゲート電極を有する面に接続される上部電極と、
前記半導体素子の前記ゲート電極を有する面とは反対側の面に接続される下部電極と、を備える半導体装置において、
前記上部電極における前記半導体素子の前記ゲート電極を有する面との接続端部は、前記半導体素子の前記ゲート電極を有する面の端部より内側にあり、かつ、前記下部電極における前記半導体素子の前記反対側の面との接続端部は、前記半導体素子の前記反対側の面の端部より内側にあり、
前記半導体素子の少なくとも1つの角部において、前記下部電極における前記半導体素子の前記反対側の面との接続端部は、前記半導体素子の前記反対側の面の端部より内側にあり、
前記半導体素子の角部以外において、前記下部電極における前記半導体素子の前記反対側の面との接続端部は、前記半導体素子の前記反対側の面の端部より外側にあり、
前記半導体素子と前記上部電極と前記下部電極とが樹脂により封止されるとともに、前記上部電極の前記半導体素子と接続される面とは反対側の面および前記下部電極の前記半導体素子と接続される面とは反対側の面が前記樹脂より露出しており、
前記上部電極の厚みは、前記下部電極の厚みよりも厚いことを特徴とする半導体装置。 - 片面にのみゲート電極を有する半導体素子と、
前記半導体素子の前記ゲート電極を有する面に接続される上部電極と、
前記半導体素子の前記ゲート電極を有する面とは反対側の面に接続される下部電極と、を備える半導体装置において、
前記上部電極における前記半導体素子の前記ゲート電極を有する面との接続端部は、前記半導体素子の前記ゲート電極を有する面の端部より内側にあり、かつ、前記下部電極における前記半導体素子の前記反対側の面との接続端部は、前記半導体素子の前記反対側の面の端部より内側にあり、
前記上部電極は、第1の導電性接合材を介して前記半導体素子に接続され、
前記下部電極は、第2の導電性接合材を介して前記半導体素子に接続され、
前記第1の導電性接合材と前記上部電極との接続部の端部、および前記第2の導電性接合材と前記下部電極との接続部の端部、前記第1の導電性接合材と前記半導体素子との接続部の端部、前記第2の導電性接合材と前記半導体素子との接続部の端部は、前記半導体素子の端部より内側にあり、
前記半導体素子と前記上部電極と前記下部電極とが樹脂により封止されるとともに、前記上部電極の前記半導体素子と接続される面とは反対側の面および前記下部電極の前記半導体素子と接続される面とは反対側の面が前記樹脂より露出しており、
前記上部電極の厚みは、前記下部電極の厚みよりも厚いことを特徴とする半導体装置。 - 請求項2に記載の半導体装置において、
前記第1の導電性接合材と前記上部電極との接続部の端部、および前記第2の導電性接合材と前記下部電極との接続部の端部は、鉛直方向において略揃っていることを特徴とする半導体装置。 - 請求項3に記載の半導体装置において、
前記第1の導電性接合材と前記上部電極との接続部の端部、および前記第2の導電性接合材と前記下部電極との接続部の端部、前記第1の導電性接合材と前記半導体素子との接続部の端部、前記第2の導電性接合材と前記半導体素子との接続部の端部は、鉛直方向において略揃っていることを特徴とする半導体装置。 - 請求項2から4のいずれか1項に記載の半導体装置において、
前記第1の導電性接合材および前記第2の導電性接合材は、鉛フリーはんだまたは焼結材または導電性接着材のいずれかであることを特徴とする半導体装置。 - 片面にのみチップ外周部に外周部絶縁層を有する半導体素子と、
前記半導体素子の前記外周部絶縁層を有する面に接続される上部電極と、
前記半導体素子の前記外周部絶縁層を有する面とは反対側の面に接続される下部電極と、を備える半導体装置において、
前記半導体素子は、ダイオードであり、
前記上部電極における前記半導体素子の前記外周部絶縁層を有する面との接続端部は、前記半導体素子の前記外周部絶縁層を有する面の端部より内側にあり、かつ、前記下部電極における前記半導体素子の前記反対側の面との接続端部は、前記半導体素子の前記反対側の面の端部より内側にあり、
前記半導体素子の角部以外において、前記下部電極における前記半導体素子の前記反対側の面との接続端部は、前記半導体素子の前記反対側の面の端部より外側にあることを特徴とする半導体装置。 - 請求項6に記載の半導体装置において、
前記半導体素子の少なくとも1つの角部において、前記下部電極における前記半導体素子の前記反対側の面との接続端部は、前記半導体素子の前記反対側の面の端部より内側にあることを特徴とする半導体装置。 - 請求項6に記載の半導体装置において、
前記上部電極は、第1の導電性接合材を介して前記半導体素子に接続され、
前記下部電極は、第2の導電性接合材を介して前記半導体素子に接続され、
前記第1の導電性接合材と前記上部電極との接続部の端部、および前記第2の導電性接合材と前記下部電極との接続部の端部、前記第1の導電性接合材と前記半導体素子との接続部の端部、前記第2の導電性接合材と前記半導体素子との接続部の端部は、前記半導体素子の端部より内側にあることを特徴とする半導体装置。 - 請求項8に記載の半導体装置において、
前記第1の導電性接合材と前記上部電極との接続部の端部、および前記第2の導電性接合材と前記下部電極との接続部の端部は、鉛直方向において略揃っていることを特徴とする半導体装置。 - 請求項9に記載の半導体装置において、
前記第1の導電性接合材と前記上部電極との接続部の端部、前記第2の導電性接合材と前記下部電極との接続部の端部、前記第1の導電性接合材と前記半導体素子との接続部の端部、前記第2の導電性接合材と前記半導体素子との接続部の端部は、鉛直方向において略揃っていることを特徴とする半導体装置。 - 請求項8から10のいずれか1項に記載の半導体装置において、
前記第1の導電性接合材および前記第2の導電性接合材は、鉛フリーはんだまたは焼結材または導電性接着材のいずれかであることを特徴とする半導体装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019203742A JP7489181B2 (ja) | 2019-11-11 | 2019-11-11 | 半導体装置 |
EP20199996.8A EP3823019A3 (en) | 2019-11-11 | 2020-10-05 | Vertical power semiconductor device |
US17/078,931 US11652023B2 (en) | 2019-11-11 | 2020-10-23 | Semiconductor device including a semiconductor element with a gate electrode on only one surface |
KR1020200145742A KR102469064B1 (ko) | 2019-11-11 | 2020-11-04 | 반도체 장치 |
CN202011255776.XA CN112786550B (zh) | 2019-11-11 | 2020-11-11 | 半导体装置 |
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