JP7339819B2 - 半導体装置の製造方法および半導体装置 - Google Patents

半導体装置の製造方法および半導体装置 Download PDF

Info

Publication number
JP7339819B2
JP7339819B2 JP2019161250A JP2019161250A JP7339819B2 JP 7339819 B2 JP7339819 B2 JP 7339819B2 JP 2019161250 A JP2019161250 A JP 2019161250A JP 2019161250 A JP2019161250 A JP 2019161250A JP 7339819 B2 JP7339819 B2 JP 7339819B2
Authority
JP
Japan
Prior art keywords
semiconductor
wafer
groove
electrode
back surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2019161250A
Other languages
English (en)
Japanese (ja)
Other versions
JP2021040068A (ja
JP2021040068A5 (enExample
Inventor
伸仁 布谷
信次 隠塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Devices and Storage Corp
Original Assignee
Toshiba Corp
Toshiba Electronic Devices and Storage Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Electronic Devices and Storage Corp filed Critical Toshiba Corp
Priority to JP2019161250A priority Critical patent/JP7339819B2/ja
Priority to CN202010106493.2A priority patent/CN112542382B/zh
Priority to US16/802,670 priority patent/US11342426B2/en
Publication of JP2021040068A publication Critical patent/JP2021040068A/ja
Publication of JP2021040068A5 publication Critical patent/JP2021040068A5/ja
Priority to US17/725,124 priority patent/US11887858B2/en
Application granted granted Critical
Publication of JP7339819B2 publication Critical patent/JP7339819B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/141—Anode or cathode regions of thyristors; Collector or emitter regions of gated bipolar-mode devices, e.g. of IGBTs
    • H10D62/142—Anode regions of thyristors or collector regions of gated bipolar-mode devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/01—Manufacture or treatment
    • H10D8/043—Manufacture or treatment of planar diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/50—PIN diodes 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/60—Schottky-barrier diodes 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group IV materials or Group III-V materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P58/00—Singulating wafers or substrates into multiple chips, i.e. dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7422—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Dicing (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Electromagnetism (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Laser Beam Processing (AREA)
  • Drying Of Semiconductors (AREA)
JP2019161250A 2019-09-04 2019-09-04 半導体装置の製造方法および半導体装置 Active JP7339819B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2019161250A JP7339819B2 (ja) 2019-09-04 2019-09-04 半導体装置の製造方法および半導体装置
CN202010106493.2A CN112542382B (zh) 2019-09-04 2020-02-21 半导体装置的制造方法以及半导体装置
US16/802,670 US11342426B2 (en) 2019-09-04 2020-02-27 Semiconductor device and method of manufacturing same
US17/725,124 US11887858B2 (en) 2019-09-04 2022-04-20 Semiconductor device and method of manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019161250A JP7339819B2 (ja) 2019-09-04 2019-09-04 半導体装置の製造方法および半導体装置

Publications (3)

Publication Number Publication Date
JP2021040068A JP2021040068A (ja) 2021-03-11
JP2021040068A5 JP2021040068A5 (enExample) 2021-10-07
JP7339819B2 true JP7339819B2 (ja) 2023-09-06

Family

ID=74681746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019161250A Active JP7339819B2 (ja) 2019-09-04 2019-09-04 半導体装置の製造方法および半導体装置

Country Status (3)

Country Link
US (2) US11342426B2 (enExample)
JP (1) JP7339819B2 (enExample)
CN (1) CN112542382B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022044894A (ja) * 2020-09-08 2022-03-18 ソニーセミコンダクタソリューションズ株式会社 半導体チップ、製造方法
CN116344614A (zh) * 2021-12-22 2023-06-27 株式会社东芝 半导体装置及其制造方法
JP2023110631A (ja) * 2022-01-28 2023-08-09 ラピスセミコンダクタ株式会社 半導体ウェハ及び半導体装置の製造方法
US20250183099A1 (en) * 2023-12-01 2025-06-05 Advanced Semiconductor Engineering, Inc. Electronic device and method of manufacturing the same
DE102024209060A1 (de) 2024-09-20 2026-03-26 Infineon Technologies Ag Electronic component separated from wafer by back side groove and groove extension

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009105211A (ja) 2007-10-23 2009-05-14 Disco Abrasive Syst Ltd ウエーハの分割方法
US20120306056A1 (en) 2011-06-03 2012-12-06 Nxp B.V. Semiconductor wafer and method of producing the same
US20140264768A1 (en) 2013-03-15 2014-09-18 Nxp B. V. Die Preparation for Wafer-Level Chip Scale Package (WLCSP)

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3838501A (en) * 1973-02-09 1974-10-01 Honeywell Inf Systems Method in microcircuit package assembly providing nonabrasive, electrically passive edges on integrated circuit chips
JPH05102300A (ja) 1991-10-07 1993-04-23 Mitsubishi Electric Corp 半導体装置
JPH05166926A (ja) * 1991-12-12 1993-07-02 Hitachi Ltd 半導体基板ダイシング法
JPH06275583A (ja) * 1993-03-24 1994-09-30 Disco Abrasive Syst Ltd 面取り半導体チップ及びその面取り加工方法
JPH09141646A (ja) * 1995-11-21 1997-06-03 Sony Corp 基板加工方法
US6271102B1 (en) * 1998-02-27 2001-08-07 International Business Machines Corporation Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
JP2004111606A (ja) 2002-09-18 2004-04-08 Tokyo Seimitsu Co Ltd ウェーハの加工方法
US6998694B2 (en) * 2003-08-05 2006-02-14 Shye-Lin Wu High switching speed two mask Schottky diode with high field breakdown
US7214568B2 (en) * 2004-02-06 2007-05-08 Agere Systems Inc. Semiconductor device configured for reducing post-fabrication damage
JP2006086516A (ja) * 2004-08-20 2006-03-30 Showa Denko Kk 半導体発光素子の製造方法
JP2006140276A (ja) * 2004-11-11 2006-06-01 Yamaha Corp 半導体ウェーハとそれを用いた半導体素子及びチップサイズ・パッケージ並びに半導体ウェーハの製造方法、半導体ウェーハの検査方法
JP2006278646A (ja) * 2005-03-29 2006-10-12 Sanyo Electric Co Ltd 半導体装置の製造方法
JP2012054378A (ja) * 2010-09-01 2012-03-15 Renesas Electronics Corp 半導体装置
WO2012099080A1 (ja) * 2011-01-18 2012-07-26 富士電機株式会社 逆阻止型半導体素子の製造方法
JP5995435B2 (ja) * 2011-08-02 2016-09-21 ローム株式会社 半導体装置およびその製造方法
DE102011112659B4 (de) * 2011-09-06 2022-01-27 Vishay Semiconductor Gmbh Oberflächenmontierbares elektronisches Bauelement
US9704718B2 (en) * 2013-03-22 2017-07-11 Infineon Technologies Austria Ag Method for manufacturing a silicon carbide device and a silicon carbide device
WO2014185010A1 (ja) * 2013-05-13 2014-11-20 パナソニックＩｐマネジメント株式会社 半導体素子およびその製造方法、半導体モジュールおよびその製造方法、並びに、半導体パッケージ
JP2015053428A (ja) * 2013-09-09 2015-03-19 住友電気工業株式会社 炭化珪素半導体装置の製造方法
JP2015133460A (ja) * 2014-01-16 2015-07-23 株式会社ディスコ ウェーハの分割方法
US20160148842A1 (en) * 2014-11-24 2016-05-26 Nxp B.V. Dicing of low-k wafers
US9711463B2 (en) * 2015-01-14 2017-07-18 Taiwan Semiconductor Manufacturing Co., Ltd. Dicing method for power transistors
US9466585B1 (en) * 2015-03-21 2016-10-11 Nxp B.V. Reducing defects in wafer level chip scale package (WLCSP) devices
EP3221882A4 (en) * 2015-07-14 2018-05-02 Goertek Inc. Assembling method, manufacturing method, device and electronic apparatus of flip-die
US20170084490A1 (en) * 2015-09-18 2017-03-23 Stmicroelectronics, Inc. Method for making ic with stepped sidewall and related ic devices
JP6546507B2 (ja) * 2015-10-26 2019-07-17 株式会社ディスコ デバイスの製造方法
JP2017162876A (ja) * 2016-03-07 2017-09-14 株式会社ジェイデバイス 半導体パッケージの製造方法
JP2017199834A (ja) * 2016-04-28 2017-11-02 株式会社ジェイデバイス 半導体パッケージ及び半導体パッケージの製造方法
US10535588B2 (en) * 2017-01-18 2020-01-14 Stmicroelectronics, Inc. Die with metallized sidewall and method of manufacturing
JP6766758B2 (ja) * 2017-06-15 2020-10-14 株式会社デンソー 半導体装置およびその製造方法
US10403506B2 (en) * 2018-01-07 2019-09-03 Infineon Technologies Ag Separation of workpiece with three material removal stages

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009105211A (ja) 2007-10-23 2009-05-14 Disco Abrasive Syst Ltd ウエーハの分割方法
US20120306056A1 (en) 2011-06-03 2012-12-06 Nxp B.V. Semiconductor wafer and method of producing the same
US20140264768A1 (en) 2013-03-15 2014-09-18 Nxp B. V. Die Preparation for Wafer-Level Chip Scale Package (WLCSP)

Also Published As

Publication number Publication date
JP2021040068A (ja) 2021-03-11
US20220246734A1 (en) 2022-08-04
US11342426B2 (en) 2022-05-24
US20210066130A1 (en) 2021-03-04
CN112542382B (zh) 2024-04-09
CN112542382A (zh) 2021-03-23
US11887858B2 (en) 2024-01-30

Similar Documents

Publication Publication Date Title
US11887858B2 (en) Semiconductor device and method of manufacturing same
JP5740820B2 (ja) 半導体装置および半導体装置の製造方法
CN102903745B (zh) 半导体器件及其制造方法
CN103208492B (zh) 半导体装置
US8148240B2 (en) Method of manufacturing semiconductor chips
CN107017158A (zh) 半导体装置及其制造方法
US11387326B2 (en) Silicon carbide semiconductor device and method for manufacturing the same
US10748801B2 (en) Carrier arrangement and method for processing a carrier by generating a crack structure
JP2016167573A (ja) 半導体装置の製造方法
JP6429168B2 (ja) パワー半導体装置及びパワー半導体装置の製造方法
US8728923B2 (en) Manufacturing method of semiconductor device
JP2013149804A (ja) 半導体装置の製造方法及び半導体装置
JP2014187192A (ja) 半導体装置
JP6034694B2 (ja) 半導体装置の製造方法及び半導体装置
JP6932109B2 (ja) 半導体装置の製造方法
JP2017069269A (ja) 半導体装置および半導体装置の製造方法
CN111092051A (zh) 半导体封装及制造半导体封装的方法
JP2023093305A (ja) 半導体装置およびその製造方法
JP5857575B2 (ja) 半導体装置の製造方法
CN116072610A (zh) 碳化硅半导体装置的制造方法及碳化硅半导体芯片
JP7273756B2 (ja) 半導体装置及びその製造方法
JP2016058610A (ja) 半導体装置およびその製造方法
JP2012248572A (ja) 半導体装置および半導体装置の製造方法
JP2015002259A (ja) 炭化ケイ素半導体装置及び炭化ケイ素半導体装置の製造方法
JP2017135273A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20210825

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20210825

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20220825

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20220825

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20221020

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230213

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230413

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20230623

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230727

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230825

R150 Certificate of patent or registration of utility model

Ref document number: 7339819

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150