JP7269362B2 - 半導体製造装置およびそれを用いた半導体装置の製造方法ならびに半導体装置 - Google Patents
半導体製造装置およびそれを用いた半導体装置の製造方法ならびに半導体装置 Download PDFInfo
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- JP7269362B2 JP7269362B2 JP2021551305A JP2021551305A JP7269362B2 JP 7269362 B2 JP7269362 B2 JP 7269362B2 JP 2021551305 A JP2021551305 A JP 2021551305A JP 2021551305 A JP2021551305 A JP 2021551305A JP 7269362 B2 JP7269362 B2 JP 7269362B2
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Description
実施の形態1に係る半導体装置および半導体製造装置等について説明する。
はじめに、半導体製造装置によって製造された半導体装置について説明する。図1、図2および図3に示すように、パワー半導体装置としての半導体装置1では、リードフレーム45に、半導体素子としてのパワー半導体素子21およびIC素子29がそれぞれ搭載されている。リードフレーム45は、パワー半導体素子21等とともに、封止材としてのモールド樹脂33によって封止されている。
図7および図8に示すように、モールド金型51は、下金型53と上金型55とを有する。モールド金型51には、キャビティ52が形成されている。キャビティ52は、第1方向としてのX軸方向に延在する。キャビティ52は、たとえば、第1キャビティ52aと第2キャビティ52bとを含む。図7および図9に示すように、モールド金型51には、第1キャビティ52aにモールド樹脂を注入する樹脂注入ゲート部59が形成されている。モールド金型51には、第1キャビティ52aと第2キャビティ52bとの間を連通するランナー61が形成されている。第1キャビティ52aに注入されたモールド樹脂は、ランナー61を経て第2キャビティ52bに注入される。
次に、上述したモールド金型を適用した半導体装置の製造方法について説明する。まず、金属板のエッチングまたは金属板の打ち抜きによってリードフレーム45(図15参照)が形成される。リードフレーム45には、大ダイパッド9、小ダイパッド15、ICリード23等が形成される。次に、曲げ金型を用いてリードフレーム50に曲げ加工を施すことにより、リード段差部7(図15参照)が形成される。
上述したように、キャビティ52内に流動樹脂83が徐々に充填される間に、キャビティ52内の空気は、モールド金型51に形成されたエアベント79から排出されることになる(図18参照)。
実施の形態2に係る半導体製造装置等について説明する。ここでは、一つのキャビティに対して、複数の樹脂溜め部を備えたモールド金型を適用した半導体製造装置等について説明する。
半導体製造装置としてのモールド金型について説明する。図34に示すように、モールド金型51(下金型53)には、たとえば、樹脂溜め部63として、樹脂溜め部63aと樹脂溜め部63bとが形成されている。第2キャビティ52bと樹脂溜め部63aとを連通する樹脂溜めゲート部65aが形成されている。第2キャビティ52bと樹脂溜め部63bとを連通する樹脂溜めゲート部65bが形成されている。
次に、上述したモールド金型を使用した半導体装置の製造方法について説明する。
実施の形態3に係る半導体製造装置等について説明する。
図37に示すように、半導体製造装置としてのモールド金型51(下金型53)には、たとえば、樹脂溜め部63として、樹脂溜め部63aと樹脂溜め部63bとが形成されている。第2キャビティ52bと樹脂溜め部63aとを連通する樹脂溜めゲート部65aが形成されている。第2キャビティ52bと樹脂溜め部63bとを連通する樹脂溜めゲート部65bが形成されている。樹脂溜めゲート部65aおよび樹脂溜めゲート部65bのそれぞれでは、シャッター部としての可動ピンは配置されていない。
次に、上述したモールド金型を使用した半導体装置の製造方法について説明する。まず、前述した半導体装置の製造方法と同様にして、モールド樹脂によって封止される前の、パワー半導体素子等が搭載されたリードフレームを含む複数の半導体装置が形成される。
実施の形態4に係る半導体製造装置等について説明する。ここでは、樹脂溜め部63に流れ込んで硬化したモールド樹脂を、実装に使用することができるモールド金型を適用した半導体製造装置等について説明する。
実施の形態5に係る半導体製造装置等について説明する。ここでは、複数の樹脂溜め部を備えたモールド金型を適用した半導体製造装置等について説明する。
(付記1)
リード端子と、
前記リード端子に接続されたダイパッドと、
前記ダイパッドに搭載された半導体素子と、
前記リード端子の一部を露出する態様で、前記ダイパッドおよび前記半導体素子を封止する封止材と
を有し、
前記封止材は、第1方向に距離を隔てて互いに対向する第1側部と第2側部とを有し、
前記第1側部には、封止材痕があり、
前記第2側部には、封止材塊部が突出している、半導体装置。
開口部が形成された電子回路基板を備え、
前記封止材塊部は前記開口部に嵌め込まれた状態で電子回路基板に実装された、付記1記載の半導体装置。
Claims (15)
- 下金型と上金型とを含むモールド金型によって第1方向に延在するキャビティが形成され、前記キャビティ内に半導体素子を搭載したリードフレームを配置し、前記キャビティ内に封止材を注入することによって、前記リードフレームを前記半導体素子とともに封止する半導体製造装置であって、
前記キャビティ内へ前記封止材を注入する封止材注入ゲート部と、
前記キャビティを挟んで前記封止材注入ゲート部が配置されている一方側とは前記第1方向に距離を隔てられた他方側に配置され、前記キャビティを経て流れ込む前記封止材を溜める一つ以上の封止材溜め部と、
前記キャビティと前記封止材溜め部との間を連通する封止材溜めゲート部と
を備え、
前記封止材注入ゲート部は、第1開口断面積を有し、
前記封止材溜めゲート部は、第2開口断面積を有し、
前記第2開口断面積は前記第1開口断面積よりも小さく、
前記封止材溜めゲート部は、前記キャビティから前記封止材溜め部へ前記封止材が流れるのを阻止するシャッター部を備え、
前記モールド金型では、
前記キャビティ内に前記封止材を注入する際に、前記シャッター部を閉じた状態にし、
前記キャビティ内に前記封止材が充填された時点で、前記シャッター部を開けた状態にする、半導体製造装置。 - 前記封止材溜めゲート部および前記封止材溜め部は、前記下金型および前記上金型の少なくともいずれかに設けられた、請求項1記載の半導体製造装置。
- 前記封止材溜めゲート部は、
前記キャビティ側に位置し、前記第2開口断面積を有する第1部と、
前記第1部に対して前記封止材溜め部側に位置し、前記第2開口断面積よりも大きい第3開口断面積を有する第2部と
を有する、請求項1または2に記載の半導体製造装置。 - 前記第1部から前記第2部に向かって傾斜した傾斜部を含む、請求項3記載の半導体製造装置。
- 前記封止材溜めゲート部は、前記他方側における、前記封止材注入ゲート部に最も近い位置に配置された、請求項1~4のいずれか1項に記載の半導体製造装置。
- 前記封止材溜めゲート部は、前記他方側における、前記封止材注入ゲート部に最も近い位置から前記第1方向と交差する第2方向に離れた位置に配置された、請求項1~4のいずれか1項に記載の半導体製造装置。
- 前記封止材溜め部は、
第1封止材溜め部と、
第2封止材溜め部と
を含み、
前記封止材溜めゲート部は、
前記キャビティと前記第1封止材溜め部との間を連通する第1封止材溜めゲート部と、
前記キャビティと前記第2封止材溜め部との間を連通する第2封止材溜めゲート部と
を含む、請求項1~6のいずれか1項に記載の半導体製造装置。 - 前記封止材溜めゲート部は、前記キャビティと前記封止材溜め部とを前記第1方向と交差する方向に連通する、請求項1~7のいずれか1項に記載の半導体製造装置。
- 前記封止材溜め部は、少なくとも一の前記封止材溜め部と他の前記封止材溜め部とを含み、
前記封止材溜めゲート部は、前記キャビティと一の前記封止材溜め部との間を連通し、
一の前記封止材溜め部と他の前記封止材溜め部との間は、封止材溜め部間ゲート部によって連通された、請求項1~6のいずれか1項に記載の半導体製造装置。 - リードフレームを用意する工程と、
前記リードフレームに半導体素子を搭載する工程と、
下金型および上金型を含み、前記下金型と前記上金型とによってキャビティが形成されるモールド金型を用意する工程と、
前記半導体素子が搭載された前記リードフレームを、前記モールド金型内に配置する工程と、
前記キャビティ内に封止材を注入する工程と、
前記モールド金型を取り外す工程と
を有し、
前記モールド金型を用意する工程は、
前記キャビティへ向けて前記封止材を注入する、第1開口断面積を有する封止材注入ゲート部と、
前記キャビティを挟んで前記封止材注入ゲート部が配置されている第1側とは反対の第2側に設けられ、前記キャビティを経て流れ込む前記封止材を溜める一つ以上の封止材溜め部と、
前記キャビティと前記封止材溜め部との間を連通する、前記第1開口断面積よりも小さい第2開口断面積を有する封止材溜めゲート部と
を備えた前記モールド金型を用意する工程を備え、
前記キャビティ内に前記封止材を注入する工程は、前記キャビティ内に充填される前記封止材が前記封止材溜め部へ流れ込むまで前記封止材を注入する工程を備え、
前記モールド金型を用意する工程は、前記封止材溜めゲート部に設けられ、前記キャビティから前記封止材溜め部へ前記封止材が流れるのを阻止するシャッター部を備えた前記
モールド金型を用意する工程を含み、
前記キャビティ内に前記封止材を注入する工程は、
前記シャッター部を閉じた状態で、前記キャビティ内に前記封止材を注入する工程と、
前記キャビティ内に前記封止材が充填された後、前記シャッター部を開けた状態にして、前記キャビティ内に充填された前記封止材が前記封止材溜め部へ流れ込むまで前記キャビティ内に前記封止材を注入する工程と
を含む、半導体装置の製造方法。 - 前記モールド金型を取り外す工程は、前記シャッター部を上下方向に稼動させて、前記リードフレーム、前記下金型および前記上金型のいずれかに当接させることによって、前記下金型と前記上金型とを離間させる工程を含む、請求項10記載の半導体装置の製造方法。
- 前記モールド金型を取り外す工程は、
前記封止材溜め部にへ流れ込んだ封止材の部分を、前記キャビティ内に充填された前記封止材から取り除く工程と、
前記封止材注入ゲート部に位置する前記封止材の部分を、前記キャビティ内に充填された前記封止材から取り除く工程と
を含む、請求項10または11に記載の半導体装置の製造方法。 - 前記リードフレームを用意する工程は、ダイパッドおよびリード端子となる部分を含み、前記ダイパッドの高さ位置が前記リード端子となる部分の高さ位置とは異なる前記リードフレームを用意する工程を含み、
前記リードフレームに前記半導体素子を搭載する工程は、前記半導体素子を前記ダイパッドに搭載する工程を含み、
前記リードフレームを前記モールド金型内に配置する工程は、前記ダイパッドと前記キャビティを構成する前記下金型の部分との間に、高さ方向に第1距離を有する第1充填空間が形成されるとともに、前記ダイパッドと前記キャビティを構成する前記上金型の部分との間に、前記高さ方向に前記第1距離よりも長い第2距離を有する第2充填空間が形成される態様で、前記リードフレームを配置する工程を含み、
前記封止材を注入する工程は、前記封止材を前記第1充填空間と前記第2充填空間とに充填する工程を含む、請求項10~12のいずれか1項に記載の半導体装置の製造方法。 - 前記リードフレームを用意する工程は、前記モールド金型内に配置された状態で前記封止材溜め部が位置する領域を覆わない切り欠き部が形成された前記リードフレームを用意する工程を含む、請求項10~13のいずれか1項に記載の半導体装置の製造方法。
- リード端子と、
前記リード端子に接続されたダイパッドと、
前記ダイパッドに搭載された半導体素子と、
前記リード端子の一部を露出する態様で、前記ダイパッドおよび前記半導体素子を封止する封止材と
を有し、
前記封止材は、第1方向に距離を隔てて互いに対向する第1側部と第2側部とを有し、
前記第1側部には、凸状の封止材痕および凹状の封止材痕のいずれかを含む封止材痕があり、
前記第2側部には、封止材塊部が突出し、
開口部が形成された電子回路基板を備え、
前記封止材塊部は前記開口部に嵌め込まれた状態で前記電子回路基板に実装された、半導体装置。
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