JP7170856B2 - 三次元メモリデバイスを形成するための方法、及び、半導体構造を形成するための方法 - Google Patents
三次元メモリデバイスを形成するための方法、及び、半導体構造を形成するための方法 Download PDFInfo
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- JP7170856B2 JP7170856B2 JP2021518895A JP2021518895A JP7170856B2 JP 7170856 B2 JP7170856 B2 JP 7170856B2 JP 2021518895 A JP2021518895 A JP 2021518895A JP 2021518895 A JP2021518895 A JP 2021518895A JP 7170856 B2 JP7170856 B2 JP 7170856B2
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- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H01L21/31111—Etching inorganic layers by chemical means
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
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- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
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- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
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- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02186—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02189—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
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Description
Claims (12)
- 誘電体エッチング停止層を形成することであって、前記誘電体エッチング停止層は基板上に配置される、誘電体エッチング停止層を形成することと、
前記誘電体エッチング停止層上に誘電体スタックを形成することであって、前記誘電体スタックは、複数の交互配置されている誘電体層及び犠牲層を含む、ことと、
前記誘電体スタックを貫通して垂直方向に延在する開口部を形成することと、
前記誘電体エッチング停止層を貫通するように前記開口部を延長することと、
前記開口部の下部に、選択的エピタキシャル成長(SEG)プラグを形成することであって、前記SEGプラグは前記基板上に配置される、選択的エピタキシャル成長(SEG)プラグを形成することと、
前記開口部内の前記SEGプラグの上側に接触するチャネル構造を形成することと、
前記誘電体スタック内の前記犠牲層を導電体層に置き換えることにより、複数の交互配置されている誘電体層及び前記導電体層を含むメモリスタックを形成することと、を含み、
前記誘電体エッチング停止層を形成することは、湿式化学酸化によって前記基板の一部を酸化させることによって自然酸化膜を形成することを含む、
三次元(3D)メモリデバイスを形成するための方法。 - 前記誘電体エッチング停止層を貫通するように前記開口部を延長することは、前記誘電体エッチング停止層を穿孔することを含む、請求項1に記載の方法。
- 前記SEGプラグを形成することは、前記開口部で前記基板から半導体層をエピタキシャル成長させることを含む、請求項1に記載の方法。
- 前記開口部を形成することは、前記誘電体エッチング停止層で停止するまで、前記誘電体スタックを貫通するようにエッチングすることを含む、請求項1に記載の方法。
- 前記誘電体エッチング停止層の厚さは、約1 nm~約20 nmである、請求項1に記載の方法。
- 前記湿式化学酸化では、オゾンを含有する湿式化学物質を使用する、請求項1から5のいずれか1項に記載の方法。
- 前記湿式化学物質は、フッ化水素酸とオゾンとの混合物である、請求項6に記載の方法。
- 誘電体エッチング停止層を形成することであって、前記誘電体エッチング停止層は基板上に配置される、誘電体エッチング停止層を形成することと、
前記誘電体エッチング停止層上に複数の交互配置されている誘電体層及び犠牲層を形成することと、
前記交互配置されている誘電体層及び犠牲層を貫通して垂直方向に延在する開口部を形成することと、
前記誘電体エッチング停止層を貫通するように前記開口部を延長することと、
前記開口部の下部に、選択的エピタキシャル成長(SEG)プラグを形成することであって、前記SEGプラグは前記基板上に配置される、選択的エピタキシャル成長(SEG)プラグを形成することと、を含み、
前記誘電体エッチング停止層を形成することは、湿式化学酸化によって前記基板の一部を酸化させることによって自然酸化膜を形成することを含む、
半導体構造を形成するための方法。 - 前記誘電体エッチング停止層を貫通するように前記開口部を延長することは、前記誘電体エッチング停止層を穿孔することを含む、請求項8に記載の方法。
- 前記SEGプラグを形成することは、前記開口部で前記基板から半導体層をエピタキシャル成長させることを含む、請求項8に記載の方法。
- 前記湿式化学酸化では、オゾンを含有する湿式化学物質を使用する、請求項8から10のいずれか1項に記載の方法。
- 前記湿式化学物質は、フッ化水素酸とオゾンとの混合物である、請求項11に記載の方法。
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