JP7114824B1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP7114824B1 JP7114824B1 JP2022522573A JP2022522573A JP7114824B1 JP 7114824 B1 JP7114824 B1 JP 7114824B1 JP 2022522573 A JP2022522573 A JP 2022522573A JP 2022522573 A JP2022522573 A JP 2022522573A JP 7114824 B1 JP7114824 B1 JP 7114824B1
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/63—Vertical IGFETs
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
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- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
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- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
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- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
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- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/152—Source regions of DMOS transistors
- H10D62/153—Impurity concentrations or distributions
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- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/152—Source regions of DMOS transistors
- H10D62/154—Dispositions
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- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
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- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/152—Source regions of DMOS transistors
- H10D62/155—Shapes
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- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/156—Drain regions of DMOS transistors
- H10D62/157—Impurity concentrations or distributions
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- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/156—Drain regions of DMOS transistors
- H10D62/158—Dispositions
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- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
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- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/512—Disposition of the gate electrodes, e.g. buried gates
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- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/512—Disposition of the gate electrodes, e.g. buried gates
- H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
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- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/016—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including vertical IGFETs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
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- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/62—Electrodes ohmically coupled to a semiconductor
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2021/034220 WO2023042359A1 (ja) | 2021-09-17 | 2021-09-17 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP7114824B1 true JP7114824B1 (ja) | 2022-08-08 |
| JPWO2023042359A1 JPWO2023042359A1 (https=) | 2023-03-23 |
| JPWO2023042359A5 JPWO2023042359A5 (https=) | 2023-08-22 |
Family
ID=82748809
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022522573A Active JP7114824B1 (ja) | 2021-09-17 | 2021-09-17 | 半導体装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US11637176B2 (https=) |
| JP (1) | JP7114824B1 (https=) |
| KR (1) | KR102434890B1 (https=) |
| CN (1) | CN115152032B (https=) |
| WO (1) | WO2023042359A1 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7566609B2 (ja) * | 2020-12-11 | 2024-10-15 | 株式会社東芝 | 半導体装置 |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009016571A (ja) * | 2007-07-04 | 2009-01-22 | Rohm Co Ltd | 半導体装置 |
| JP2016171341A (ja) * | 2016-05-26 | 2016-09-23 | ローム株式会社 | 半導体装置 |
| JP2018046256A (ja) * | 2016-09-16 | 2018-03-22 | 株式会社東芝 | 半導体装置 |
| WO2018123799A1 (ja) * | 2016-12-27 | 2018-07-05 | パナソニックIpマネジメント株式会社 | 半導体装置 |
| JP2018152504A (ja) * | 2017-03-14 | 2018-09-27 | エイブリック株式会社 | 半導体装置 |
| JP2019201217A (ja) * | 2014-04-15 | 2019-11-21 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
| JP2020141130A (ja) * | 2019-02-27 | 2020-09-03 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05304297A (ja) | 1992-01-29 | 1993-11-16 | Nec Corp | 電力用半導体装置およびその製造方法 |
| JP4194890B2 (ja) * | 2003-06-24 | 2008-12-10 | 株式会社豊田中央研究所 | 半導体装置とその製造方法 |
| US7372088B2 (en) | 2004-01-27 | 2008-05-13 | Matsushita Electric Industrial Co., Ltd. | Vertical gate semiconductor device and method for fabricating the same |
| JP3999225B2 (ja) | 2004-01-27 | 2007-10-31 | 松下電器産業株式会社 | 半導体装置およびその製造方法 |
| DE102005014743B4 (de) | 2005-03-31 | 2013-12-05 | Infineon Technologies Austria Ag | MOS-Feldplattentrench-Transistoreinrichtung |
| JP5369372B2 (ja) * | 2005-11-28 | 2013-12-18 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
| US20090272982A1 (en) * | 2008-03-03 | 2009-11-05 | Fuji Electric Device Technology Co., Ltd. | Trench gate type semiconductor device and method of producing the same |
| JP4670915B2 (ja) * | 2008-08-08 | 2011-04-13 | ソニー株式会社 | 半導体装置 |
| JP2013197122A (ja) * | 2012-03-15 | 2013-09-30 | Toshiba Corp | 半導体装置 |
| JP2013258333A (ja) * | 2012-06-13 | 2013-12-26 | Toshiba Corp | 電力用半導体装置 |
| US10608104B2 (en) | 2014-03-28 | 2020-03-31 | Infineon Technologies Ag | Trench transistor device |
| JP6566512B2 (ja) | 2014-04-15 | 2019-08-28 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
| JP6369173B2 (ja) * | 2014-04-17 | 2018-08-08 | 富士電機株式会社 | 縦型半導体装置およびその製造方法 |
| DE102014114832B4 (de) * | 2014-10-13 | 2020-06-18 | Infineon Technologies Austria Ag | Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung |
| KR102259185B1 (ko) * | 2016-08-02 | 2021-06-01 | 누보톤 테크놀로지 재팬 가부시키가이샤 | 반도체 장치, 반도체 모듈, 및 반도체 패키지 장치 |
| JP6870547B2 (ja) * | 2017-09-18 | 2021-05-12 | 株式会社デンソー | 半導体装置およびその製造方法 |
| JP6631934B1 (ja) * | 2018-06-19 | 2020-01-15 | パナソニックIpマネジメント株式会社 | 半導体装置 |
| TWI761740B (zh) * | 2018-12-19 | 2022-04-21 | 日商新唐科技日本股份有限公司 | 半導體裝置 |
-
2021
- 2021-09-17 KR KR1020227022672A patent/KR102434890B1/ko active Active
- 2021-09-17 WO PCT/JP2021/034220 patent/WO2023042359A1/ja not_active Ceased
- 2021-09-17 CN CN202180008223.0A patent/CN115152032B/zh active Active
- 2021-09-17 JP JP2022522573A patent/JP7114824B1/ja active Active
-
2022
- 2022-07-07 US US17/859,799 patent/US11637176B2/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009016571A (ja) * | 2007-07-04 | 2009-01-22 | Rohm Co Ltd | 半導体装置 |
| JP2019201217A (ja) * | 2014-04-15 | 2019-11-21 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
| JP2016171341A (ja) * | 2016-05-26 | 2016-09-23 | ローム株式会社 | 半導体装置 |
| JP2018046256A (ja) * | 2016-09-16 | 2018-03-22 | 株式会社東芝 | 半導体装置 |
| WO2018123799A1 (ja) * | 2016-12-27 | 2018-07-05 | パナソニックIpマネジメント株式会社 | 半導体装置 |
| JP2018152504A (ja) * | 2017-03-14 | 2018-09-27 | エイブリック株式会社 | 半導体装置 |
| JP2020141130A (ja) * | 2019-02-27 | 2020-09-03 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPWO2023042359A1 (https=) | 2023-03-23 |
| WO2023042359A1 (ja) | 2023-03-23 |
| US11637176B2 (en) | 2023-04-25 |
| US20230101684A1 (en) | 2023-03-30 |
| CN115152032B (zh) | 2023-03-14 |
| KR102434890B1 (ko) | 2022-08-22 |
| CN115152032A (zh) | 2022-10-04 |
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