JP7052476B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP7052476B2 JP7052476B2 JP2018060389A JP2018060389A JP7052476B2 JP 7052476 B2 JP7052476 B2 JP 7052476B2 JP 2018060389 A JP2018060389 A JP 2018060389A JP 2018060389 A JP2018060389 A JP 2018060389A JP 7052476 B2 JP7052476 B2 JP 7052476B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- semiconductor substrate
- region
- electrode
- metal electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 97
- 239000000758 substrate Substances 0.000 claims description 53
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 239000002184 metal Substances 0.000 claims description 25
- 108091006146 Channels Proteins 0.000 claims description 11
- 102000004129 N-Type Calcium Channels Human genes 0.000 claims description 6
- 108090000699 N-Type Calcium Channels Proteins 0.000 claims description 6
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 230000001681 protective effect Effects 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- 229910052814 silicon oxide Inorganic materials 0.000 description 7
- 238000010521 absorption reaction Methods 0.000 description 6
- 239000004642 Polyimide Substances 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000008595 infiltration Effects 0.000 description 4
- 238000001764 infiltration Methods 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- 238000001459 lithography Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 229920002577 polybenzoxazole Polymers 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 230000009545 invasion Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7823—Lateral DMOS transistors, i.e. LDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3192—Multilayer coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/564—Details not otherwise provided for, e.g. protection against moisture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66121—Multilayer diodes, e.g. PNPN diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
- H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/868—PIN diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Description
また、本発明の他の一態様に係る半導体装置は、デバイスが設けられたセル領域と、前記セル領域の周囲に設けられた終端領域とを有する半導体基板と、前記終端領域において前記半導体基板の上に設けられ、複数の開口を有する第1の絶縁膜と、前記終端領域に設けられ、前記複数の開口を介して前記半導体基板に接続された複数の金属電極と、前記複数の金属電極のうち少なくとも最外周の電極に対応する前記開口の側壁に設けられ、前記第1の絶縁膜よりも吸湿率の低い第2の絶縁膜とを備える。
また、本発明の他の一態様に係る半導体装置は、デバイスが設けられたセル領域と、前記セル領域の周囲に設けられた終端領域とを有する半導体基板と、前記終端領域において前記半導体基板の上に設けられ、複数の開口を有する第1の絶縁膜と、前記終端領域に設けられ、前記複数の開口を介して前記半導体基板に接続された複数の金属電極と、前記第1の絶縁膜及び前記複数の金属電極を覆い、前記第1の絶縁膜よりも吸湿率の低い第2の絶縁膜と、前記第1の絶縁膜よりも吸湿率が高い第3の絶縁膜とを備え、前記第3の絶縁膜は、前記第2の絶縁膜の上に設けられた第1の部分と、前記複数の金属電極のうち最外周の電極から前記半導体基板の端部までの領域に設けられ、前記第1の部分とは分離され、前記第1の絶縁膜に前記第2の絶縁膜を介さずに直接的に接する第2の部分とを有することを特徴とする。
図1は、実施の形態1に係る半導体装置を示す上面図である。半導体基板1は、デバイスが設けられたセル領域2と、セル領域2の周囲に設けられた終端領域3とを有する。デバイスはpinダイオードであるが、これに限定されずIGBT(Insulated Gate Bipolar Transistor)でもよい。セル領域2にはデバイスのオン状態に主電流が流れる。終端領域3は、オン状態には電流が流れず、オフ状態の逆バイアス印加時に空乏層をデバイス横方向に延ばして耐圧を保持する。
図6は、実施の形態2に係る半導体装置を示す断面図である。実施の形態1では絶縁膜12が半導体基板1に接していたが、本実施の形態では絶縁膜16が開口8a,8b,8cの側壁に設けられている。絶縁膜16は例えばシリコン窒化膜であり、絶縁膜7よりも吸湿率が低い。
図8は、実施の形態3に係る半導体装置を示す断面図である。実施の形態1では絶縁膜12が半導体基板1に接していたが、本実施の形態では絶縁膜7,12の上に絶縁膜17が設けられている。アノード電極9を外部と電気的に接続するため、絶縁膜12と同様にアノード電極9の上方において絶縁膜17に開口が設けられている。
Claims (5)
- デバイスが設けられたセル領域と、前記セル領域の周囲に設けられた終端領域と、前記終端領域の外側に設けられたダイシング領域とを有する半導体基板と、
前記終端領域において前記半導体基板の上に設けられ、複数の開口を有する第1の絶縁膜と、
前記開口を介して前記半導体基板に接続された複数の金属電極と、
前記第1の絶縁膜及び前記複数の金属電極を覆い、前記第1の絶縁膜よりも吸湿率の低い第2の絶縁膜とを備え、
最外周の前記金属電極より外側から前記ダイシング領域までの領域に、前記開口を有する前記第1の絶縁膜、及び前記第1の絶縁膜の前記開口内に配置され、前記半導体基板に接する前記第2の絶縁膜が設けられ、
前記最外周の前記金属電極より外側の領域の前記第2の絶縁膜の端部から前記ダイシング領域内に、前記第1の絶縁膜が設けられていることを特徴とする半導体装置。 - デバイスが設けられたセル領域と、前記セル領域の周囲に設けられた終端領域とを有する半導体基板と、
前記終端領域において前記半導体基板の上に設けられ、複数の開口を有する第1の絶縁膜と、
前記終端領域に設けられ、前記複数の開口を介して前記半導体基板に接続された複数の金属電極と、
前記複数の金属電極のうち少なくとも最外周の電極に対応する前記開口の側壁に設けられ、前記第1の絶縁膜よりも吸湿率の低い第2の絶縁膜とを備えることを特徴とする半導体装置。 - デバイスが設けられたセル領域と、前記セル領域の周囲に設けられた終端領域とを有する半導体基板と、
前記終端領域において前記半導体基板の上に設けられ、複数の開口を有する第1の絶縁膜と、
前記終端領域に設けられ、前記複数の開口を介して前記半導体基板に接続された複数の金属電極と、
前記第1の絶縁膜及び前記複数の金属電極を覆い、前記第1の絶縁膜よりも吸湿率の低い第2の絶縁膜と、
前記第1の絶縁膜よりも吸湿率が高い第3の絶縁膜とを備え、
前記第3の絶縁膜は、前記第2の絶縁膜の上に設けられた第1の部分と、前記複数の金属電極のうち最外周の電極から前記半導体基板の端部までの領域に設けられ、前記第1の部分とは分離され、前記第1の絶縁膜に前記第2の絶縁膜を介さずに直接的に接する第2の部分とを有することを特徴とする半導体装置。 - 前記終端領域において前記半導体基板の表面にp型ガードリング層が設けられ、前記p型ガードリング層よりも外側で前記半導体基板の表面にn型チャネルストッパ層が設けられ、
前記複数の金属電極は、前記p型ガードリング層に接続されたガードリング電極と、前記最外周の電極であり前記n型チャネルストッパ層に接続されたチャネルストッパ電極とを有することを特徴とする請求項1~3の何れか1項に記載の半導体装置。 - 前記半導体基板はワイドバンドギャップ半導体によって形成されていることを特徴とする請求項1~4の何れか1項に記載の半導体装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018060389A JP7052476B2 (ja) | 2018-03-27 | 2018-03-27 | 半導体装置 |
US16/162,513 US10686068B2 (en) | 2018-03-27 | 2018-10-17 | Semiconductor device having termination region with insulator having low coefficient of moisture absorption |
DE102019201936.6A DE102019201936A1 (de) | 2018-03-27 | 2019-02-14 | Halbleitervorrichtung |
CN201910222300.7A CN110310927B (zh) | 2018-03-27 | 2019-03-22 | 半导体装置 |
US16/849,937 US10892363B2 (en) | 2018-03-27 | 2020-04-15 | Semiconductor device having termination region with insulator films having different coefficients of moisture absorption |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018060389A JP7052476B2 (ja) | 2018-03-27 | 2018-03-27 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2019175937A JP2019175937A (ja) | 2019-10-10 |
JP7052476B2 true JP7052476B2 (ja) | 2022-04-12 |
Family
ID=67910332
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018060389A Active JP7052476B2 (ja) | 2018-03-27 | 2018-03-27 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (2) | US10686068B2 (ja) |
JP (1) | JP7052476B2 (ja) |
CN (1) | CN110310927B (ja) |
DE (1) | DE102019201936A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3823034A1 (en) * | 2019-11-12 | 2021-05-19 | Infineon Technologies AG | High voltage semiconductor device with step topography passivation layer stack |
JP7537099B2 (ja) * | 2020-02-28 | 2024-08-21 | 富士電機株式会社 | 半導体装置 |
JP7334678B2 (ja) * | 2020-06-04 | 2023-08-29 | 三菱電機株式会社 | 半導体装置 |
US11600724B2 (en) * | 2020-09-24 | 2023-03-07 | Wolfspeed, Inc. | Edge termination structures for semiconductor devices |
JP7487094B2 (ja) * | 2020-12-23 | 2024-05-20 | 株式会社 日立パワーデバイス | 半導体装置 |
JP2023035433A (ja) | 2021-09-01 | 2023-03-13 | 三菱電機株式会社 | 半導体装置、半導体装置の製造方法、および電力変換装置 |
CN116646384B (zh) * | 2023-07-27 | 2024-03-26 | 深圳芯能半导体技术有限公司 | 一种具沟槽场截止结构的igbt芯片及其制作方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008053559A (ja) | 2006-08-25 | 2008-03-06 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP2016120999A (ja) | 2014-12-25 | 2016-07-07 | 株式会社椿本チエイン | 搬送装置 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100314133B1 (ko) * | 1999-11-26 | 2001-11-15 | 윤종용 | 가장자리에 흡습방지막이 형성된 반도체 칩 및 이흡습방지막의 형성방법 |
JP4710224B2 (ja) | 2003-12-24 | 2011-06-29 | ソニー株式会社 | 電界効果型トランジスタ及びその製造方法 |
JP5925991B2 (ja) * | 2010-05-26 | 2016-05-25 | 三菱電機株式会社 | 半導体装置 |
JP5765251B2 (ja) * | 2012-01-24 | 2015-08-19 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
CN105940496B (zh) * | 2014-01-29 | 2019-06-18 | 三菱电机株式会社 | 电力用半导体装置 |
KR101917486B1 (ko) * | 2014-01-29 | 2018-11-09 | 미쓰비시덴키 가부시키가이샤 | 전력용 반도체 장치 |
WO2016120999A1 (ja) * | 2015-01-27 | 2016-08-04 | 三菱電機株式会社 | 半導体装置 |
US9576791B2 (en) * | 2015-06-01 | 2017-02-21 | GM Global Technology Operations LLC | Semiconductor devices including semiconductor structures and methods of fabricating the same |
JP6575398B2 (ja) * | 2016-03-01 | 2019-09-18 | 三菱電機株式会社 | 半導体装置 |
JP6754120B2 (ja) | 2016-10-06 | 2020-09-09 | アイラボ株式会社 | プログラム、情報記憶媒体及び文字分割装置 |
-
2018
- 2018-03-27 JP JP2018060389A patent/JP7052476B2/ja active Active
- 2018-10-17 US US16/162,513 patent/US10686068B2/en active Active
-
2019
- 2019-02-14 DE DE102019201936.6A patent/DE102019201936A1/de active Pending
- 2019-03-22 CN CN201910222300.7A patent/CN110310927B/zh active Active
-
2020
- 2020-04-15 US US16/849,937 patent/US10892363B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008053559A (ja) | 2006-08-25 | 2008-03-06 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP2016120999A (ja) | 2014-12-25 | 2016-07-07 | 株式会社椿本チエイン | 搬送装置 |
Also Published As
Publication number | Publication date |
---|---|
CN110310927B (zh) | 2023-07-14 |
CN110310927A (zh) | 2019-10-08 |
US20190305140A1 (en) | 2019-10-03 |
US10686068B2 (en) | 2020-06-16 |
JP2019175937A (ja) | 2019-10-10 |
US10892363B2 (en) | 2021-01-12 |
DE102019201936A1 (de) | 2019-10-02 |
US20200243680A1 (en) | 2020-07-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7052476B2 (ja) | 半導体装置 | |
JP5590053B2 (ja) | 半導体装置 | |
JP6873865B2 (ja) | パワー半導体デバイスおよびこのようなパワー半導体デバイスの製造方法 | |
CN103943680B (zh) | 半导体装置 | |
US10978367B2 (en) | Semiconductor device and method for manufacturing the same | |
US8294244B2 (en) | Semiconductor device having an enlarged emitter electrode | |
KR100764363B1 (ko) | 반도체 장치 및 그 제조 방법 | |
JP2012134198A (ja) | 半導体装置およびその製造方法 | |
US11842938B2 (en) | Semiconductor device and method for forming a semiconductor device | |
US11371891B2 (en) | Semiconductor device, semiconductor package, semiconductor module, and semiconductor circuit device | |
US9991212B2 (en) | Semiconductor device | |
JP7258124B2 (ja) | 半導体装置および半導体モジュール | |
JP2022159154A (ja) | パワー半導体デバイス、パッケージ構造および電子デバイス | |
JP2010287786A (ja) | 半導体装置 | |
JP6736902B2 (ja) | 半導体装置の製造方法 | |
JP2021128962A (ja) | 半導体モジュール | |
JP7158160B2 (ja) | 半導体装置 | |
WO2020105097A1 (ja) | 半導体装置 | |
JP2007305906A (ja) | ダイオード | |
JP6133611B2 (ja) | 半導体装置 | |
WO2024053151A1 (ja) | 半導体装置およびその製造方法 | |
US20230106733A1 (en) | Semiconductor device and method for manufacturing semiconductor device | |
US10236246B2 (en) | Semiconductor devices and methods for forming a semiconductor device | |
JP2021114540A (ja) | 半導体装置およびクラック検出方法 | |
JP2006005213A (ja) | 半導体装置の製造方法及び半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20200701 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20210831 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20210906 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20211115 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20220301 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20220314 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7052476 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |