JP7032148B2 - 配線基板及びその製造方法と電子部品装置 - Google Patents

配線基板及びその製造方法と電子部品装置 Download PDF

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Publication number
JP7032148B2
JP7032148B2 JP2018005651A JP2018005651A JP7032148B2 JP 7032148 B2 JP7032148 B2 JP 7032148B2 JP 2018005651 A JP2018005651 A JP 2018005651A JP 2018005651 A JP2018005651 A JP 2018005651A JP 7032148 B2 JP7032148 B2 JP 7032148B2
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Prior art keywords
layer
metal
plating layer
metal plating
wiring board
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JP2018005651A
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JP2019125709A (ja
JP2019125709A5 (https=
Inventor
朋幸 下平
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2018005651A priority Critical patent/JP7032148B2/ja
Priority to US16/243,199 priority patent/US10643934B2/en
Publication of JP2019125709A publication Critical patent/JP2019125709A/ja
Publication of JP2019125709A5 publication Critical patent/JP2019125709A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/66—Conductive materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/692—Ceramics or glasses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/127—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H10W70/655—Fan-out layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
JP2018005651A 2018-01-17 2018-01-17 配線基板及びその製造方法と電子部品装置 Active JP7032148B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2018005651A JP7032148B2 (ja) 2018-01-17 2018-01-17 配線基板及びその製造方法と電子部品装置
US16/243,199 US10643934B2 (en) 2018-01-17 2019-01-09 Wiring substrate and electronic component device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2018005651A JP7032148B2 (ja) 2018-01-17 2018-01-17 配線基板及びその製造方法と電子部品装置

Publications (3)

Publication Number Publication Date
JP2019125709A JP2019125709A (ja) 2019-07-25
JP2019125709A5 JP2019125709A5 (https=) 2020-12-24
JP7032148B2 true JP7032148B2 (ja) 2022-03-08

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JP (1) JP7032148B2 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7279624B2 (ja) * 2019-11-27 2023-05-23 株式会社ソシオネクスト 半導体装置
JP7760246B2 (ja) 2021-01-13 2025-10-27 新光電気工業株式会社 配線基板及び配線基板の製造方法
WO2023026984A1 (ja) * 2021-08-26 2023-03-02 ローム株式会社 電子部品
CN115835472A (zh) * 2021-09-16 2023-03-21 Lg伊诺特有限公司 电路板、透镜驱动装置及包括其的相机模块

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005175128A (ja) 2003-12-10 2005-06-30 Fujitsu Ltd 半導体装置及びその製造方法
JP2008135445A (ja) 2006-11-27 2008-06-12 Shinko Electric Ind Co Ltd 配線構造及び配線層の形成方法
JP2013077726A (ja) 2011-09-30 2013-04-25 Toppan Printing Co Ltd 半導体パッケージの製造方法
JP2014154800A (ja) 2013-02-13 2014-08-25 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
JP2014179362A (ja) 2013-03-13 2014-09-25 Ps4 Luxco S A R L 半導体装置
JP2015162660A (ja) 2014-02-28 2015-09-07 イビデン株式会社 プリント配線板、プリント配線板の製造方法、パッケージ−オン−パッケージ
JP2017212271A (ja) 2016-05-24 2017-11-30 新光電気工業株式会社 配線基板及びその製造方法と電子部品装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63153889A (ja) * 1986-12-17 1988-06-27 日立プラント建設株式会社 プリント基板のパタ−ン形成方法
JP4769056B2 (ja) 2005-10-07 2011-09-07 日本特殊陶業株式会社 配線基板及びその製法方法
CN101785103B (zh) * 2007-07-05 2011-12-28 Aac微技术有限公司 低阻抗晶圆穿孔
JP2015076465A (ja) * 2013-10-08 2015-04-20 イビデン株式会社 プリント配線板、プリント配線板の製造方法、パッケージ−オン−パッケージ
JP6375159B2 (ja) * 2014-07-07 2018-08-15 新光電気工業株式会社 配線基板、半導体パッケージ
US9564359B2 (en) * 2014-07-17 2017-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive structure and method of forming the same
JP6510897B2 (ja) * 2015-06-09 2019-05-08 新光電気工業株式会社 配線基板及びその製造方法と電子部品装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005175128A (ja) 2003-12-10 2005-06-30 Fujitsu Ltd 半導体装置及びその製造方法
JP2008135445A (ja) 2006-11-27 2008-06-12 Shinko Electric Ind Co Ltd 配線構造及び配線層の形成方法
JP2013077726A (ja) 2011-09-30 2013-04-25 Toppan Printing Co Ltd 半導体パッケージの製造方法
JP2014154800A (ja) 2013-02-13 2014-08-25 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
JP2014179362A (ja) 2013-03-13 2014-09-25 Ps4 Luxco S A R L 半導体装置
JP2015162660A (ja) 2014-02-28 2015-09-07 イビデン株式会社 プリント配線板、プリント配線板の製造方法、パッケージ−オン−パッケージ
JP2017212271A (ja) 2016-05-24 2017-11-30 新光電気工業株式会社 配線基板及びその製造方法と電子部品装置

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JP2019125709A (ja) 2019-07-25
US10643934B2 (en) 2020-05-05
US20190221508A1 (en) 2019-07-18

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