JP6981629B2 - 半導体構造用の支持体 - Google Patents

半導体構造用の支持体 Download PDF

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Publication number
JP6981629B2
JP6981629B2 JP2018544865A JP2018544865A JP6981629B2 JP 6981629 B2 JP6981629 B2 JP 6981629B2 JP 2018544865 A JP2018544865 A JP 2018544865A JP 2018544865 A JP2018544865 A JP 2018544865A JP 6981629 B2 JP6981629 B2 JP 6981629B2
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layer
support
silicon
semiconductor structure
carbon
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Japanese (ja)
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JP2019512870A5 (enExample
JP2019512870A (ja
Inventor
フィゲ クリストフ
コノンチュク オレグ
アルアサド カッサム
フェロー ガブリエル
スリール ベロニク
ヴェティズー クリステル
イェゴヤン タグヒ
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Centre National de la Recherche Scientifique CNRS
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Centre National de la Recherche Scientifique CNRS
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/02444—Carbon, e.g. diamond-like carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/02447—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02595—Microstructure polycrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Element Separation (AREA)
  • Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
  • Laminated Bodies (AREA)
  • Silicon Compounds (AREA)
JP2018544865A 2016-02-26 2017-02-23 半導体構造用の支持体 Active JP6981629B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR1651642 2016-02-26
FR1651642A FR3048306B1 (fr) 2016-02-26 2016-02-26 Support pour une structure semi-conductrice
PCT/FR2017/050400 WO2017144821A1 (fr) 2016-02-26 2017-02-23 Support pour une structure semi-conductrice

Publications (3)

Publication Number Publication Date
JP2019512870A JP2019512870A (ja) 2019-05-16
JP2019512870A5 JP2019512870A5 (enExample) 2020-04-09
JP6981629B2 true JP6981629B2 (ja) 2021-12-15

Family

ID=55650590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018544865A Active JP6981629B2 (ja) 2016-02-26 2017-02-23 半導体構造用の支持体

Country Status (9)

Country Link
US (1) US11251265B2 (enExample)
EP (1) EP3420583B1 (enExample)
JP (1) JP6981629B2 (enExample)
KR (1) KR102687932B1 (enExample)
CN (1) CN109155276B (enExample)
FR (1) FR3048306B1 (enExample)
SG (2) SG11201807197PA (enExample)
TW (1) TWI787172B (enExample)
WO (1) WO2017144821A1 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102109292B1 (ko) * 2016-04-05 2020-05-11 가부시키가이샤 사이콕스 다결정 ＳｉＣ 기판 및 그 제조방법
FR3068506B1 (fr) 2017-06-30 2020-02-21 Soitec Procede pour preparer un support pour une structure semi-conductrice
EP4557350A3 (fr) * 2018-07-05 2025-08-20 Soitec Substrat pour un dispositif intégré radiofréquence et son procédé de fabrication
FR3091011B1 (fr) * 2018-12-21 2022-08-05 Soitec Silicon On Insulator Substrat de type semi-conducteur sur isolant pour des applications radiofréquences
FR3104318B1 (fr) 2019-12-05 2023-03-03 Soitec Silicon On Insulator Procédé de formation d'un support de manipulation à haute résistivité pour substrat composite
FR3110283B1 (fr) * 2020-05-18 2022-04-15 Soitec Silicon On Insulator Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences
JP2021190660A (ja) * 2020-06-04 2021-12-13 株式会社Sumco 貼り合わせウェーハ用の支持基板
CN111979524B (zh) * 2020-08-19 2021-12-14 福建省晋华集成电路有限公司 一种多晶硅层形成方法、多晶硅层以及半导体结构
FR3116151A1 (fr) 2020-11-10 2022-05-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de formation d’une structure de piegeage d’un substrat utile
FR3117668B1 (fr) 2020-12-16 2022-12-23 Commissariat Energie Atomique Structure amelioree de substrat rf et procede de realisation
FR3134239B1 (fr) * 2022-03-30 2025-02-14 Soitec Silicon On Insulator Substrat piézoélectrique sur isolant (POI) et procédé de fabrication d’un substrat piézoélectrique sur isolant (POI)
US20240030222A1 (en) * 2022-07-20 2024-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Trapping layer for a radio frequency die and methods of formation
WO2024115411A1 (fr) 2022-11-29 2024-06-06 Soitec Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes
WO2024115410A1 (fr) 2022-11-29 2024-06-06 Soitec Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes.
WO2024115414A1 (fr) 2022-11-29 2024-06-06 Soitec Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes
FR3146020B1 (fr) 2023-02-20 2025-07-18 Soitec Silicon On Insulator Support comprenant une couche de piégeage de charges, substrat composite comprenant un tel support et procédé de fabrication associés

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0864851A (ja) 1994-06-14 1996-03-08 Sanyo Electric Co Ltd 光起電力素子及びその製造方法
JP2907128B2 (ja) * 1996-07-01 1999-06-21 日本電気株式会社 電界効果型トランジスタ及びその製造方法
CN1856873A (zh) * 2003-09-26 2006-11-01 卢万天主教大学 制造具有降低的欧姆损耗的多层半导体结构的方法
US7202124B2 (en) * 2004-10-01 2007-04-10 Massachusetts Institute Of Technology Strained gettering layers for semiconductor processes
WO2009004889A1 (ja) * 2007-07-04 2009-01-08 Shin-Etsu Handotai Co., Ltd. 薄膜シリコンウェーハ及びその作製法
FR2953640B1 (fr) * 2009-12-04 2012-02-10 S O I Tec Silicon On Insulator Tech Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante
US8536021B2 (en) * 2010-12-24 2013-09-17 Io Semiconductor, Inc. Trap rich layer formation techniques for semiconductor devices
FR2973158B1 (fr) * 2011-03-22 2014-02-28 Soitec Silicon On Insulator Procédé de fabrication d'un substrat de type semi-conducteur sur isolant pour applications radiofréquences
US8741739B2 (en) * 2012-01-03 2014-06-03 International Business Machines Corporation High resistivity silicon-on-insulator substrate and method of forming
FR2999801B1 (fr) * 2012-12-14 2014-12-26 Soitec Silicon On Insulator Procede de fabrication d'une structure
JP5978986B2 (ja) * 2012-12-26 2016-08-24 信越半導体株式会社 高周波半導体装置及び高周波半導体装置の製造方法
US8951896B2 (en) * 2013-06-28 2015-02-10 International Business Machines Corporation High linearity SOI wafer for low-distortion circuit applications
US9768056B2 (en) * 2013-10-31 2017-09-19 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition
US9853133B2 (en) * 2014-09-04 2017-12-26 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
WO2017142849A1 (en) * 2016-02-19 2017-08-24 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a buried high resistivity layer
CN108022934A (zh) * 2016-11-01 2018-05-11 沈阳硅基科技有限公司 一种薄膜的制备方法
US10468486B2 (en) * 2017-10-30 2019-11-05 Taiwan Semiconductor Manufacturing Company Ltd. SOI substrate, semiconductor device and method for manufacturing the same

Also Published As

Publication number Publication date
US11251265B2 (en) 2022-02-15
JP2019512870A (ja) 2019-05-16
SG10201913216XA (en) 2020-02-27
CN109155276B (zh) 2023-01-17
KR20190013696A (ko) 2019-02-11
EP3420583A1 (fr) 2019-01-02
TW201742108A (zh) 2017-12-01
FR3048306B1 (fr) 2018-03-16
CN109155276A (zh) 2019-01-04
KR102687932B1 (ko) 2024-07-25
SG11201807197PA (en) 2018-09-27
FR3048306A1 (fr) 2017-09-01
US20190058031A1 (en) 2019-02-21
WO2017144821A1 (fr) 2017-08-31
EP3420583B1 (fr) 2021-08-04
TWI787172B (zh) 2022-12-21

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