SG11201807197PA - Support for a semiconductor structure - Google Patents
Support for a semiconductor structureInfo
- Publication number
- SG11201807197PA SG11201807197PA SG11201807197PA SG11201807197PA SG11201807197PA SG 11201807197P A SG11201807197P A SG 11201807197PA SG 11201807197P A SG11201807197P A SG 11201807197PA SG 11201807197P A SG11201807197P A SG 11201807197PA SG 11201807197P A SG11201807197P A SG 11201807197PA
- Authority
- SG
- Singapore
- Prior art keywords
- layer
- support
- semiconductor structure
- base substrate
- polycrystalline
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- 229910001339 C alloy Inorganic materials 0.000 abstract 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract 1
- 229910000676 Si alloy Inorganic materials 0.000 abstract 1
- 229910052799 carbon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/02444—Carbon, e.g. diamond-like carbon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/02447—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
- H01L21/02507—Alternating layers, e.g. superlattice
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Laminated Bodies (AREA)
- Silicon Compounds (AREA)
- Element Separation (AREA)
- Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
Abstract
SUPPORT FOR A SEMICONDUCTOR STRUCTURE The invention relates to a support (1) for a semiconductor structure comprising a charge-trapping layer (2) on a base substrate (3). The trapping layer (2) consists of a polycrystalline main layer (2a) and, interposed in the main layer (2a) or between the main layer (2a) and the base substrate (3), at least one intermediate polycrystalline layer (2b) composed of a silicon and carbon alloy or carbon, the intermediate layer (2b) having a resistivity greater than 1000 ohm.cm. Figure 1
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1651642A FR3048306B1 (en) | 2016-02-26 | 2016-02-26 | SUPPORT FOR A SEMICONDUCTOR STRUCTURE |
PCT/FR2017/050400 WO2017144821A1 (en) | 2016-02-26 | 2017-02-23 | Carrier for a semiconductor structure |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201807197PA true SG11201807197PA (en) | 2018-09-27 |
Family
ID=55650590
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201807197PA SG11201807197PA (en) | 2016-02-26 | 2017-02-23 | Support for a semiconductor structure |
SG10201913216XA SG10201913216XA (en) | 2016-02-26 | 2017-02-23 | Support for a semiconductor structure |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201913216XA SG10201913216XA (en) | 2016-02-26 | 2017-02-23 | Support for a semiconductor structure |
Country Status (9)
Country | Link |
---|---|
US (1) | US11251265B2 (en) |
EP (1) | EP3420583B1 (en) |
JP (1) | JP6981629B2 (en) |
KR (1) | KR20190013696A (en) |
CN (1) | CN109155276B (en) |
FR (1) | FR3048306B1 (en) |
SG (2) | SG11201807197PA (en) |
TW (1) | TWI787172B (en) |
WO (1) | WO2017144821A1 (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102109292B1 (en) * | 2016-04-05 | 2020-05-11 | 가부시키가이샤 사이콕스 | Polycrystalline SiC substrate and its manufacturing method |
WO2020008116A1 (en) * | 2018-07-05 | 2020-01-09 | Soitec | Substrate for an integrated radiofrequency device, and process for manufacturing same |
FR3091011B1 (en) * | 2018-12-21 | 2022-08-05 | Soitec Silicon On Insulator | SEMICONDUCTOR SUBSTRATE ON INSULATION FOR RADIO FREQUENCY APPLICATIONS |
FR3104318B1 (en) | 2019-12-05 | 2023-03-03 | Soitec Silicon On Insulator | METHOD FOR FORMING A HIGH STRENGTH HANDLING SUPPORT FOR COMPOSITE SUBSTRATE |
JP2021190660A (en) * | 2020-06-04 | 2021-12-13 | 株式会社Sumco | Support substrate for bonded wafers |
CN111979524B (en) * | 2020-08-19 | 2021-12-14 | 福建省晋华集成电路有限公司 | Polycrystalline silicon layer forming method, polycrystalline silicon layer and semiconductor structure |
FR3116151A1 (en) | 2020-11-10 | 2022-05-13 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | METHOD FOR FORMING A USEFUL SUBSTRATE TRAPPING STRUCTURE |
FR3117668B1 (en) | 2020-12-16 | 2022-12-23 | Commissariat Energie Atomique | IMPROVED RF SUBSTRATE STRUCTURE AND METHOD OF MAKING |
FR3134239A1 (en) * | 2022-03-30 | 2023-10-06 | Soitec | Piezoelectric substrate on insulator (POI) and method of manufacturing a piezoelectric substrate on insulator (POI) |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0864851A (en) | 1994-06-14 | 1996-03-08 | Sanyo Electric Co Ltd | Photovoltaic element and fabrication thereof |
JP2907128B2 (en) * | 1996-07-01 | 1999-06-21 | 日本電気株式会社 | Field effect transistor and method for manufacturing the same |
US20070032040A1 (en) * | 2003-09-26 | 2007-02-08 | Dimitri Lederer | Method of manufacturing a multilayer semiconductor structure with reduced ohmic losses |
US7202124B2 (en) * | 2004-10-01 | 2007-04-10 | Massachusetts Institute Of Technology | Strained gettering layers for semiconductor processes |
WO2009004889A1 (en) * | 2007-07-04 | 2009-01-08 | Shin-Etsu Handotai Co., Ltd. | Thin film silicon wafer and its fabricating method |
FR2953640B1 (en) * | 2009-12-04 | 2012-02-10 | S O I Tec Silicon On Insulator Tech | METHOD FOR MANUFACTURING A SEMICONDUCTOR TYPE STRUCTURE ON INSULATION, WITH REDUCED ELECTRICAL LOSSES AND CORRESPONDING STRUCTURE |
US8536021B2 (en) * | 2010-12-24 | 2013-09-17 | Io Semiconductor, Inc. | Trap rich layer formation techniques for semiconductor devices |
US8741739B2 (en) * | 2012-01-03 | 2014-06-03 | International Business Machines Corporation | High resistivity silicon-on-insulator substrate and method of forming |
FR2999801B1 (en) * | 2012-12-14 | 2014-12-26 | Soitec Silicon On Insulator | METHOD FOR MANUFACTURING A STRUCTURE |
US8951896B2 (en) * | 2013-06-28 | 2015-02-10 | International Business Machines Corporation | High linearity SOI wafer for low-distortion circuit applications |
US9768056B2 (en) * | 2013-10-31 | 2017-09-19 | Sunedison Semiconductor Limited (Uen201334164H) | Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition |
US9853133B2 (en) * | 2014-09-04 | 2017-12-26 | Sunedison Semiconductor Limited (Uen201334164H) | Method of manufacturing high resistivity silicon-on-insulator substrate |
WO2017142849A1 (en) * | 2016-02-19 | 2017-08-24 | Sunedison Semiconductor Limited | Semiconductor on insulator structure comprising a buried high resistivity layer |
CN108022934A (en) * | 2016-11-01 | 2018-05-11 | 沈阳硅基科技有限公司 | A kind of preparation method of film |
US10468486B2 (en) * | 2017-10-30 | 2019-11-05 | Taiwan Semiconductor Manufacturing Company Ltd. | SOI substrate, semiconductor device and method for manufacturing the same |
-
2016
- 2016-02-26 FR FR1651642A patent/FR3048306B1/en active Active
-
2017
- 2017-02-23 JP JP2018544865A patent/JP6981629B2/en active Active
- 2017-02-23 EP EP17710350.4A patent/EP3420583B1/en active Active
- 2017-02-23 US US16/080,279 patent/US11251265B2/en active Active
- 2017-02-23 SG SG11201807197PA patent/SG11201807197PA/en unknown
- 2017-02-23 CN CN201780013336.3A patent/CN109155276B/en active Active
- 2017-02-23 WO PCT/FR2017/050400 patent/WO2017144821A1/en active Application Filing
- 2017-02-23 SG SG10201913216XA patent/SG10201913216XA/en unknown
- 2017-02-23 KR KR1020187025017A patent/KR20190013696A/en not_active Application Discontinuation
- 2017-02-24 TW TW106106332A patent/TWI787172B/en active
Also Published As
Publication number | Publication date |
---|---|
EP3420583B1 (en) | 2021-08-04 |
TW201742108A (en) | 2017-12-01 |
US11251265B2 (en) | 2022-02-15 |
FR3048306A1 (en) | 2017-09-01 |
JP2019512870A (en) | 2019-05-16 |
SG10201913216XA (en) | 2020-02-27 |
EP3420583A1 (en) | 2019-01-02 |
FR3048306B1 (en) | 2018-03-16 |
JP6981629B2 (en) | 2021-12-15 |
WO2017144821A1 (en) | 2017-08-31 |
US20190058031A1 (en) | 2019-02-21 |
CN109155276A (en) | 2019-01-04 |
KR20190013696A (en) | 2019-02-11 |
TWI787172B (en) | 2022-12-21 |
CN109155276B (en) | 2023-01-17 |
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