JP6689355B2 - 薄膜トランジスタ、その製造方法及びこれを含む表示装置 - Google Patents
薄膜トランジスタ、その製造方法及びこれを含む表示装置 Download PDFInfo
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- JP6689355B2 JP6689355B2 JP2018227777A JP2018227777A JP6689355B2 JP 6689355 B2 JP6689355 B2 JP 6689355B2 JP 2018227777 A JP2018227777 A JP 2018227777A JP 2018227777 A JP2018227777 A JP 2018227777A JP 6689355 B2 JP6689355 B2 JP 6689355B2
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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- H01L29/772—Field effect transistors
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- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
- H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/772—Field effect transistors
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- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
- G02F1/13685—Top gates
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- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
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Description
図10に示す形態で、比較例1の薄膜トランジスタを製造した。詳細には、ガラスかなる基板110上に15nm厚および12μmの長さを有する酸化物半導体層130を形成した。酸化物半導体層130は、原子数基準で1:1:1の比率でインジウム(In)、ガリウム(Ga)および亜鉛(Zn)を含む。その後、酸化物半導体層130上にシリコン窒化物からなるゲート絶縁膜120およびMo/Tiの合金からなる100nm厚のゲート電極140を形成し、その上にシリコン酸化物からなる層間絶縁膜170を形成した。その後、Mo/Ti合金を用いて100nmの厚さのソース電極150とドレイン電極160を形成して比較例1の薄膜トランジスタを製造した。
比較例1と同様に、ただし、薄膜トランジスタの酸化物半導体層130の厚さを30nmにして比較例2の薄膜トランジスタを製造し、薄膜トランジスタの酸化物半導体層130の厚さを50nmにして比較例3の薄膜トランジスタを製造した。
110:基板
120:ゲート絶縁膜
130:酸化物半導体層
131:チャネル部
132:第1チャネル接続部
133:第2チャネル接続部
140:ゲート電極
150:ソース電極
160:ドレイン電極
170:層間絶縁膜
180:光遮断層
190:平坦化膜
250:バンク層
270:有機発光素子
271、381:第1電極
272:有機層
273、383:第2電極
310:対向基板
341、342:カラーフィルタ
350:遮光部
382:液晶層
500、600:表示装置
Claims (20)
- 基板上の酸化物半導体層であって、チャネル部、前記チャネル部の第1末端部と接続した第1チャネル接続部、及び前記チャネル部の第1末端部と対向する前記チャネル部の第2末端部と接続した第2チャネル接続部を含む酸化物半導体層、
前記酸化物半導体層の前記チャネル部上のゲート絶縁膜、
前記ゲート絶縁膜上のゲート電極、
前記第1チャネル接続部と接続したソース電極、および
前記ソース電極と離隔して前記第2チャネル接続部と接続したドレイン電極、を含み、
前記第2チャネル接続部の厚さは、前記第1チャネル接続部の厚さと異なり、前記チャネル部の第2末端部は、前記第2チャネル接続部と同じ厚さを有し、前記チャネル部の前記第1チャネル接続部側の導体化浸透長より前記第2チャネル接続部側の導体化浸透長が長い、薄膜トランジスタ。 - 前記第2チャネル接続部の厚さが、前記第1チャネル接続部の厚さの1.3〜1.7倍である、請求項1に記載の薄膜トランジスタ。
- 前記チャネル部の第2末端部のうちの少なくとも一部が、前記第2チャネル接続部と同じ厚さを有する、請求項1に記載の薄膜トランジスタ。
- 前記チャネル部の第2末端部のうち前記第2チャネル接続部と同じ厚さを有する部分の長さが、前記チャネル部全体の長さの5〜20%である、請求項3に記載の薄膜トランジスタ。
- 前記チャネル部の第1末端部が、前記第1チャネル接続部と同じ厚さを有する、請求項3に記載の薄膜トランジスタ。
- 前記第1チャネル接続部の厚さが、前記第2チャネル接続部の厚さよりも薄い、請求項5に記載の薄膜トランジスタ。
- 前記チャネル部の第1末端部と前記チャネル部の第2末端部間に位置する前記チャネル部の一部が、前記第1チャネル接続部の厚さよりも厚く、前記第2チャネル接続部の厚さよりも薄い厚さを有する、請求項1に記載の薄膜トランジスタ。
- 前記第1チャネル接続部の厚さが、前記チャネル部の第1末端部と前記チャネル部の第2末端部間に位置する前記チャネル部の前記一部の厚さの0.3〜0.9倍である、請求項7に記載の薄膜トランジスタ。
- 前記チャネル部の第1末端部が、前記第1チャネル接続部と同じ厚さを有する、請求項8に記載の薄膜トランジスタ。
- 前記チャネル部の第1末端部のうち、前記第1チャネル接続部と同じ厚さを有する部分の長さが、前記チャネル部全体の長さの5〜15%である、請求項9に記載の薄膜トランジスタ。
- 基板上に酸化物半導体層を形成する工程であって、前記酸化物半導体層が、チャネル部、前記チャネル部の第1末端部と接続した第1チャネル接続部、及び前記チャネル部の第1末端部と対向する前記チャネル部の第2末端部と接続した第2チャネル接続部を含むように形成する工程と、
前記酸化物半導体層の前記チャネル部上にゲート絶縁膜を形成する工程、
前記ゲート絶縁膜上にゲート電極を形成する工程、
前記第1チャネル接続部に接続したソース電極を形成する工程、および
前記ソース電極と離隔して前記第2チャネル接続部に接続したドレイン電極を形成する工程、とを含み、
前記第2チャネル接続部の厚さが、前記第1チャネル接続部の厚さと異なり、前記チャネル部の第2末端部は、前記第2チャネル接続部と同じ厚さを有するように形成され、前記第1チャネル接続部及び前記第2チャネル接続部の導体化において、前記チャネル部の前記第1チャネル接続部側の導体化浸透長より前記第2チャネル接続部側の導体化浸透長が長くなる、薄膜トランジスタの製造方法。 - 複数の画素を有する表示パネルを含んだ表示装置であって、
各画素が、基板上に配置された少なくとも一つの薄膜トランジスタを含み、
前記少なくとも一つの薄膜トランジスタは、
前記基板上の酸化物半導体層であって、チャネル部、前記チャネル部の第1末端部と接続した第1チャネル接続部、及び前記チャネル部の第1末端部と対向する前記チャネル部の第2末端部と接続した第2チャネル接続部を含む酸化物半導体層、
前記酸化物半導体層の前記チャネル部上のゲート絶縁膜、
前記ゲート絶縁膜上のゲート電極、
前記第1チャネル接続部と接続したソース電極、および
前記ソース電極と離隔して前記第2チャネル接続部と接続したドレイン電極、を含み、
前記第2チャネル接続部の厚さが、前記第1チャネル接続部の厚さと異なり、前記チャネル部の第2末端部は、前記第2チャネル接続部と同じ厚さを有し、前記チャネル部の前記第1チャネル接続部側の導体化浸透長より前記第2チャネル接続部側の導体化浸透長が長い、表示装置。 - 前記表示パネルが、有機発光素子表示パネルまたは液晶表示パネルを含む、請求項12に記載の表示装置。
- 前記第2チャネル接続部の厚さが、前記第1チャネル接続部の厚さの1.3〜1.7倍である、請求項12に記載の表示装置。
- 前記チャネル部の第2末端部のうちの少なくとも一部が、前記第2チャネル接続部と同じ厚さを有する、請求項12に記載の表示装置。
- 前記チャネル部の第2末端部のうち前記第2チャネル接続部と同じ厚さを有する部分の長さが、前記チャネル部全体の長さの5〜20%である、請求項15に記載の表示装置。
- 前記チャネル部の第1末端部が、前記第1チャネル接続部と同じ厚さを有する、請求項15に記載の表示装置。
- 前記第1チャネル接続部の厚さが、前記第2チャネル接続部の厚さよりも薄い、請求項17に記載の表示装置。
- 前記チャネル部の第1末端部と前記チャネル部の第2末端部間に位置する前記チャネル部の一部が、前記第1チャネル接続部の厚さよりも厚く、前記第2チャネル接続部の厚さよりも薄い厚さを有する、請求項12に記載の表示装置。
- 前記第1チャネル接続部の厚さが、前記チャネル部の第1末端部と前記チャネル部の第2末端部間に位置する前記チャネル部の前記一部の厚さの0.3〜0.9倍である、請求項19に記載の表示装置。
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