JP6608541B2 - 炭化珪素半導体装置 - Google Patents
炭化珪素半導体装置 Download PDFInfo
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- JP6608541B2 JP6608541B2 JP2018540551A JP2018540551A JP6608541B2 JP 6608541 B2 JP6608541 B2 JP 6608541B2 JP 2018540551 A JP2018540551 A JP 2018540551A JP 2018540551 A JP2018540551 A JP 2018540551A JP 6608541 B2 JP6608541 B2 JP 6608541B2
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims description 108
- 229910010271 silicon carbide Inorganic materials 0.000 title claims description 108
- 239000004065 semiconductor Substances 0.000 title claims description 97
- 239000012535 impurity Substances 0.000 claims description 92
- 239000010410 layer Substances 0.000 claims description 79
- 230000002093 peripheral effect Effects 0.000 claims description 75
- 239000000758 substrate Substances 0.000 claims description 31
- 239000011229 interlayer Substances 0.000 claims description 24
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 230000000149 penetrating effect Effects 0.000 claims description 3
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 229910052796 boron Inorganic materials 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
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- 229910052698 phosphorus Inorganic materials 0.000 description 2
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- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910005881 NiSi 2 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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- 150000004706 metal oxides Chemical class 0.000 description 1
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- 229910052760 oxygen Inorganic materials 0.000 description 1
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- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Description
「MOS」という用語は、古くは金属/酸化物/半導体の接合構造に用いられており、Metal-Oxide-Semiconductorの頭文字を採ったものとされている。しかしながら特にMOS構造を有する電界効果トランジスタ(以下、単に「MOSトランジスタ」と称す)においては、近年の集積化や製造プロセスの改善などの観点からゲート絶縁膜やゲート電極の材料が改善されている。
<装置構成>
図1は、本発明に係る実施の形態1の炭化珪素半導体装置、より具体的には、SiC基板上に形成されたMOS構造を有する電界効果トランジスタ(炭化珪素MOSFET)100の上面構成を模式的に示す平面図である。なお、炭化珪素MOSFET100はプレーナゲート型として説明するが、本発明の適用はプレーナゲート型に限定されず、また、半導体としては炭化珪素に限定されるものではなく、Si(珪素)で構成されるSi半導体装置に適用しても良いが、窒化ガリウム(GaN)、ダイヤモンド(C)などワイドバンドギャップ半導体で構成されるワイドバンドギャップ半導体装置に適用すると特に有効である。
以上説明した炭化珪素MOSFET100においては、図2に示したようにゲートパッド11が、ソース電極10およびソース配線13によって囲まれ、ゲートパッド11の4辺に沿うように複数のウェルコンタクトホール21がソース配線13およびソース電極10の下部に設けられた構成となっていた。
次に、炭化珪素MOSFET100の製造方法について、製造工程を順に示す断面図である図12〜図16を用いて説明する。
実施の形態1の炭化珪素MOSFET100においては、図3および図5に示したように、外周ウェル領域9の表面内に、ゲートパッド11の下方領域を囲むように外周コンタクト領域8が設けられた構成を有していたが、図17に示す実施の形態2の炭化珪素MOSFET200のように、ゲートパッド11の下方の外周ウェル領域9全体に外周コンタクト領域8を設けても良い。
図1に示した炭化珪素MOSFET100においては、ゲートパッド11の4辺のうち、炭化珪素MOSFET100の角部側の2辺に沿ってソース配線13が設けられ、ゲートパッド11が、実質的にソース電極10に囲まれた島状となっており、ソース電極10によってゲート配線12が分断され、ゲートパッド11に直接には接続されない構成となっていた。
以上説明した実施の形態1〜3においては、半導体デバイスが縦型のMOSFETである場合を開示しているが、例えば図22に示すように、n型のSiC基板1の裏面側主面にp型不純物を比較的高濃度(p+)に含むp型のSiC層30を設け、その上にドレイン電極20(コレクタ電極)を設ければ、IGBT(Insulated Gate Bipolar Transistor)を得ることができる。なお、p型のSiC層30の形成方法は、SiC基板1の前面側主面にドリフト層2を形成した後、SiC基板1の裏面側主面にp型不純物を比較的高濃度(p+)にイオン注入して形成しても良いし、SiC基板1の裏面側主面にエピタキシャル成長によりp型のSiC層30を形成した後、SiC基板1の前面側主面にエピタキシャル成長によりドリフト層2を形成しても良い。この場合、SiC層30を形成した後、SiC基板1の前面側主面をCMP(Chemical Mechanical Polishing)により研磨して、ドリフト層2を形成しても良い。
Claims (12)
- 炭化珪素の半導体基板と、
前記半導体基板上に配設された第1導電型の半導体層と、
前記半導体層の上層部に選択的に配設された第2導電型の第1の不純物領域と、
前記第1の不純物領域の上層部に選択的に配設された第1導電型の第2の不純物領域と、
前記第2の不純物領域、前記第1の不純物領域および前記半導体層に連続して接するように配設されたゲート絶縁膜と、
少なくとも前記ゲート絶縁膜を介して前記第2の不純物領域、前記第1の不純物領域および前記半導体層に対向する位置に配設されたゲート電極と、
前記第1および第2の不純物領域を含むユニットセルが配置されるセル配置領域の外周となる外周領域の前記半導体層の上層部に配設された、第2導電型の第3の不純物領域と、
前記外周領域の前記半導体層上に配設された前記ゲート絶縁膜よりも厚いフィールド絶縁膜と、
前記フィールド絶縁膜、前記ゲート電極および前記ゲート絶縁膜上に配設された層間絶縁膜と、
前記層間絶縁膜上に配設された第1の主電極と、
前記半導体基板の前記半導体層と反対側に配設された第2の主電極と、
互いに電気的に接続されたゲート配線およびゲートパッドと、を備え、
前記第3の不純物領域は、
その上層部に選択的に設けられ、前記第3の不純物領域よりも不純物濃度が高い第2導電型の第4の不純物領域を有し、
前記第4の不純物領域は、
前記ゲートパッドを囲むように設けられ前記層間絶縁膜および前記フィールド絶縁膜を貫通する複数のウェルコンタクトホールを介して前記第1の主電極と電気的に接続される、炭化珪素半導体装置。 - 炭化珪素の半導体基板と、
前記半導体基板上に配設された第1導電型の半導体層と、
前記半導体層の上層部に選択的に配設された第2導電型の第1の不純物領域と、
前記第1の不純物領域の上層部に選択的に配設された第1導電型の第2の不純物領域と、
前記第2の不純物領域、前記第1の不純物領域および前記半導体層に連続して接するように配設されたゲート絶縁膜と、
少なくとも前記ゲート絶縁膜を介して前記第2の不純物領域、前記第1の不純物領域および前記半導体層に対向する位置に配設されたゲート電極と、
前記第1および第2の不純物領域を含むユニットセルが配置されるセル配置領域の外周となる外周領域の前記半導体層の上層部に配設された、第2導電型の第3の不純物領域と、
前記外周領域の前記半導体層上に配設された前記ゲート絶縁膜よりも厚いフィールド絶縁膜と、
前記フィールド絶縁膜、前記ゲート電極および前記ゲート絶縁膜上に配設された層間絶縁膜と、
前記層間絶縁膜上に配設された第1の主電極と、
前記半導体基板の前記半導体層と反対側に配設された第2の主電極と、
互いに電気的に接続されたゲート配線およびゲートパッドと、を備え、
前記第1の主電極は、
平面視で前記ゲートパッドを囲むように設けられ、
前記第3の不純物領域は、
その上層部に選択的に設けられ、前記第3の不純物領域よりも不純物濃度が高い第2導電型の第4の不純物領域を有し、
前記第4の不純物領域は、
少なくとも前記ゲートパッドの下方の領域を囲むように設けられ、前記層間絶縁膜および前記フィールド絶縁膜を貫通する複数のウェルコンタクトホールを介して前記第1の主電極と電気的に接続される、炭化珪素半導体装置。 - 前記第1の主電極は、
前記セル配置領域の上方に配設されると共に、平面視で前記セル配置領域に対向しない前記ゲートパッドの辺に沿って設けられ、平面視で前記ゲートパッドを囲む、請求項1または請求項2記載の炭化珪素半導体装置。 - 前記第4の不純物領域は、
前記セル配置領域に沿うように連続して配設されると共に、前記ゲートパッドの下方の領域に沿うように連続して配設される、請求項1から請求項3のいずれか1項に記載の炭化珪素半導体装置。 - 前記第4の不純物領域は、
前記セル配置領域に沿うように連続して配設されると共に、前記ゲートパッドの下方に対応する領域とその周囲の領域に及ぶように平面的に配設される、請求項1から請求項3のいずれか1項に記載の炭化珪素半導体装置。 - 前記第4の不純物領域は、
前記セル配置領域に沿うように不連続で局所的に配設されると共に、前記ゲートパッドの下方の領域に沿うように不連続で局所的にして配設される、請求項1から請求項3のいずれか1項に記載の炭化珪素半導体装置。 - 前記複数のウェルコンタクトホールは、
前記ゲートパッドの平面視での最小幅の半分以下となる間隔で配設される、請求項1から請求項6のいずれか1項に記載の炭化珪素半導体装置。 - 前記ゲート配線は、
前記半導体基板の端縁に沿って設けられ、前記ゲートパッドが設けられた部分において、前記第1の主電極で分断される、請求項1から請求項7のいずれか1項に記載の炭化珪素半導体装置。 - 前記ゲート配線は、
前記ゲートパッドに直接接続される、請求項1から請求項7のいずれか1項に記載の炭化珪素半導体装置。 - 前記第1の主電極は、
平面視で前記ゲート配線および前記ゲートパッドを囲むように設けられる、請求項9記載の炭化珪素半導体装置。 - 前記ゲートパッドは、
平面視で前記セル配置領域に対向する側に設けられた第1の部分と、
前記第1の部分とは反対側に間隔を空けて設けられた第2の部分とを有し、
前記第1の部分と前記第2の部分とは、前記ゲート電極を介して電気的に接続される、請求項1から請求項10のいずれか1項に記載の炭化珪素半導体装置。 - 前記第1の不純物領域の上層部に選択的に配設され、前記第2の不純物領域と側面で接する第2導電型の第5の不純物領域をさらに備え、
前記第4の不純物領域と前記第5の不純物領域とは、不純物濃度および深さが同じである、請求項1から請求項11のいずれか1項に記載の炭化珪素半導体装置。
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