JP6596410B2 - チップスケールパッケージ発光素子およびその製造方法 - Google Patents

チップスケールパッケージ発光素子およびその製造方法 Download PDF

Info

Publication number
JP6596410B2
JP6596410B2 JP2016257288A JP2016257288A JP6596410B2 JP 6596410 B2 JP6596410 B2 JP 6596410B2 JP 2016257288 A JP2016257288 A JP 2016257288A JP 2016257288 A JP2016257288 A JP 2016257288A JP 6596410 B2 JP6596410 B2 JP 6596410B2
Authority
JP
Japan
Prior art keywords
array
soft buffer
semiconductor die
buffer layer
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2016257288A
Other languages
English (en)
Japanese (ja)
Other versions
JP2017152681A (ja
Inventor
チェン チェ−
ワン ツォン−シ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Maven Optronics Co Ltd
Original Assignee
Maven Optronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Maven Optronics Co Ltd filed Critical Maven Optronics Co Ltd
Publication of JP2017152681A publication Critical patent/JP2017152681A/ja
Application granted granted Critical
Publication of JP6596410B2 publication Critical patent/JP6596410B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/56—Materials, e.g. epoxy or silicone resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)
JP2016257288A 2015-12-30 2016-12-29 チップスケールパッケージ発光素子およびその製造方法 Active JP6596410B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW104144441 2015-12-30
TW104144441A TWI581465B (zh) 2015-12-30 2015-12-30 晶片級封裝發光裝置及其製造方法

Publications (2)

Publication Number Publication Date
JP2017152681A JP2017152681A (ja) 2017-08-31
JP6596410B2 true JP6596410B2 (ja) 2019-10-23

Family

ID=59356421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016257288A Active JP6596410B2 (ja) 2015-12-30 2016-12-29 チップスケールパッケージ発光素子およびその製造方法

Country Status (3)

Country Link
JP (1) JP6596410B2 (ko)
KR (2) KR102091534B1 (ko)
TW (1) TWI581465B (ko)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109578843A (zh) * 2018-11-21 2019-04-05 中山市木林森电子有限公司 一种新型led灯条制作工艺
JP7484457B2 (ja) * 2019-06-12 2024-05-16 東レ株式会社 マイクロｌｅｄディスプレイ装置
JP7450770B2 (ja) * 2020-10-15 2024-03-15 泉州三安半導体科技有限公司 発光装置
US20240332467A1 (en) * 2023-03-31 2024-10-03 Seoul Viosys Co., Ltd. Light emitting apparatus and display apparatus including the same
CN117497667B (zh) * 2023-12-29 2024-03-19 江西省兆驰光电有限公司 一种发光led封装方法及发光led封装结构

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003031848A (ja) * 2001-07-13 2003-01-31 Seiwa Electric Mfg Co Ltd 固体発光ランプ及び固体発光ランプの製造方法
US9142740B2 (en) * 2003-07-04 2015-09-22 Epistar Corporation Optoelectronic element and manufacturing method thereof
US7344902B2 (en) * 2004-11-15 2008-03-18 Philips Lumileds Lighting Company, Llc Overmolded lens over LED die
JP2006140362A (ja) * 2004-11-15 2006-06-01 Nitto Denko Corp 光半導体素子封止用シートおよび該シートを用いた光半導体装置の製造方法
TWI419375B (zh) * 2005-02-18 2013-12-11 Nichia Corp 具備控制配光特性用之透鏡之發光裝置
TWI328293B (en) * 2006-10-31 2010-08-01 Epileds Tech Inc Light emitting diode and wafer level package method, wafer level bonding method thereof and circuit structure for wafer level package
JP5262054B2 (ja) * 2007-10-10 2013-08-14 日亜化学工業株式会社 発光装置の製造方法
TWI608760B (zh) * 2008-11-13 2017-12-11 行家光電有限公司 形成螢光粉轉換發光元件之方法
TWI508331B (zh) * 2008-11-13 2015-11-11 Maven Optronics Corp 用於形成螢光轉換型發光元件之薄膜螢光層的系統及方法、以及用於螢光轉換型發光元件之薄膜螢光層
JP5353602B2 (ja) * 2009-09-25 2013-11-27 凸版印刷株式会社 光源ユニットの製造方法
TWI381563B (zh) * 2009-11-20 2013-01-01 Everlight Electronics Co Ltd 發光二極體封裝及其製作方法
TWI456804B (zh) * 2010-05-20 2014-10-11 Advanced Optoelectronic Tech 發光二極體之封裝結構
JP5566785B2 (ja) * 2010-06-22 2014-08-06 日東電工株式会社 複合シート
US20120153311A1 (en) * 2010-12-17 2012-06-21 Intematix Corporation Low-cost solid-state based light emitting devices with photoluminescent wavelength conversion and their method of manufacture
CN103187408B (zh) * 2011-12-30 2015-09-23 展晶科技(深圳)有限公司 发光二极管封装结构
JP5661657B2 (ja) * 2012-01-16 2015-01-28 信越化学工業株式会社 シリコーン樹脂組成物、蛍光体含有波長変換フィルム、及びそれらの硬化物
JP2013161862A (ja) * 2012-02-02 2013-08-19 Konica Minolta Inc Ｌｅｄ装置、及びその製造方法
JP2013214716A (ja) * 2012-03-06 2013-10-17 Nitto Denko Corp 蛍光封止シート、発光ダイオード装置およびその製造方法
TW201344979A (zh) * 2012-04-27 2013-11-01 Delta Electronics Inc 發光裝置及其製造方法
JP6155827B2 (ja) * 2013-05-11 2017-07-05 日亜化学工業株式会社 発光装置の製造方法
TW201511370A (zh) * 2013-09-03 2015-03-16 Delta Electronics Inc 發光二極體裝置
JP6237181B2 (ja) * 2013-12-06 2017-11-29 日亜化学工業株式会社 発光装置の製造方法

Also Published As

Publication number Publication date
TWI581465B (zh) 2017-05-01
KR102091534B1 (ko) 2020-03-23
KR20170080528A (ko) 2017-07-10
JP2017152681A (ja) 2017-08-31
TW201724564A (zh) 2017-07-01
KR20190031450A (ko) 2019-03-26

Similar Documents

Publication Publication Date Title
JP6596410B2 (ja) チップスケールパッケージ発光素子およびその製造方法
JP6599295B2 (ja) 斜角反射体を備えた発光素子およびその製造方法
JP6386110B2 (ja) 非対称放射パターンを有する発光素子およびその製造方法
US10522728B2 (en) Beveled chip reflector for chip-scale packaging light-emitting device and manufacturing method of the same
JP6152801B2 (ja) 発光装置及びその製造方法
JP5897554B2 (ja) レンズ付き光半導体装置、及びその製造方法
JP7016467B2 (ja) ビーム成形構造体を備えた発光素子およびその製造方法
CN108365075B (zh) 具有斜面晶片反射结构的晶片级封装发光装置及其制造方法
TWI476960B (zh) 光學發射器及其製造方法
US20080121911A1 (en) Optical preforms for solid state light emitting dice, and methods and systems for fabricating and assembling same
JP2013042166A (ja) Ｌｅｄパッケージにおけるテクスチャード加工された封止体表面
TWI458134B (zh) 具有磷光膜之封裝發光二極體及相關之系統和方法
TWI509839B (zh) 發光二極體封裝結構及封裝方法
US10693046B2 (en) Chip scale packaging light emitting device and manufacturing method of the same
TWI504009B (zh) 具有覆晶式安裝固態輻射傳感器之固態輻射傳感器裝置及其關聯的系統及方法
JP2019201089A (ja) チップスケールパッケージング発光素子の斜角チップ反射器およびその製造方法
JP2019096871A (ja) 凹面を有するチップスケールパッケージ型発光素子およびその製造方法
TWI642211B (zh) 具有斜面晶片反射結構之晶片級封裝發光裝置及其製造方法
US20200212015A1 (en) Light emitting device and method for manufacturing light emitting device
US11670748B2 (en) LED package structure
TW201349924A (zh) 光電裝置及其製造方法
TW201525044A (zh) 發光裝置及波長轉換層的製作方法
TWM374651U (en) Multi-chips LED packaging structure
TW201327920A (zh) 不需使用脫模劑或脫模片即可順利進行脫模的發光二極體封裝結構的製作方法
TWM324287U (en) Light-emitting semiconductor device package structure

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170427

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170823

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20180131

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180215

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180514

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20181106

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20190123

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20190404

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20190425

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20190910

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190930

R150 Certificate of patent or registration of utility model

Ref document number: 6596410

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250