JP6586036B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP6586036B2
JP6586036B2 JP2016051543A JP2016051543A JP6586036B2 JP 6586036 B2 JP6586036 B2 JP 6586036B2 JP 2016051543 A JP2016051543 A JP 2016051543A JP 2016051543 A JP2016051543 A JP 2016051543A JP 6586036 B2 JP6586036 B2 JP 6586036B2
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JP
Japan
Prior art keywords
semiconductor chip
adhesive
adhesive layer
wire
connection electrode
Prior art date
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Active
Application number
JP2016051543A
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English (en)
Japanese (ja)
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JP2017168586A (ja
Inventor
直樹 岩政
直樹 岩政
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kioxia Corp
Original Assignee
Toshiba Memory Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Memory Corp filed Critical Toshiba Memory Corp
Priority to JP2016051543A priority Critical patent/JP6586036B2/ja
Priority to TW106104226A priority patent/TWI621232B/zh
Priority to CN201710133212.0A priority patent/CN107195589B/zh
Publication of JP2017168586A publication Critical patent/JP2017168586A/ja
Application granted granted Critical
Publication of JP6586036B2 publication Critical patent/JP6586036B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3192—Multilayer coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H01L2224/48147—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked with an intermediate bond, e.g. continuous wire daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP2016051543A 2016-03-15 2016-03-15 半導体装置の製造方法 Active JP6586036B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2016051543A JP6586036B2 (ja) 2016-03-15 2016-03-15 半導体装置の製造方法
TW106104226A TWI621232B (zh) 2016-03-15 2017-02-09 Semiconductor device
CN201710133212.0A CN107195589B (zh) 2016-03-15 2017-03-08 半导体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016051543A JP6586036B2 (ja) 2016-03-15 2016-03-15 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2017168586A JP2017168586A (ja) 2017-09-21
JP6586036B2 true JP6586036B2 (ja) 2019-10-02

Family

ID=59870854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016051543A Active JP6586036B2 (ja) 2016-03-15 2016-03-15 半導体装置の製造方法

Country Status (3)

Country Link
JP (1) JP6586036B2 (zh)
CN (1) CN107195589B (zh)
TW (1) TWI621232B (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7042713B2 (ja) * 2018-07-12 2022-03-28 キオクシア株式会社 半導体装置
JP2020021908A (ja) * 2018-08-03 2020-02-06 キオクシア株式会社 半導体装置およびその製造方法
JP2020038902A (ja) 2018-09-04 2020-03-12 キオクシア株式会社 半導体装置
TWI665770B (zh) * 2018-12-13 2019-07-11 力成科技股份有限公司 半導體封裝結構及其製法
JP2020155559A (ja) 2019-03-19 2020-09-24 キオクシア株式会社 半導体装置
TWI830906B (zh) * 2019-04-25 2024-02-01 日商力森諾科股份有限公司 具有支石墓結構的半導體裝置的製造方法及支持片的製造方法
JP2022097769A (ja) * 2019-04-25 2022-07-01 昭和電工マテリアルズ株式会社 ドルメン構造を有する半導体装置の製造方法及び支持片の製造方法
JP2021015922A (ja) * 2019-07-16 2021-02-12 キオクシア株式会社 半導体装置およびその製造方法
JP2021044362A (ja) * 2019-09-10 2021-03-18 キオクシア株式会社 半導体装置
JP2022113250A (ja) 2021-01-25 2022-08-04 キオクシア株式会社 半導体装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002033022A (ja) * 2000-07-13 2002-01-31 Mitsui Takeda Chemicals Inc 導電性多層構造樹脂粒子およびそれを用いた異方導電性接着剤
JP2002222889A (ja) * 2001-01-24 2002-08-09 Nec Kyushu Ltd 半導体装置及びその製造方法
TWI326910B (en) * 2003-03-31 2010-07-01 Sanyo Electric Co Semiconductor module and method for making same
JP4160083B2 (ja) * 2006-04-11 2008-10-01 シャープ株式会社 光学装置用モジュール及び光学装置用モジュールの製造方法
TWI435419B (zh) * 2010-02-15 2014-04-21 Toshiba Kk 半導體記憶裝置及其製造方法
JP5857355B2 (ja) * 2010-09-16 2016-02-10 Ｓｈマテリアル株式会社 半導体発光素子搭載用基板、及びそれを用いた半導体発光装置
JP2015176906A (ja) * 2014-03-13 2015-10-05 株式会社東芝 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
JP2017168586A (ja) 2017-09-21
TWI621232B (zh) 2018-04-11
TW201803063A (zh) 2018-01-16
CN107195589B (zh) 2021-03-16
CN107195589A (zh) 2017-09-22

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