JP6584939B2 - 配線基板、半導体パッケージ、半導体装置、配線基板の製造方法及び半導体パッケージの製造方法 - Google Patents

配線基板、半導体パッケージ、半導体装置、配線基板の製造方法及び半導体パッケージの製造方法 Download PDF

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JP6584939B2
JP6584939B2 JP2015241424A JP2015241424A JP6584939B2 JP 6584939 B2 JP6584939 B2 JP 6584939B2 JP 2015241424 A JP2015241424 A JP 2015241424A JP 2015241424 A JP2015241424 A JP 2015241424A JP 6584939 B2 JP6584939 B2 JP 6584939B2
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layer
wiring
insulating layer
wiring layer
insulating
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JP2017108019A (ja
JP2017108019A5 (enExample
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渉 金田
渉 金田
清水　規良
規良 清水
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to US15/372,913 priority patent/US9780043B2/en
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    • H10W42/121—
    • H10W70/05—
    • H10W70/614—
    • H10W70/635—
    • H10W70/65—
    • H10W70/685—
    • H10W74/129—
    • H10W90/00—
    • H10W70/095—
    • H10W70/60—
    • H10W70/611—
    • H10W72/072—
    • H10W72/073—
    • H10W72/07354—
    • H10W72/232—
    • H10W72/252—
    • H10W72/347—
    • H10W72/354—
    • H10W72/877—
    • H10W74/117—
    • H10W74/142—
    • H10W74/15—
    • H10W90/722—
    • H10W90/724—
    • H10W90/734—

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
JP2015241424A 2015-12-10 2015-12-10 配線基板、半導体パッケージ、半導体装置、配線基板の製造方法及び半導体パッケージの製造方法 Active JP6584939B2 (ja)

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JP2015241424A JP6584939B2 (ja) 2015-12-10 2015-12-10 配線基板、半導体パッケージ、半導体装置、配線基板の製造方法及び半導体パッケージの製造方法
US15/372,913 US9780043B2 (en) 2015-12-10 2016-12-08 Wiring board, semiconductor package, and semiconductor device

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JP2015241424A JP6584939B2 (ja) 2015-12-10 2015-12-10 配線基板、半導体パッケージ、半導体装置、配線基板の製造方法及び半導体パッケージの製造方法

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JP2017108019A JP2017108019A (ja) 2017-06-15
JP2017108019A5 JP2017108019A5 (enExample) 2018-11-08
JP6584939B2 true JP6584939B2 (ja) 2019-10-02

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11715680B2 (en) 2020-12-17 2023-08-01 Samsung Electro-Mechanics Co., Ltd. Printed circuit board

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9818736B1 (en) * 2017-03-03 2017-11-14 Tdk Corporation Method for producing semiconductor package
KR102069659B1 (ko) 2017-08-31 2020-01-23 해성디에스 주식회사 반도체 패키지 기판 제조방법 및 이를 이용하여 제조된 반도체 패키지 기판
TWI642333B (zh) 2017-10-25 2018-11-21 欣興電子股份有限公司 電路板及其製造方法
TWI642334B (zh) 2017-10-25 2018-11-21 欣興電子股份有限公司 電路板及其製造方法
US10314171B1 (en) * 2017-12-29 2019-06-04 Intel Corporation Package assembly with hermetic cavity
JP7289620B2 (ja) * 2018-09-18 2023-06-12 新光電気工業株式会社 配線基板、積層型配線基板、半導体装置
TWI690253B (zh) * 2018-11-06 2020-04-01 鈺橋半導體股份有限公司 具有應力調節件之互連基板、其覆晶組體及其製作方法
JP2020161732A (ja) * 2019-03-27 2020-10-01 イビデン株式会社 配線基板
US11462501B2 (en) * 2019-10-25 2022-10-04 Shinko Electric Industries Co., Ltd. Interconnect substrate and method of making the same
JP2021150567A (ja) 2020-03-23 2021-09-27 キオクシア株式会社 半導体装置及びその製造方法
KR102852782B1 (ko) 2020-07-10 2025-08-29 삼성전자주식회사 반도체 패키지
JP7661664B2 (ja) * 2021-08-20 2025-04-15 新光電気工業株式会社 配線基板及びその製造方法
JP7694883B2 (ja) * 2021-08-30 2025-06-18 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
US12183683B2 (en) * 2021-10-14 2024-12-31 Advanced Semiconductor Engineering, Inc. Electronic package structure
US11961808B2 (en) * 2021-10-14 2024-04-16 Advanced Semiconductor Engineering, Inc. Electronic package structure with reinforcement element
CN114062076A (zh) * 2021-11-04 2022-02-18 九江德福科技股份有限公司 一种用于铜箔晶体分析的样品制备方法
CN115831765A (zh) * 2022-12-30 2023-03-21 珠海越亚半导体股份有限公司 一种嵌埋封装散热结构及其制作方法以及半导体
CN116190248A (zh) * 2023-02-07 2023-05-30 珠海越亚半导体股份有限公司 一种嵌埋封装散热结构及其制作方法以及半导体

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003197849A (ja) * 2001-10-18 2003-07-11 Matsushita Electric Ind Co Ltd 部品内蔵モジュールとその製造方法
JP2003163459A (ja) * 2001-11-26 2003-06-06 Sony Corp 高周波回路ブロック体及びその製造方法、高周波モジュール装置及びその製造方法。
JP4863076B2 (ja) * 2006-12-28 2012-01-25 凸版印刷株式会社 配線基板及びその製造方法
US8895440B2 (en) * 2010-08-06 2014-11-25 Stats Chippac, Ltd. Semiconductor die and method of forming Fo-WLCSP vertical interconnect using TSV and TMV
JP5941735B2 (ja) * 2012-04-10 2016-06-29 新光電気工業株式会社 配線基板の製造方法及び配線基板
KR20140086531A (ko) * 2012-12-28 2014-07-08 삼성전기주식회사 패키지 기판 및 그 제조방법, 그리고 패키지 온 패키지 기판
JP5662551B1 (ja) 2013-12-20 2015-01-28 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
US9768090B2 (en) * 2014-02-14 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11715680B2 (en) 2020-12-17 2023-08-01 Samsung Electro-Mechanics Co., Ltd. Printed circuit board

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US20170170130A1 (en) 2017-06-15
JP2017108019A (ja) 2017-06-15
US9780043B2 (en) 2017-10-03

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