JP6570640B2 - 配列基板と、表示パネルと、配列基板の調製方法 - Google Patents
配列基板と、表示パネルと、配列基板の調製方法 Download PDFInfo
- Publication number
- JP6570640B2 JP6570640B2 JP2017534675A JP2017534675A JP6570640B2 JP 6570640 B2 JP6570640 B2 JP 6570640B2 JP 2017534675 A JP2017534675 A JP 2017534675A JP 2017534675 A JP2017534675 A JP 2017534675A JP 6570640 B2 JP6570640 B2 JP 6570640B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- low
- temperature polysilicon
- substrate
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims description 134
- 238000000034 method Methods 0.000 title claims description 93
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 132
- 229920005591 polysilicon Polymers 0.000 claims description 132
- 238000002161 passivation Methods 0.000 claims description 21
- 238000002360 preparation method Methods 0.000 claims description 19
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 238000000206 photolithography Methods 0.000 claims 7
- 239000010410 layer Substances 0.000 description 331
- 239000010409 thin film Substances 0.000 description 14
- 150000002500 ions Chemical class 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 239000002184 metal Substances 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electrodes Of Semiconductors (AREA)
Description
20 カラーフィルタ基板
30 液晶層
101 基板
102 遮光層
103 緩衝層
104 低温ポリシリコン層
105 第一オーム接触層
1051 第一高ドープ領域
1052 第一低ドープ領域
106 第二オーム接触層
1061 第二高ドープ領域
1062 第二低ドープ領域
107 ソース電極
108 ドレイン電極
109 絶縁層
110 ゲート電極
111 不動態化層
1111 抜き穴
112 第一導電層
113 第二導電層
Claims (2)
- 配列基板の調製方法であって、
前記配列基板の調製方法は、
一つの基板を提供する基板提供手順と、
第1フォトマスクを用いた第1フォトリソグラフィによって、前記基板の表面に遮光層を形成する遮光層形成手順と、
前記基板および前記遮光層の上方に緩衝層を形成する緩衝層形成手順と、
第2フォトマスクを用いた第2フォトリソグラフィによって、前記遮光層を覆っていない前記緩衝層の上方に、画素電極となる第一導電層を形成する第一導電層形成手順と、
第3フォトマスクを用いた第3フォトリソグラフィによって、前記緩衝層の上方において一部が前記遮光層の端にオーバーラップするようにソース電極とドレイン電極とを設け、かつ、前記ドレイン電極は前記第一導電層に電気的に接続するソースドレイン形成手順と、
第4フォトマスクを用いた第4フォトリソグラフィによって、前記緩衝層の上方において、平面視したときに前記遮光層の形成領域の内側に入るように低温ポリシリコン層を設け、かつ、前記低温ポリシリコン層の一部が前記ソース電極および前記ドレイン電極に重なっていて、前記低温ポリシリコン層が前記ソース電極および前記ドレイン電極と電気的に接続する低温ポリシリコン層形成手順と、
前記低温ポリシリコン層、前記ソース電極、ドレイン電極および前記第一導電層の上に絶縁層を形成する絶縁層形成手順と、
第5フォトマスクを用いた第5フォトリソグラフィによって、前記絶縁層の上であって、前記低温ポリシリコン層の形成領域のほぼ中央に対応する領域にゲート電極を形成するゲート電極形成手順と、
前記ゲート電極および前記絶縁層の上に不動態化層を形成する不動態化層形成工程と、
第6フォトマスクを用いた第6フォトリソグラフィにより、前記ドレイン電極の直上において前記不動態化層および前記絶縁層を貫通する抜き穴を形成し、当該抜き穴を通して前記ドレイン電極が露出するようにする抜き穴形成手順と、
第7フォトマスクを用いた第7フォトリソグラフィによって、前記不動態化層の上において平面視において前記第一導電層の形成領域とほぼ重なる領域に共通電極となる第二導電層を形成する第二導電層形成手順と、からなる
ことを特徴とする配列基板の調製方法。 - 請求項1に記載の配列基板の調製方法において、
ゲート電極形成手順と不動態化層形成工程との間に、
前記低温ポリシリコン層のうち前記ゲート電極の直下以外の領域にオーム接触層を形成するオーム接触層形成手順を備える
ことを特徴とする配列基板の調製方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410849415.6 | 2014-12-30 | ||
CN201410849415.6A CN104600080B (zh) | 2014-12-30 | 2014-12-30 | 阵列基板、显示面板及阵列基板的制备方法 |
PCT/CN2015/071168 WO2016106892A1 (zh) | 2014-12-30 | 2015-01-21 | 阵列基板、显示面板及阵列基板的制备方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018503869A JP2018503869A (ja) | 2018-02-08 |
JP6570640B2 true JP6570640B2 (ja) | 2019-09-04 |
Family
ID=53125739
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017534675A Active JP6570640B2 (ja) | 2014-12-30 | 2015-01-21 | 配列基板と、表示パネルと、配列基板の調製方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US9530800B2 (ja) |
JP (1) | JP6570640B2 (ja) |
KR (1) | KR101999907B1 (ja) |
CN (1) | CN104600080B (ja) |
GB (1) | GB2548759B (ja) |
WO (1) | WO2016106892A1 (ja) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105789279A (zh) | 2016-03-11 | 2016-07-20 | 深圳市华星光电技术有限公司 | 薄膜晶体管、液晶显示面板及薄膜晶体管的制备方法 |
CN105845693A (zh) * | 2016-03-28 | 2016-08-10 | 深圳市华星光电技术有限公司 | 薄膜晶体管、薄膜晶体管的制备方法及液晶显示面板 |
KR102484382B1 (ko) | 2018-03-09 | 2023-01-04 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 |
US10826026B2 (en) | 2018-04-23 | 2020-11-03 | Samsung Display Co., Ltd. | Display device and manufacturing method thereof |
US10916617B2 (en) | 2018-05-04 | 2021-02-09 | Samsung Display Co., Ltd. | Display device |
KR102675480B1 (ko) | 2018-06-15 | 2024-06-13 | 삼성디스플레이 주식회사 | 표시 장치 |
KR102523400B1 (ko) | 2018-08-07 | 2023-04-20 | 삼성디스플레이 주식회사 | 표시 장치 |
KR20200029681A (ko) | 2018-09-10 | 2020-03-19 | 삼성디스플레이 주식회사 | 표시장치 |
CN109378298B (zh) * | 2018-10-10 | 2022-04-29 | 京东方科技集团股份有限公司 | 显示背板及其制作方法和显示装置 |
KR20200047898A (ko) | 2018-10-26 | 2020-05-08 | 삼성디스플레이 주식회사 | 스캔 구동부 및 이를 포함하는 표시 장치 |
KR102656469B1 (ko) | 2019-07-09 | 2024-04-12 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치의 화소, 및 유기 발광 표시 장치 |
KR102667613B1 (ko) | 2019-08-08 | 2024-05-23 | 삼성디스플레이 주식회사 | 표시 장치 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW575777B (en) * | 2001-03-30 | 2004-02-11 | Sanyo Electric Co | Active matrix type display device |
US6534350B2 (en) | 2001-08-02 | 2003-03-18 | Industrial Technology Research Institute | Method for fabricating a low temperature polysilicon thin film transistor incorporating channel passivation step |
US6692983B1 (en) * | 2002-08-01 | 2004-02-17 | Chih-Chiang Chen | Method of forming a color filter on a substrate having pixel driving elements |
TWI227565B (en) * | 2003-04-16 | 2005-02-01 | Au Optronics Corp | Low temperature poly-Si thin film transistor and method of manufacturing the same |
KR101183361B1 (ko) * | 2006-06-29 | 2012-09-14 | 엘지디스플레이 주식회사 | 액정 표시 장치용 어레이 기판 및 그 제조 방법 |
TW200830426A (en) | 2007-01-12 | 2008-07-16 | Xu-Xin Chen | Method for fabricating a bottom-gate low-temperature polysilicon thin film transistor |
KR20090038685A (ko) * | 2007-10-16 | 2009-04-21 | 삼성전자주식회사 | 액정표시장치 |
KR101287968B1 (ko) * | 2008-11-25 | 2013-07-19 | 엘지디스플레이 주식회사 | 전기영동 표시장치 및 그 제조 방법 |
CN101894807B (zh) | 2009-05-22 | 2012-11-21 | 北京京东方光电科技有限公司 | Tft-lcd阵列基板及其制造方法 |
WO2011070929A1 (en) | 2009-12-11 | 2011-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and electronic device |
CN102651403A (zh) * | 2012-04-16 | 2012-08-29 | 京东方科技集团股份有限公司 | 薄膜晶体管、阵列基板及其制造方法和显示面板 |
KR101353284B1 (ko) | 2012-04-25 | 2014-01-21 | 엘지디스플레이 주식회사 | 액정 디스플레이 장치와 이의 제조방법 |
KR101339001B1 (ko) * | 2012-07-04 | 2013-12-09 | 엘지디스플레이 주식회사 | 액정표시장치용 어레이기판 및 제조방법 |
CN102799014B (zh) * | 2012-09-07 | 2014-09-10 | 深圳市华星光电技术有限公司 | 液晶显示面板的制作方法 |
CN103018974B (zh) * | 2012-11-30 | 2016-05-25 | 京东方科技集团股份有限公司 | 液晶显示装置、多晶硅阵列基板及制作方法 |
CN103076703B (zh) * | 2012-12-28 | 2015-11-25 | 南京中电熊猫液晶显示科技有限公司 | 一种液晶显示面板及其制造方法 |
CN103700706B (zh) * | 2013-12-16 | 2015-02-18 | 京东方科技集团股份有限公司 | 薄膜晶体管制备方法和阵列基板制备方法 |
CN103985637B (zh) * | 2014-04-30 | 2017-02-01 | 京东方科技集团股份有限公司 | 低温多晶硅薄膜晶体管及其制作方法和显示装置 |
US9437435B2 (en) * | 2014-11-11 | 2016-09-06 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | LTPS TFT having dual gate structure and method for forming LTPS TFT |
-
2014
- 2014-12-30 CN CN201410849415.6A patent/CN104600080B/zh active Active
-
2015
- 2015-01-21 JP JP2017534675A patent/JP6570640B2/ja active Active
- 2015-01-21 US US14/435,468 patent/US9530800B2/en active Active
- 2015-01-21 GB GB1710274.0A patent/GB2548759B/en active Active
- 2015-01-21 KR KR1020177019782A patent/KR101999907B1/ko active IP Right Grant
- 2015-01-21 WO PCT/CN2015/071168 patent/WO2016106892A1/zh active Application Filing
Also Published As
Publication number | Publication date |
---|---|
US9530800B2 (en) | 2016-12-27 |
WO2016106892A1 (zh) | 2016-07-07 |
US20160190171A1 (en) | 2016-06-30 |
KR20170096007A (ko) | 2017-08-23 |
CN104600080B (zh) | 2018-10-19 |
GB201710274D0 (en) | 2017-08-09 |
CN104600080A (zh) | 2015-05-06 |
GB2548759A (en) | 2017-09-27 |
KR101999907B1 (ko) | 2019-07-12 |
GB2548759B (en) | 2021-07-28 |
JP2018503869A (ja) | 2018-02-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6570640B2 (ja) | 配列基板と、表示パネルと、配列基板の調製方法 | |
WO2018099052A1 (zh) | 阵列基板的制备方法、阵列基板及显示装置 | |
US11049889B2 (en) | Method for preparing array substrate by stripping first photo-resist layer through wet etching before forming ohm contact layer and active layer | |
US20160276376A1 (en) | Array substrate, method for fabricating the same, and display device | |
WO2016086531A1 (zh) | 阵列基板及其制作方法 | |
US9508757B2 (en) | Array substrate and manufacturing method thereof, display panel and display apparatus | |
US20170052418A1 (en) | Array substrate, manufacturing method thereof, liquid crystal display panel and display device | |
WO2019205333A1 (zh) | 阵列基板及其制作方法 | |
US9450103B2 (en) | Thin film transistor, method for manufacturing the same, display device and electronic product | |
JP2015514321A (ja) | Tft、該tftを製造するマスク、アレイ基板及び表示装置 | |
CN109494257B (zh) | 一种薄膜晶体管及其制造方法、阵列基板、显示装置 | |
TW201418855A (zh) | 顯示面板之陣列基板及其製作方法 | |
EP2731127A1 (en) | Tft array substrate, method of fabricating same, and display device | |
US9653578B2 (en) | Thin film transistor, its manufacturing method and display device | |
US11106070B2 (en) | Array substrate and manufacturing method of the same and display panel | |
US10134765B2 (en) | Oxide semiconductor TFT array substrate and method for manufacturing the same | |
US20160322388A1 (en) | Array substrate, its manufacturing method and display device | |
TW201320161A (zh) | 畫素結構及畫素結構的製造方法 | |
CN108337905A (zh) | 一种阵列基板及其制备方法、液晶显示面板 | |
US10437122B2 (en) | Display device, array substrate, pixel structure, and manufacturing method thereof | |
EP3588562A1 (en) | Array substrate and display device | |
WO2015143837A1 (zh) | 薄膜晶体管及其制备方法、阵列基板及显示装置 | |
CN106206615B (zh) | 阵列基板的制作方法 | |
US20190043897A1 (en) | Method for fabricating array substrate, array substrate and display device | |
WO2018040795A1 (zh) | 一种阵列基板及其制备方法、显示面板及其制备方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170731 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180530 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180622 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180905 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20181109 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20190127 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190320 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20190719 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190806 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6570640 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |