JP6517157B2 - 待ち時間が短い電圧昇圧回路を備えた電圧レベルシフタ - Google Patents

待ち時間が短い電圧昇圧回路を備えた電圧レベルシフタ Download PDF

Info

Publication number
JP6517157B2
JP6517157B2 JP2015561534A JP2015561534A JP6517157B2 JP 6517157 B2 JP6517157 B2 JP 6517157B2 JP 2015561534 A JP2015561534 A JP 2015561534A JP 2015561534 A JP2015561534 A JP 2015561534A JP 6517157 B2 JP6517157 B2 JP 6517157B2
Authority
JP
Japan
Prior art keywords
voltage
voltage level
circuit
level
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2015561534A
Other languages
English (en)
Japanese (ja)
Other versions
JP2016513914A (ja
JP2016513914A5 (enExample
Inventor
ラジャイー、オミド
ジェン、ウェイ
アラーディ、デュネシュ・ジャガンナス
ガオ、ユファ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of JP2016513914A publication Critical patent/JP2016513914A/ja
Publication of JP2016513914A5 publication Critical patent/JP2016513914A5/ja
Application granted granted Critical
Publication of JP6517157B2 publication Critical patent/JP6517157B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01714Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/018521Interface arrangements of complementary type, e.g. CMOS
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/012Modifications of generator to improve response time or to decrease power consumption
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/35613Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L5/00Automatic control of voltage, current, or power

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Logic Circuits (AREA)
JP2015561534A 2013-03-06 2014-03-04 待ち時間が短い電圧昇圧回路を備えた電圧レベルシフタ Expired - Fee Related JP6517157B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/787,590 2013-03-06
US13/787,590 US9306553B2 (en) 2013-03-06 2013-03-06 Voltage level shifter with a low-latency voltage boost circuit
PCT/US2014/020238 WO2014138033A1 (en) 2013-03-06 2014-03-04 Voltage level shifter with a low-latency voltage boost circuit

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2019005284A Division JP2019097179A (ja) 2013-03-06 2019-01-16 待ち時間が短い電圧昇圧回路を備えた電圧レベルシフタ

Publications (3)

Publication Number Publication Date
JP2016513914A JP2016513914A (ja) 2016-05-16
JP2016513914A5 JP2016513914A5 (enExample) 2017-03-16
JP6517157B2 true JP6517157B2 (ja) 2019-05-22

Family

ID=50336567

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2015561534A Expired - Fee Related JP6517157B2 (ja) 2013-03-06 2014-03-04 待ち時間が短い電圧昇圧回路を備えた電圧レベルシフタ
JP2019005284A Pending JP2019097179A (ja) 2013-03-06 2019-01-16 待ち時間が短い電圧昇圧回路を備えた電圧レベルシフタ

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2019005284A Pending JP2019097179A (ja) 2013-03-06 2019-01-16 待ち時間が短い電圧昇圧回路を備えた電圧レベルシフタ

Country Status (6)

Country Link
US (1) US9306553B2 (enExample)
EP (1) EP2965425B1 (enExample)
JP (2) JP6517157B2 (enExample)
KR (1) KR102122304B1 (enExample)
CN (1) CN105027439B (enExample)
WO (1) WO2014138033A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9473120B1 (en) 2015-05-18 2016-10-18 Qualcomm Incorporated High-speed AC-coupled inverter-based buffer with replica biasing
JP6820480B2 (ja) * 2015-12-08 2021-01-27 株式会社ソシオネクスト 出力回路
CN106067804B (zh) * 2016-08-04 2023-04-07 成都博思微科技有限公司 一种时钟信号的电平位移幅度控制电路
TWI723470B (zh) * 2018-07-31 2021-04-01 台灣積體電路製造股份有限公司 驅動電路、積體電路、及操作驅動電路的方法
KR102594977B1 (ko) * 2019-04-09 2023-10-30 에스케이하이닉스 주식회사 신호전달회로 및 이를 포함하는 반도체 장치
JP7379660B2 (ja) * 2019-08-09 2023-11-14 シリコン ストーリッジ テクノロージー インコーポレイテッド 集積回路のための改善されたレベルシフタ
KR102244707B1 (ko) * 2019-09-20 2021-04-27 고려대학교 산학협력단 조건부 스위칭 신호를 위한 주기적인 리프레시 동작을 수행하는 용량성 결합 레벨 시프터 및 그 동작 방법
CN112865778B (zh) * 2019-11-28 2025-07-25 硅存储技术股份有限公司 用于集成电路的低电压电平移位器
CN111106822B (zh) * 2019-12-03 2023-12-12 上海集成电路研发中心有限公司 一种电源上电模块
CN114679167B (zh) * 2022-04-12 2023-05-05 电子科技大学 一种高速无静态功耗的电平位移电路
US20250141451A1 (en) * 2023-10-27 2025-05-01 STMicroelectronics International N. V. Level shifting circuit

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09148913A (ja) * 1995-11-21 1997-06-06 Seiko Epson Corp 高電位差レベルシフト回路
US6064250A (en) * 1996-07-29 2000-05-16 Townsend And Townsend And Crew Llp Various embodiments for a low power adaptive charge pump circuit
TW362277B (en) * 1996-07-29 1999-06-21 Hynix Semiconductor Inc Charge pump for a semiconductor substrate
JP2880493B2 (ja) * 1997-02-03 1999-04-12 松下電器産業株式会社 チャージポンプ回路および論理回路
IT1304060B1 (it) 1998-12-29 2001-03-07 St Microelectronics Srl Variatore di livello per circuiteria a tensione d'alimentazionemultipla
WO2001056159A1 (en) * 2000-01-27 2001-08-02 Hitachi, Ltd. Semiconductor device
JP4432197B2 (ja) * 2000-03-24 2010-03-17 セイコーエプソン株式会社 多段レベルシフト回路およびそれを用いた半導体装置
CN1233093C (zh) 2002-02-20 2005-12-21 松下电器产业株式会社 驱动电路
US20040104756A1 (en) 2002-12-03 2004-06-03 Payne James E. Voltage level shifter circuit having high speed and low switching power
US6894537B1 (en) 2002-12-18 2005-05-17 National Semiconductor Corporation Apparatus and method for level shifting in power-on reset circuitry in dual power supply domains
US7268588B2 (en) 2005-06-29 2007-09-11 Freescale Semiconductor, Inc. Cascadable level shifter cell
US7304530B2 (en) 2005-06-30 2007-12-04 Silicon Laboratories Inc. Utilization of device types having different threshold voltages
KR100711516B1 (ko) * 2006-02-14 2007-04-27 한양대학교 산학협력단 저전력 및 소면적의 용량 결합형 레벨 시프트 회로
JP4787671B2 (ja) 2006-05-16 2011-10-05 旭化成エレクトロニクス株式会社 クロック昇圧回路
KR101230313B1 (ko) * 2006-07-05 2013-02-06 재단법인서울대학교산학협력재단 레벨 시프터 및 그의 구동 방법
US7777547B2 (en) 2007-11-22 2010-08-17 Mediatek Inc. Level shifter for high-speed and low-leakage operation
US7800426B2 (en) 2008-03-27 2010-09-21 Taiwan Semiconductor Manufacturing Co., Ltd. Two voltage input level shifter with switches for core power off application
KR100911866B1 (ko) * 2008-04-14 2009-08-11 주식회사 하이닉스반도체 내부전압 생성회로를 포함하는 반도체 메모리장치
SG169941A1 (en) * 2009-09-11 2011-04-29 Agency Science Tech & Res Circuit arrangement

Also Published As

Publication number Publication date
US9306553B2 (en) 2016-04-05
CN105027439B (zh) 2017-10-24
KR20150123929A (ko) 2015-11-04
CN105027439A (zh) 2015-11-04
EP2965425A1 (en) 2016-01-13
JP2019097179A (ja) 2019-06-20
EP2965425B1 (en) 2019-10-23
JP2016513914A (ja) 2016-05-16
US20140253210A1 (en) 2014-09-11
WO2014138033A1 (en) 2014-09-12
KR102122304B1 (ko) 2020-06-12

Similar Documents

Publication Publication Date Title
JP6517157B2 (ja) 待ち時間が短い電圧昇圧回路を備えた電圧レベルシフタ
KR20030041660A (ko) 감소된 프리차지 레벨을 적용하는 데이터 출력방법과데이터 출력회로
CN110932715A (zh) 位准移位电路及操作位准移位器的方法
KR20150062473A (ko) 반도체 장치의 버퍼 회로
CN106560999A (zh) 用于低功率高速集成时钟门控单元的设备
CN104142702A (zh) 输出电路以及电压信号输出方法
US10560084B2 (en) Level shift circuit
TWI401890B (zh) 電壓位準轉換電路
CN111181546B (zh) 包括自动自举的共源共栅驱动器的高速电压电平转换器
WO2018055666A1 (ja) インターフェース回路
JP2001068978A (ja) レベルシフタ回路
US10536147B1 (en) Level shifter
CN104300928B (zh) 差动转单端转换器
JP2006140928A (ja) 半導体装置
JP2023067760A (ja) レベルシフト回路
JP2019050550A (ja) レベルシフト回路
JP2009194560A (ja) 分周回路
TWM586017U (zh) 低功率電位轉換器
JP2025045947A (ja) 低電圧信号レベルシフタ回路
TWM531694U (zh) 電壓位準轉換器
WO2025197088A1 (ja) レベルシフト回路
TWM598007U (zh) 高性能電壓位準轉換器
TWM517481U (zh) 電壓位準轉換器
US20020043999A1 (en) Complementary passive analog logic
TWM565914U (zh) 電位轉換器

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170207

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170207

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20180124

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180220

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180328

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20180918

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20190116

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20190125

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20190319

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190417

R150 Certificate of patent or registration of utility model

Ref document number: 6517157

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees