JP6502751B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- JP6502751B2 JP6502751B2 JP2015110452A JP2015110452A JP6502751B2 JP 6502751 B2 JP6502751 B2 JP 6502751B2 JP 2015110452 A JP2015110452 A JP 2015110452A JP 2015110452 A JP2015110452 A JP 2015110452A JP 6502751 B2 JP6502751 B2 JP 6502751B2
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16146—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a via connection in the semiconductor or solid-state body
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16148—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a bonding area protruding from the surface
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- H01L2225/06503—Stacked arrangements of devices
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Description
以下、実施形態1にかかる半導体装置および半導体装置の製造方法を、図面を用いて詳細に説明する。なお、以下の説明では、素子形成対象の半導体基板における素子形成面を上面とし、この上面と反対側の面を下面としている。
つぎに、実施形態2にかかる半導体装置および半導体装置の製造方法を、図面を用いて詳細に説明する。以下の説明において、上述した実施形態と同様の構成については同一の符号を付し、その重複する説明を省略する。
つぎに、実施形態3にかかる半導体装置および半導体装置の製造方法を、図面を用いて詳細に説明する。以下の説明において、上述した実施形態と同様の構成については同一の符号を付し、その重複する説明を省略する。
Claims (3)
- 半導体基板と、
前記半導体基板の上面に位置するデバイス層と、
前記デバイス層上に位置し、貫通孔が設けられた絶縁層と、
前記絶縁層上から前記貫通孔内側面を経て前記デバイス層中の配線と接触する第1メタル層と、
前記第1メタル層上に位置する第2メタル層と、
前記絶縁層に設けられた前記貫通孔内に位置する胴体部と、前記胴体部上および前記絶縁層上に位置している頭部とを含み、前記第2メタル層上に位置して前記第2メタル層を構成する金属材料のイオン化傾向よりも大きい金属材料にて構成され、前記絶縁層の前記貫通孔を介して前記デバイス層中の配線と電気的に接続する貫通電極と、
を備え、
前記頭部には、側面から前記下面にかけて曲面を含む内面形状を有する窪みが形成されている
ことを特徴とする半導体装置。 - 前記貫通電極を構成する前記金属材料は、ニッケルを含み、
前記第2メタル層を構成する前記金属材料は、銅を含む
請求項1に記載の半導体装置。 - 半導体基板の上面に配線を含むデバイス層を形成する工程と、
前記デバイス層上に貫通孔を含む絶縁層を形成する工程と、
前記絶縁層の前記貫通孔底部に前記デバイス層の前記配線を露出させる工程と、
前記絶縁層上から前記貫通孔内側面を経て前記デバイス層中の前記配線と接触する第1メタル層を形成する工程と、
前記第1メタル層上に第2メタル層を形成する工程と、
前記絶縁層に設けられた前記貫通孔内に位置する胴体部と、前記胴体部および前記絶縁層上に位置している頭部とを含み、前記第2メタル層上に位置して前記第2メタル層を構成する金属材料のイオン化傾向よりも大きい金属材料にて構成され、前記絶縁層の前記貫通孔を介して前記デバイス層中の前記配線と電気的に接続する貫通電極を前記第2メタル層上に形成する工程と、
前記絶縁層上に位置する前記第1メタル層と前記第2メタル層との少なくとも一部を除去するとともに、前記貫通電極の前記頭部の側面から下面にかけて曲面を含む内面形状を有する窪みをウェットエッチングで形成する工程と、
を含む半導体装置の製造方法。
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TW105104182A TWI612620B (zh) | 2015-05-29 | 2016-02-05 | 半導體裝置及半導體裝置之製造方法 |
CN201610121743.3A CN106206420B (zh) | 2015-05-29 | 2016-03-03 | 半导体装置及半导体装置的制造方法 |
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