JP6478001B2 - 電子部品 - Google Patents
電子部品 Download PDFInfo
- Publication number
- JP6478001B2 JP6478001B2 JP2018554878A JP2018554878A JP6478001B2 JP 6478001 B2 JP6478001 B2 JP 6478001B2 JP 2018554878 A JP2018554878 A JP 2018554878A JP 2018554878 A JP2018554878 A JP 2018554878A JP 6478001 B2 JP6478001 B2 JP 6478001B2
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- Prior art keywords
- layer
- magnetic
- electronic component
- conductor
- metal shield
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000010410 layer Substances 0.000 claims description 190
- 239000004020 conductor Substances 0.000 claims description 130
- 239000002184 metal Substances 0.000 claims description 83
- 239000011347 resin Substances 0.000 claims description 58
- 229920005989 resin Polymers 0.000 claims description 58
- 239000000758 substrate Substances 0.000 claims description 51
- 230000035699 permeability Effects 0.000 claims description 16
- 239000000919 ceramic Substances 0.000 claims description 10
- 239000006247 magnetic powder Substances 0.000 claims description 7
- 239000002356 single layer Substances 0.000 claims description 2
- 230000005855 radiation Effects 0.000 description 19
- 239000011229 interlayer Substances 0.000 description 18
- 230000000694 effects Effects 0.000 description 10
- 239000000463 material Substances 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 7
- 229910000859 α-Fe Inorganic materials 0.000 description 7
- 230000002238 attenuated effect Effects 0.000 description 5
- 230000001629 suppression Effects 0.000 description 5
- 239000000126 substance Substances 0.000 description 4
- 239000011324 bead Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 230000000644 propagated effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000000696 magnetic material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
- H05K9/0073—Shielding materials
- H05K9/0075—Magnetic shielding materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/08—Magnetic details
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Manufacturing & Machinery (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
20:基板
51、52:表面実装部品
60:非磁性樹脂層
70:金属シールド層
80:磁性シールド層
90:中間層
201:磁性体層
202、203:非磁性体層
210:接続導体
211、221:導体パターン
212、212C、212D、213:層間接続導体
214:補助導体層
222:接続導体
301:グランド用外部端子導体
311:入出力用外部端子導体
400B、401、402、403、404:金属シールド用ランド導体
411、412:部品用ランド導体
NH:高周波ノイズ
NLD:低周波ノイズ
NLI:低周波ノイズ
Claims (9)
- 互いに対向する第1主面と第2主面とを有し、磁性体層を含む基板と、
前記基板の前記第1主面に実装された表面実装部品と、
前記第1主面上において、前記表面実装部品の全面を覆う非磁性樹脂層と、
前記第1主面上において、前記非磁性樹脂層を覆う金属シールド層と、
前記第1主面上において、前記非磁性樹脂層および前記金属シールド層の全面を覆う磁性シールド層と、
を備えた、
電子部品。 - 前記第1主面上において、前記金属シールド層は、前記非磁性樹脂層の全面を覆う、
請求項1に記載の電子部品。 - 前記基板は、
前記第2主面に形成されたグランド用外部端子導体と、
前記第1主面に形成され、前記金属シールド層に接続する金属シールド用ランド導体と、
前記磁性体層の内部を通り、前記グランド用外部端子導体と前記金属シールド用ランド導体とを接続する第1接続導体と、
を備える、
請求項1または請求項2に記載の電子部品。 - 前記基板は、
前記第2主面に形成された入出力用外部端子導体と、
前記磁性体層の外側を通り、前記入出力用外部端子導体と前記表面実装部品の端子とを接続する第2接続導体と、
を備える、
請求項1乃至請求項3のいずれかに記載の電子部品。 - 前記金属シールド層と前記磁性シールド層とに挟まれた非磁性の中間層を備える、
請求項1乃至請求項4のいずれかに記載の電子部品。 - 前記基板は、
前記磁性体層と、
前記磁性体層の厚み方向の両端に配置された非磁性体層と、の積層構造であり、
前記磁性体層は、磁性セラミックを材料とし、
前記非磁性体層は、非磁性セラミックを材料とする、
請求項1乃至請求項5のいずれかに記載の電子部品。 - 前記磁性シールド層は、磁性体粉が含有された樹脂を材料とする、
請求項1乃至請求項6に記載の電子部品。 - 低周波数領域における前記磁性体層の透磁率は前記磁性シールド層の透磁率よりも高く、
高周波数領域における前記磁性シールド層の透磁率は前記磁性体層の透磁率よりも高い、
請求項1乃至請求項7のいずれかに記載の電子部品。 - 前記表面実装部品は複数あり、
複数の前記表面実装部品を覆う前記非磁性樹脂層は単一層である、
請求項1乃至請求項8のいずれかに記載の電子部品。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016235678 | 2016-12-05 | ||
JP2016235678 | 2016-12-05 | ||
PCT/JP2017/040504 WO2018105307A1 (ja) | 2016-12-05 | 2017-11-10 | 電子部品 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2018105307A1 JPWO2018105307A1 (ja) | 2019-02-28 |
JP6478001B2 true JP6478001B2 (ja) | 2019-03-06 |
Family
ID=62492001
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018554878A Active JP6478001B2 (ja) | 2016-12-05 | 2017-11-10 | 電子部品 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10879142B2 (ja) |
JP (1) | JP6478001B2 (ja) |
CN (1) | CN209658154U (ja) |
WO (1) | WO2018105307A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6905493B2 (ja) * | 2018-08-24 | 2021-07-21 | 株式会社東芝 | 電子装置 |
JP7325964B2 (ja) * | 2019-01-11 | 2023-08-15 | 株式会社東芝 | 電磁波減衰体及び電子装置 |
US10879192B1 (en) * | 2019-07-17 | 2020-12-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and manufacturing method thereof |
CN111343782B (zh) * | 2020-04-14 | 2021-04-27 | 京东方科技集团股份有限公司 | 柔性线路板组件、显示组件及显示装置 |
US12055633B2 (en) * | 2020-08-25 | 2024-08-06 | Lumentum Operations Llc | Package for a time of flight device |
CN118541791A (zh) * | 2022-01-17 | 2024-08-23 | 株式会社村田制作所 | 高频模块 |
CN117677029A (zh) * | 2022-08-31 | 2024-03-08 | 华为技术有限公司 | 信号传输结构及制作方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0595197A (ja) * | 1991-10-01 | 1993-04-16 | Mitsui Toatsu Chem Inc | プリント配線板およびそれに用いる基板 |
JPH0837394A (ja) * | 1994-07-21 | 1996-02-06 | Figura Kk | 電波吸収体 |
JPH09116289A (ja) * | 1995-10-24 | 1997-05-02 | Tokin Corp | ノイズ抑制型電子装置およびその製造方法 |
US6906396B2 (en) * | 2002-01-15 | 2005-06-14 | Micron Technology, Inc. | Magnetic shield for integrated circuit packaging |
JP4013140B2 (ja) * | 2003-01-15 | 2007-11-28 | ソニー株式会社 | 磁気メモリ装置 |
JP2010087058A (ja) * | 2008-09-30 | 2010-04-15 | Sanyo Electric Co Ltd | 高周波モジュール |
US8093691B1 (en) * | 2009-07-14 | 2012-01-10 | Amkor Technology, Inc. | System and method for RF shielding of a semiconductor package |
JP5829562B2 (ja) * | 2012-03-28 | 2015-12-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5988003B1 (ja) | 2016-03-23 | 2016-09-07 | Tdk株式会社 | 電子回路パッケージ |
JP5988004B1 (ja) | 2016-04-12 | 2016-09-07 | Tdk株式会社 | 電子回路パッケージ |
JP6328698B2 (ja) * | 2016-07-26 | 2018-05-23 | Tdk株式会社 | 電子回路パッケージ |
CN211457877U (zh) * | 2017-02-23 | 2020-09-08 | 株式会社村田制作所 | 附带屏蔽板的电子部件和电子部件用屏蔽板 |
-
2017
- 2017-11-10 CN CN201790001360.0U patent/CN209658154U/zh active Active
- 2017-11-10 JP JP2018554878A patent/JP6478001B2/ja active Active
- 2017-11-10 WO PCT/JP2017/040504 patent/WO2018105307A1/ja active Application Filing
-
2019
- 2019-05-09 US US16/407,257 patent/US10879142B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN209658154U (zh) | 2019-11-19 |
US20190267301A1 (en) | 2019-08-29 |
WO2018105307A1 (ja) | 2018-06-14 |
US10879142B2 (en) | 2020-12-29 |
JPWO2018105307A1 (ja) | 2019-02-28 |
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