JP6473405B2 - 配線構造体の製造方法 - Google Patents
配線構造体の製造方法 Download PDFInfo
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- JP6473405B2 JP6473405B2 JP2015197522A JP2015197522A JP6473405B2 JP 6473405 B2 JP6473405 B2 JP 6473405B2 JP 2015197522 A JP2015197522 A JP 2015197522A JP 2015197522 A JP2015197522 A JP 2015197522A JP 6473405 B2 JP6473405 B2 JP 6473405B2
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- wiring pattern
- boron
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- 238000004519 manufacturing process Methods 0.000 title claims description 34
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 67
- 229910052796 boron Inorganic materials 0.000 claims description 67
- 239000002184 metal Substances 0.000 claims description 45
- 229910052751 metal Inorganic materials 0.000 claims description 45
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 35
- 229910052710 silicon Inorganic materials 0.000 claims description 35
- 239000010703 silicon Substances 0.000 claims description 35
- 239000000758 substrate Substances 0.000 claims description 30
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 25
- 238000007747 plating Methods 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 13
- 229910052759 nickel Inorganic materials 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 238000001947 vapour-phase growth Methods 0.000 claims description 3
- 238000007740 vapor deposition Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 239000011295 pitch Substances 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/18—Pretreatment of the material to be coated
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76874—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- H01—ELECTRIC ELEMENTS
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- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/147—Semiconductor insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Ceramic Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemically Coating (AREA)
- Electrodes Of Semiconductors (AREA)
Description
Claims (4)
- 配線パターンが設けられた配線構造体の製造方法であって、
少なくとも前記配線パターンの形成予定領域に沿ってシリコン基板の表面に絶縁層を形成する第1ステップと、
前記形成予定領域に沿って前記絶縁層上にボロン層を形成する第2ステップと、
めっきにより前記ボロン層上に選択的且つ等方的に形成可能な金属層を、めっきにより前記ボロン層上に形成する第3ステップと、を含む、配線構造体の製造方法。 - 前記第2ステップでは、気相成長法により前記絶縁層上に前記ボロン層を等方的に形成し、その後に前記形成予定領域に沿って前記ボロン層をパターニングする、請求項1記載の配線構造体の製造方法。
- 配線パターンが設けられた配線構造体の製造方法であって、
少なくとも前記配線パターンの形成予定領域に沿ってシリコン基板の表面に絶縁層を形成する第1ステップと、
前記形成予定領域に沿って前記絶縁層上にボロン層を形成する第2ステップと、
めっきにより前記ボロン層上に金属層を形成する第3ステップと、を含み、
前記第3ステップでは、めっきにより前記ボロン層上にニッケル層を形成する、配線構造体の製造方法。 - 前記第2ステップでは、気相成長法により前記絶縁層上に前記ボロン層を等方的に形成し、その後に前記形成予定領域に沿って前記ボロン層をパターニングする、請求項3記載の配線構造体の製造方法。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015197522A JP6473405B2 (ja) | 2015-10-05 | 2015-10-05 | 配線構造体の製造方法 |
PCT/JP2016/075680 WO2017061193A1 (ja) | 2015-10-05 | 2016-09-01 | 配線構造体の製造方法 |
EP16853347.9A EP3361494B1 (en) | 2015-10-05 | 2016-09-01 | Method for producing wiring structure |
CN201680058496.5A CN108140565B (zh) | 2015-10-05 | 2016-09-01 | 配线构造体的制造方法 |
US15/765,528 US11094547B2 (en) | 2015-10-05 | 2016-09-01 | Method for producing wiring structure |
TW105129031A TWI715625B (zh) | 2015-10-05 | 2016-09-08 | 配線構造體之製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015197522A JP6473405B2 (ja) | 2015-10-05 | 2015-10-05 | 配線構造体の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2017073417A JP2017073417A (ja) | 2017-04-13 |
JP6473405B2 true JP6473405B2 (ja) | 2019-02-20 |
Family
ID=58487433
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015197522A Active JP6473405B2 (ja) | 2015-10-05 | 2015-10-05 | 配線構造体の製造方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US11094547B2 (ja) |
EP (1) | EP3361494B1 (ja) |
JP (1) | JP6473405B2 (ja) |
CN (1) | CN108140565B (ja) |
TW (1) | TWI715625B (ja) |
WO (1) | WO2017061193A1 (ja) |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
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US5116589A (en) * | 1990-06-18 | 1992-05-26 | The United States Of America As Represented By The United States Department Of Energy | High density hexagonal boron nitride prepared by hot isostatic pressing in refractory metal containers |
US5842387A (en) * | 1994-11-07 | 1998-12-01 | Marcus; Robert B. | Knife blades having ultra-sharp cutting edges and methods of fabrication |
US6331483B1 (en) | 1998-12-18 | 2001-12-18 | Tokyo Electron Limited | Method of film-forming of tungsten |
TW411569B (en) * | 1999-01-05 | 2000-11-11 | Ind Tech Res Inst | Method of using the electroless plating technology to fabricate the copper/gold connections in integrated circuits |
JP3327244B2 (ja) * | 1999-03-12 | 2002-09-24 | 日本電気株式会社 | 半導体装置 |
US6693356B2 (en) * | 2002-03-27 | 2004-02-17 | Texas Instruments Incorporated | Copper transition layer for improving copper interconnection reliability |
US6933237B2 (en) * | 2002-06-21 | 2005-08-23 | Hewlett-Packard Development Company, L.P. | Substrate etch method and device |
DE10308855A1 (de) * | 2003-02-27 | 2004-09-16 | Infineon Technologies Ag | Elektronisches Bauteil und Halbleiterwafer, sowie Verfahren zur Herstellung derselben |
US7144803B2 (en) | 2003-04-17 | 2006-12-05 | Semiconductor Research Corporation | Methods of forming boron carbo-nitride layers for integrated circuit devices |
WO2006117884A1 (ja) * | 2005-04-26 | 2006-11-09 | Mitsui Mining & Smelting Co., Ltd. | Al-Ni-B合金配線材料及びそれを用いた素子構造 |
TWI429066B (zh) * | 2005-06-02 | 2014-03-01 | Sony Corp | Semiconductor image sensor module and manufacturing method thereof |
JP2007113092A (ja) * | 2005-10-21 | 2007-05-10 | Seiko Epson Corp | めっき方法 |
JP2008115448A (ja) * | 2006-11-07 | 2008-05-22 | Seiko Epson Corp | 無電解めっき方法 |
KR20080061978A (ko) * | 2006-12-28 | 2008-07-03 | 주식회사 하이닉스반도체 | 반도체 소자의 배선 형성방법 |
US7977791B2 (en) * | 2007-07-09 | 2011-07-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Selective formation of boron-containing metal cap pre-layer |
TWI509695B (zh) * | 2010-06-10 | 2015-11-21 | Asm Int | 使膜選擇性沈積於基板上的方法 |
JP2012077342A (ja) * | 2010-09-30 | 2012-04-19 | Yamato Denki Kogyo Kk | 金属パターンの形成方法 |
JP2012119381A (ja) * | 2010-11-29 | 2012-06-21 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
US8461043B2 (en) * | 2011-04-11 | 2013-06-11 | Micron Technology, Inc. | Barrier layer for integrated circuit contacts |
JP5559120B2 (ja) * | 2011-09-22 | 2014-07-23 | 株式会社東芝 | 不揮発性半導体記憶装置 |
CN113862634A (zh) * | 2012-03-27 | 2021-12-31 | 诺发系统公司 | 钨特征填充 |
AU2013249127B2 (en) * | 2012-04-19 | 2017-02-16 | Carnegie Mellon University | A metal-semiconductor-metal (MSM) heterojunction diode |
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2015
- 2015-10-05 JP JP2015197522A patent/JP6473405B2/ja active Active
-
2016
- 2016-09-01 CN CN201680058496.5A patent/CN108140565B/zh active Active
- 2016-09-01 US US15/765,528 patent/US11094547B2/en active Active
- 2016-09-01 EP EP16853347.9A patent/EP3361494B1/en active Active
- 2016-09-01 WO PCT/JP2016/075680 patent/WO2017061193A1/ja unknown
- 2016-09-08 TW TW105129031A patent/TWI715625B/zh active
Also Published As
Publication number | Publication date |
---|---|
JP2017073417A (ja) | 2017-04-13 |
EP3361494A1 (en) | 2018-08-15 |
EP3361494A4 (en) | 2019-05-22 |
EP3361494B1 (en) | 2020-06-17 |
US11094547B2 (en) | 2021-08-17 |
TW201724434A (zh) | 2017-07-01 |
TWI715625B (zh) | 2021-01-11 |
CN108140565A (zh) | 2018-06-08 |
WO2017061193A1 (ja) | 2017-04-13 |
CN108140565B (zh) | 2022-08-05 |
US20190080912A1 (en) | 2019-03-14 |
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