JP6371309B2 - 多層化された半導体素子のための寄生インダクタンス削減回路基板レイアウト設計 - Google Patents
多層化された半導体素子のための寄生インダクタンス削減回路基板レイアウト設計 Download PDFInfo
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- JP6371309B2 JP6371309B2 JP2015550750A JP2015550750A JP6371309B2 JP 6371309 B2 JP6371309 B2 JP 6371309B2 JP 2015550750 A JP2015550750 A JP 2015550750A JP 2015550750 A JP2015550750 A JP 2015550750A JP 6371309 B2 JP6371309 B2 JP 6371309B2
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- 230000003071 parasitic effect Effects 0.000 title description 15
- 230000009467 reduction Effects 0.000 title description 8
- 239000004065 semiconductor Substances 0.000 title description 6
- 239000003990 capacitor Substances 0.000 claims description 31
- 239000000758 substrate Substances 0.000 claims description 29
- 230000005291 magnetic effect Effects 0.000 claims description 11
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 101
- 230000000694 effects Effects 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 6
- 230000001360 synchronised effect Effects 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910021389 graphene Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- UBGOFPKOVIKDPL-UHFFFAOYSA-M sodium;hydroxy-[4-[(2-hydroxyacetyl)amino]phenyl]arsinate Chemical compound [Na+].OCC(=O)NC1=CC=C([As](O)([O-])=O)C=C1 UBGOFPKOVIKDPL-UHFFFAOYSA-M 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0243—Printed circuits associated with mounted high frequency components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0776—Resistance and impedance
- H05K2201/0792—Means against parasitic impedance; Means against eddy currents
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10166—Transistor
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Dc-Dc Converters (AREA)
- Structure Of Printed Boards (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
303 キャパシタ
305 最上層
306 スイッチ
307 同期整流器
308 ドライバ
309 シールド層
311 ビア
400 縦方向高周波電力ループ
402 最上層
404 キャパシタ
405 最下層
406 高周波電力ループ電流
407 空間
409 ビア
410 ビア
500 設計
501 最上層
502 最下層
503 第1の中間層
504 中間層
505 中間層
506 中間層
510 キャパシタ
512 電力ループ電流
513 ビア
514 ビア
515 帰還経路
516 経路
600 設計
612 電力ループ電流
613 ビア
615 帰還経路
616 経路
701 最上層
702 最下層
703 第1の中間層
704 第2の中間層
705 中間層距離
706 基板厚
Claims (10)
- 少なくとも1つのキャパシタ及び複数のトランジスタを含む回路のための回路基板であって、当該回路基板が、
前記キャパシタと前記複数のトランジスタが搭載された最上層であって、前記キャパシタと前記トランジスタのうちの1つのみとの間の第1の直接的な電気接続、及び高周波電力ループの一部を形成する、前記複数のトランジスタの間の第2の直接的な電気接続を有し、前記キャパシタに電気的に接続された少なくとも1つの第1ビア、及び前記複数のトランジスタのうちの1つに電気的に接続された少なくとも1つの第2ビアを更に含む、最上層と、
最下層と、
前記最上層と前記最下層との間に配置された複数の中間層であって、それぞれが当該中間層を貫通して伸びる前記少なくとも1つの第1ビア及び前記少なくとも1つの第2ビアを有する、複数の中間層とを備え、
前記中間層のうちの1つが、前記少なくとも1つの第1ビアを前記少なくとも1つの第2ビアに電気的に接続することにより、前記高周波電力ループを完成させる帰還経路を定める、回路基板。 - 前記中間層の前記帰還経路が、前記最上層の前記高周波電力ループの磁気の影響を削減するように配置される、請求項1に記載の回路基板。
- 前記中間層により定められる前記帰還経路が、前記最上層の前記高周波電力ループの経路の真下に配置される、請求項1に記載の回路基板。
- 前記複数のトランジスタが、窒化ガリウム(GaN)トランジスタである、請求項1に記載の回路基板。
- 前記キャパシタが、前記複数のトランジスタとともにスイッチング回路を形成する、請求項1に記載の回路基板。
- 前記キャパシタ及び前記複数のトランジスタが、スイッチング回路の構成要素である、請求項1に記載の回路基板。
- 前記キャパシタ及び前記複数のトランジスタが、電力コンバータの構成要素である、請求項1に記載の回路基板。
- 前記キャパシタ及び前記複数のトランジスタが、無線周波数(RF)増幅器の構成要素である、請求項1に記載の回路基板。
- 前記少なくとも1つの第1ビアが、前記キャパシタの下に配置され、前記少なくとも1つの第2ビアが、前記複数のトランジスタのうちの前記の1つのトランジスタの下に配置される、請求項1に記載の回路基板。
- 前記少なくとも1つの第1ビアを前記少なくとも1つの第2ビアに電気的に接続することにより前記帰還経路を定める前記中間層が、前記最上層に隣接する前記中間層である、請求項1に記載の回路基板。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201261747668P | 2012-12-31 | 2012-12-31 | |
US61/747,668 | 2012-12-31 | ||
PCT/US2013/077667 WO2014105887A1 (en) | 2012-12-31 | 2013-12-24 | Parasitic inductance reduction circuit board layout designs for multilayered semiconductor devices |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016503963A JP2016503963A (ja) | 2016-02-08 |
JP6371309B2 true JP6371309B2 (ja) | 2018-08-08 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015550750A Active JP6371309B2 (ja) | 2012-12-31 | 2013-12-24 | 多層化された半導体素子のための寄生インダクタンス削減回路基板レイアウト設計 |
Country Status (7)
Country | Link |
---|---|
US (1) | US9035417B2 (ja) |
JP (1) | JP6371309B2 (ja) |
KR (1) | KR102151200B1 (ja) |
CN (1) | CN105075405B (ja) |
DE (1) | DE112013006313B4 (ja) |
TW (1) | TWI544606B (ja) |
WO (1) | WO2014105887A1 (ja) |
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US20140183550A1 (en) | 2014-07-03 |
CN105075405A (zh) | 2015-11-18 |
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JP2016503963A (ja) | 2016-02-08 |
TWI544606B (zh) | 2016-08-01 |
TW201444055A (zh) | 2014-11-16 |
WO2014105887A1 (en) | 2014-07-03 |
CN105075405B (zh) | 2018-01-30 |
KR20150102983A (ko) | 2015-09-09 |
KR102151200B1 (ko) | 2020-09-03 |
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