JP6271463B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6271463B2 JP6271463B2 JP2015048663A JP2015048663A JP6271463B2 JP 6271463 B2 JP6271463 B2 JP 6271463B2 JP 2015048663 A JP2015048663 A JP 2015048663A JP 2015048663 A JP2015048663 A JP 2015048663A JP 6271463 B2 JP6271463 B2 JP 6271463B2
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/107—Indirect electrical connections, e.g. via an interposer, a flexible substrate, using TAB
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1434—Memory
- H01L2924/1435—Random access memory [RAM]
- H01L2924/1438—Flash memory
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Description
[1]半導体装置の構成
図1及び図2を用いて、実施形態に係る半導体装置の構成について説明する。
図示するように、半導体装置1は、基板10、半導体パッケージ20、異方導電シート30、及び部材40を備えている。
半導体パッケージ20は基板10上に実装されている。半導体パッケージ20の電極21は、基板10の電極11と対向している。異方導電シート30は、基板10と半導体パッケージ20との間に配置されている。
図3及び図4の断面図を用いて、半導体装置1が備える異方導電シート30の構成について説明する。
図1及び図2を用いて、半導体装置1が備える部材40の構成について説明する。
図8を用いて、実施形態に係る半導体装置の他の構成例について説明する。両面実装が可能な基板10Aを用いれば、基板10Aの両面にそれぞれ半導体パッケージ20A,20Bを実装することが可能である。
半導体パッケージ20Aは、基板10Aの第1面上に実装されている。半導体パッケージ20Aの電極21Aは、基板10Aの電極11Aと対向している。異方導電シート30Aは、基板10Aと半導体パッケージ20Aとの間に配置されている。
実施形態の半導体装置1,2によれば、基板への半導体パッケージの実装信頼性を向上することができる。
Claims (11)
- 第1の面及び第2の面を有する基板と、
前記第1の面の上方に配置された第1半導体パッケージと、
前記第2の面の上方に配置された第2半導体パッケージと、
前記第1の面と前記第1半導体パッケージとの間に設けられ、少なくとも一方の面に配置された吸盤と、前記基板と前記第1半導体パッケージとを電気的に接続する金属線を有する第1異方導電シートと、
前記第2の面と前記第2半導体パッケージとの間に設けられ、少なくとも一方の面に配置された吸盤と、前記基板と前記第2半導体パッケージとを電気的に接続する金属線を有する第2異方導電シートと、
を具備することを特徴とする半導体装置。 - 前記第1異方導電シートは、前記基板の前記第1の面に配置された電極と、前記第1半導体パッケージに配置された電極とを電気的に接続し、
前記第2異方導電シートは、前記基板の前記第2の面に配置された電極と、前記第2半導体パッケージに配置された電極とを電気的に接続することを特徴とする請求項1に記載の半導体装置。 - 前記金属線は前記第1及び第2異方導電シートの内部に第1のピッチで配置され、前記吸盤は前記第1及び第2異方導電シートに第2のピッチで配置され、
前記第1のピッチは前記第2のピッチより小さいことを特徴とする請求項1または2に記載の半導体装置。 - 前記第1及び第2異方導電シートは、少なくとも一方の面に粘着性を有することを特徴とする請求項1乃至3のいずれかに記載の半導体装置。
- 前記金属線の端部は、前記第1及び第2異方導電シートの前記一方の面及び他方の面から露出していることを特徴とする請求項1乃至4のいずれかに記載の半導体装置。
- 前記基板の前記第1の面と前記第1半導体パッケージとの間に設けられた部材をさらに備えることを特徴とする請求項1乃至5のいずれかに記載の半導体装置。
- 前記基板の前記第2の面と前記第2半導体パッケージとの間に設けられた部材をさらに備えることを特徴とする請求項6に記載の半導体装置。
- 前記部材は樹脂を含むことを特徴とする請求項6または7に記載の半導体装置。
- 前記部材はコネクタを含むことを特徴とする請求項6または7に記載の半導体装置。
- 前記部材はワイヤを含むことを特徴とする請求項6または7に記載の半導体装置。
- 前記第1半導体パッケージはNAND型フラッシュメモリを含み、前記第2半導体パッケージは前記NAND型フラッシュメモリを制御するコントローラを含むことを特徴とする請求項1乃至10のいずれかに記載の半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015048663A JP6271463B2 (ja) | 2015-03-11 | 2015-03-11 | 半導体装置 |
US15/055,278 US9773769B2 (en) | 2015-03-11 | 2016-02-26 | Semiconductor device |
CN201610127707.8A CN105977171B (zh) | 2015-03-11 | 2016-03-07 | 半导体装置 |
TW105107082A TWI616992B (zh) | 2015-03-11 | 2016-03-08 | 半導體裝置 |
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JP2015048663A JP6271463B2 (ja) | 2015-03-11 | 2015-03-11 | 半導体装置 |
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JP2016171139A JP2016171139A (ja) | 2016-09-23 |
JP6271463B2 true JP6271463B2 (ja) | 2018-01-31 |
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US (1) | US9773769B2 (ja) |
JP (1) | JP6271463B2 (ja) |
CN (1) | CN105977171B (ja) |
TW (1) | TWI616992B (ja) |
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US5371654A (en) * | 1992-10-19 | 1994-12-06 | International Business Machines Corporation | Three dimensional high performance interconnection package |
JPH11135551A (ja) | 1997-10-31 | 1999-05-21 | Sony Corp | 半導体装置及び半導体素子の実装方法 |
JP3063839B2 (ja) * | 1997-11-18 | 2000-07-12 | 日本電気株式会社 | 実装部品の実装構造および実装方法 |
JP2000174066A (ja) | 1998-12-07 | 2000-06-23 | Matsushita Electric Ind Co Ltd | 半導体装置の実装方法 |
JP2000180506A (ja) * | 1998-12-15 | 2000-06-30 | Nec Corp | 半導体装置検査用コンタクト装置 |
JP4180206B2 (ja) | 1999-11-12 | 2008-11-12 | リンテック株式会社 | 半導体装置の製造方法 |
JP2001351944A (ja) * | 2000-06-08 | 2001-12-21 | Nitto Denko Corp | 半導体装置の製造方法および異方導電性フィルム付き半導体ウエハの製造方法 |
JP2002141121A (ja) * | 2000-11-06 | 2002-05-17 | Hitachi Ltd | 異方導電性フィルムおよびそれを用いた半導体装置並びにその製造方法 |
AU2003220941A1 (en) * | 2002-03-20 | 2003-09-29 | J.S.T. Mfg. Co., Ltd. | Flexible good conductive layer and anisotropic conductive sheet comprising same |
TWI227924B (en) | 2002-10-25 | 2005-02-11 | Ki-Bon Cha | Stack package and manufacturing method thereof |
JP2006063399A (ja) * | 2004-08-27 | 2006-03-09 | Jsr Corp | 耐半田性金組成物およびその応用 |
US20070187844A1 (en) * | 2006-02-10 | 2007-08-16 | Wintec Industries, Inc. | Electronic assembly with detachable components |
KR20100033012A (ko) * | 2008-09-19 | 2010-03-29 | 주식회사 하이닉스반도체 | 반도체 패키지 및 이를 갖는 적층 반도체 패키지 |
TW201123365A (en) | 2009-12-21 | 2011-07-01 | Harvatek Corp | Method for manufacturing an LED structure applied to miniaturization electronic product |
JP5301490B2 (ja) * | 2010-03-30 | 2013-09-25 | 富士フイルム株式会社 | 多層配線基板 |
US8258012B2 (en) | 2010-05-14 | 2012-09-04 | Stats Chippac, Ltd. | Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die |
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JP2012156465A (ja) * | 2011-01-28 | 2012-08-16 | Hitachi Ulsi Systems Co Ltd | 半導体装置 |
JP5741188B2 (ja) * | 2011-04-27 | 2015-07-01 | デクセリアルズ株式会社 | 接続構造体の製造方法 |
TWI570864B (zh) | 2013-02-01 | 2017-02-11 | 英帆薩斯公司 | 具有焊線通孔的微電子封裝、其之製造方法以及用於其之硬化層 |
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2015
- 2015-03-11 JP JP2015048663A patent/JP6271463B2/ja active Active
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2016
- 2016-02-26 US US15/055,278 patent/US9773769B2/en active Active
- 2016-03-07 CN CN201610127707.8A patent/CN105977171B/zh active Active
- 2016-03-08 TW TW105107082A patent/TWI616992B/zh active
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Publication number | Publication date |
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CN105977171B (zh) | 2018-10-16 |
TWI616992B (zh) | 2018-03-01 |
TW201633472A (zh) | 2016-09-16 |
CN105977171A (zh) | 2016-09-28 |
JP2016171139A (ja) | 2016-09-23 |
US20160268242A1 (en) | 2016-09-15 |
US9773769B2 (en) | 2017-09-26 |
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