JP6232219B2 - 多層保護膜の形成方法 - Google Patents

多層保護膜の形成方法 Download PDF

Info

Publication number
JP6232219B2
JP6232219B2 JP2013136309A JP2013136309A JP6232219B2 JP 6232219 B2 JP6232219 B2 JP 6232219B2 JP 2013136309 A JP2013136309 A JP 2013136309A JP 2013136309 A JP2013136309 A JP 2013136309A JP 6232219 B2 JP6232219 B2 JP 6232219B2
Authority
JP
Japan
Prior art keywords
gas
silicon
film
protective film
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2013136309A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015012131A (ja
Inventor
哲也 高藤
哲也 高藤
幸夫 渡邉
幸夫 渡邉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2013136309A priority Critical patent/JP6232219B2/ja
Priority to TW103121009A priority patent/TWI665730B/zh
Priority to KR1020140077930A priority patent/KR20150002498A/ko
Priority to CN201410299457.7A priority patent/CN104250724B/zh
Publication of JP2015012131A publication Critical patent/JP2015012131A/ja
Priority to KR1020170074889A priority patent/KR102047591B1/ko
Application granted granted Critical
Publication of JP6232219B2 publication Critical patent/JP6232219B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • H10K50/844Encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1262Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • H10K50/844Encapsulations
    • H10K50/8445Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
JP2013136309A 2013-06-28 2013-06-28 多層保護膜の形成方法 Active JP6232219B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2013136309A JP6232219B2 (ja) 2013-06-28 2013-06-28 多層保護膜の形成方法
TW103121009A TWI665730B (zh) 2013-06-28 2014-06-18 Method for forming multilayer protective film and device for forming multilayer protective film
KR1020140077930A KR20150002498A (ko) 2013-06-28 2014-06-25 다층 보호막의 형성 방법 및 다층 보호막의 형성 장치
CN201410299457.7A CN104250724B (zh) 2013-06-28 2014-06-26 多层保护膜的形成方法和多层保护膜的形成装置
KR1020170074889A KR102047591B1 (ko) 2013-06-28 2017-06-14 다층 보호막의 형성 방법 및 다층 보호막의 형성 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013136309A JP6232219B2 (ja) 2013-06-28 2013-06-28 多層保護膜の形成方法

Publications (2)

Publication Number Publication Date
JP2015012131A JP2015012131A (ja) 2015-01-19
JP6232219B2 true JP6232219B2 (ja) 2017-11-15

Family

ID=52185967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013136309A Active JP6232219B2 (ja) 2013-06-28 2013-06-28 多層保護膜の形成方法

Country Status (4)

Country Link
JP (1) JP6232219B2 (ko)
KR (2) KR20150002498A (ko)
CN (1) CN104250724B (ko)
TW (1) TWI665730B (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6523071B2 (ja) * 2015-06-19 2019-05-29 東京エレクトロン株式会社 プラズマを用いた成膜方法
US11302717B2 (en) * 2016-04-08 2022-04-12 Semiconductor Energy Laboratory Co., Ltd. Transistor and method for manufacturing the same
JP6689140B2 (ja) 2016-06-17 2020-04-28 東京エレクトロン株式会社 成膜方法およびtftの製造方法
JP6924943B2 (ja) 2017-05-12 2021-08-25 東京エレクトロン株式会社 成膜方法及び成膜装置
JP7130548B2 (ja) * 2018-07-30 2022-09-05 東京エレクトロン株式会社 成膜方法及び成膜装置
KR102151101B1 (ko) 2018-12-07 2020-09-02 연세대학교 산학협력단 산화물 반도체 박막 트랜지스터
JP7240946B2 (ja) 2019-04-26 2023-03-16 株式会社トリケミカル研究所 酸化珪素膜形成方法
CN110429024B (zh) 2019-08-08 2022-04-15 京东方科技集团股份有限公司 层间绝缘层及薄膜晶体管的制备方法
US11037851B2 (en) * 2019-08-30 2021-06-15 Applied Materials, Inc. Nitrogen-rich silicon nitride films for thin film transistors
JP7333758B2 (ja) 2020-01-23 2023-08-25 東京エレクトロン株式会社 成膜方法及び成膜装置
JP7418703B2 (ja) * 2020-07-01 2024-01-22 日新電機株式会社 薄膜トランジスタ
JP7540867B2 (ja) * 2020-11-18 2024-08-27 東京エレクトロン株式会社 窒化シリコン膜の成膜方法及び成膜装置
JP2024069058A (ja) 2022-11-09 2024-05-21 東京エレクトロン株式会社 成膜方法及び成膜装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3148183B2 (ja) 1998-08-31 2001-03-19 日本電気株式会社 半導体装置の製造方法
JP2000114257A (ja) * 1998-10-06 2000-04-21 Toshiba Corp 半導体装置の製造方法
JP4955848B2 (ja) * 2000-02-28 2012-06-20 エルジー ディスプレイ カンパニー リミテッド 電子素子用基板製造方法
JP2002368084A (ja) * 2001-06-12 2002-12-20 Hitachi Ltd 半導体集積回路装置の製造方法
US7696683B2 (en) * 2006-01-19 2010-04-13 Toppan Printing Co., Ltd. Organic electroluminescent element and the manufacturing method
JP2010087187A (ja) * 2008-09-30 2010-04-15 Tokyo Electron Ltd 酸化珪素膜およびその形成方法、コンピュータ読み取り可能な記憶媒体並びにプラズマcvd装置
JPWO2010038885A1 (ja) * 2008-09-30 2012-03-01 東京エレクトロン株式会社 窒化珪素膜およびその形成方法、コンピュータ読み取り可能な記憶媒体並びにプラズマcvd装置
JP5679143B2 (ja) * 2009-12-01 2015-03-04 ソニー株式会社 薄膜トランジスタならびに表示装置および電子機器
US9490368B2 (en) * 2010-05-20 2016-11-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method of the same
US8441010B2 (en) * 2010-07-01 2013-05-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN103098185B (zh) * 2010-08-20 2017-02-08 应用材料公司 形成无氢含硅介电薄膜的方法
JP5604316B2 (ja) * 2011-01-19 2014-10-08 株式会社アルバック 成膜方法

Also Published As

Publication number Publication date
KR102047591B1 (ko) 2019-11-21
KR20150002498A (ko) 2015-01-07
JP2015012131A (ja) 2015-01-19
KR20170069991A (ko) 2017-06-21
CN104250724B (zh) 2018-05-29
TWI665730B (zh) 2019-07-11
CN104250724A (zh) 2014-12-31
TW201515106A (zh) 2015-04-16

Similar Documents

Publication Publication Date Title
JP6232219B2 (ja) 多層保護膜の形成方法
JP6924943B2 (ja) 成膜方法及び成膜装置
TWI747910B (zh) 成膜方法及tft的製造方法
KR101870491B1 (ko) 플라즈마 처리 장치, 기판 처리 시스템, 박막 트랜지스터의 제조 방법 및 기억 매체
JP6349796B2 (ja) プラズマ処理装置、薄膜トランジスターの製造方法及び記憶媒体
JP6760439B2 (ja) 薄膜トランジスターの製造方法及び記憶媒体
TWI664678B (zh) 半導體裝置、其製造方法以及製造裝置
CN105489655B (zh) 电子设备及其制造方法和其制造装置
TW202105517A (zh) 蝕刻方法、半導體製造裝置及半導體裝置之製造方法
JP2008078253A (ja) 半導体装置の製造方法
JP7130548B2 (ja) 成膜方法及び成膜装置
JP7540867B2 (ja) 窒化シリコン膜の成膜方法及び成膜装置
KR102217171B1 (ko) 성막 방법 및 성막 장치
TW201903885A (zh) 含矽間隔物的選擇性形成
JP2007128924A (ja) 被膜窒化方法、被膜形成基板および窒化処理装置
JP2005251870A (ja) 酸化シリコンのエッチング方法、基板処理方法、及びエッチング装置

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160427

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20170222

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170227

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170425

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20171003

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20171023

R150 Certificate of patent or registration of utility model

Ref document number: 6232219

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250