JP6042564B2 - 基板をアライメントする装置及び方法 - Google Patents

基板をアライメントする装置及び方法 Download PDF

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JP6042564B2
JP6042564B2 JP2015551148A JP2015551148A JP6042564B2 JP 6042564 B2 JP6042564 B2 JP 6042564B2 JP 2015551148 A JP2015551148 A JP 2015551148A JP 2015551148 A JP2015551148 A JP 2015551148A JP 6042564 B2 JP6042564 B2 JP 6042564B2
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substrate
holder
marking
translation unit
calibration
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Japanese (ja)
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JP2016503589A5 (https=
JP2016503589A (ja
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ヴァーゲンライトナー トーマス
ヴァーゲンライトナー トーマス
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エーファウ・グループ・エー・タルナー・ゲーエムベーハー
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7088—Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2887—Features relating to contacting the IC under test, e.g. probe heads; chucks involving moving the probe head or the IC under test; docking stations
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691—Handling of masks or workpieces
    • G03F7/70733—Handling masks and workpieces, e.g. exchange of workpiece or mask, transport of workpiece or mask
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7007—Alignment other than original with workpiece
    • G03F9/7011—Pre-exposure scan; original with original holder alignment; Prealignment, i.e. workpiece with workpiece holder
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7023—Aligning or positioning in direction perpendicular to substrate surface
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H10P72/53—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment using optical controlling means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/78—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using vacuum or suction, e.g. Bernoulli chucks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • H10P74/238—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Length Measuring Devices By Optical Means (AREA)
JP2015551148A 2013-12-06 2013-12-06 基板をアライメントする装置及び方法 Active JP6042564B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2013/075831 WO2015082020A1 (de) 2013-12-06 2013-12-06 Vorrichtung und verfahren zum ausrichten von substraten

Publications (3)

Publication Number Publication Date
JP2016503589A JP2016503589A (ja) 2016-02-04
JP2016503589A5 JP2016503589A5 (https=) 2016-07-21
JP6042564B2 true JP6042564B2 (ja) 2016-12-14

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JP2015551148A Active JP6042564B2 (ja) 2013-12-06 2013-12-06 基板をアライメントする装置及び方法

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Country Link
US (1) US9851645B2 (https=)
EP (1) EP2893556B9 (https=)
JP (1) JP6042564B2 (https=)
KR (2) KR20150080449A (https=)
CN (1) CN105247670B (https=)
SG (1) SG11201406979VA (https=)
TW (1) TWI637458B (https=)
WO (1) WO2015082020A1 (https=)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150155211A1 (en) 2013-12-03 2015-06-04 Kulicke And Soffa Industries, Inc. Systems and methods for bonding semiconductor elements
CN105960703B (zh) 2014-02-03 2019-12-03 Ev 集团 E·索尔纳有限责任公司 用于结合基体的方法及装置
KR102306979B1 (ko) 2014-04-01 2021-09-30 에베 그룹 에. 탈너 게엠베하 기질의 표면 처리를 위한 방법 및 장치
SG11201603148VA (en) 2014-12-18 2016-07-28 Ev Group E Thallner Gmbh Method for bonding substrates
DE102015108901A1 (de) 2015-06-05 2016-12-08 Ev Group E. Thallner Gmbh Verfahren zum Ausrichten von Substraten vor dem Bonden
EP3433875B1 (de) 2016-03-22 2022-05-04 EV Group E. Thallner GmbH Verfahren zum bonden von substraten
KR102300481B1 (ko) 2016-08-12 2021-09-10 에베 그룹 에. 탈너 게엠베하 기판을 접합하기 위한 방법 및 샘플 홀더
EP3504733B1 (de) * 2016-08-29 2020-09-23 EV Group E. Thallner GmbH Verfahren und vorrichtung zum ausrichten von substraten
CN118737998A (zh) 2017-03-02 2024-10-01 Ev 集团 E·索尔纳有限责任公司 用于键合芯片的方法和装置
WO2018166605A1 (de) 2017-03-16 2018-09-20 Ev Group E. Thallner Gmbh Verfahren zum bonden von mindestens drei substraten
DE102017105697B4 (de) 2017-03-16 2025-12-31 Ev Group E. Thallner Gmbh Verfahren und System zur Ausrichtung zweier gegenüberliegend angeordneter optischer Teilsysteme und Kamerachip
CN110352488A (zh) 2017-03-20 2019-10-18 Ev 集团 E·索尔纳有限责任公司 用于对准两个基板的方法
EP3659055A4 (en) 2017-07-24 2021-04-28 Cerebras Systems Inc. DEVICE AND METHOD FOR MULTI-CHIP CONNECTION
WO2019040273A1 (en) 2017-08-24 2019-02-28 Cerebras Systems Inc. APPARATUS AND METHOD FOR FIXING COMPONENTS OF AN INTEGRATED CIRCUIT
EP3640975B1 (de) 2017-09-21 2024-11-20 EV Group E. Thallner GmbH Vorrichtung und verfahren zum bonden von substraten
TWI667728B (zh) * 2017-10-30 2019-08-01 財團法人工業技術研究院 晶片接合裝置、晶片接合的方法以及晶片封裝結構
US10541162B2 (en) * 2017-11-28 2020-01-21 Taiwan Semiconductor Manfacturing Co., Ltd. Systems and methods for wafer pod calibration
KR102020236B1 (ko) * 2018-04-20 2019-09-10 세메스 주식회사 패널 합착 장치
US10636688B2 (en) * 2018-06-22 2020-04-28 Taiwan Semiconductor Manufacturing Co., Ltd. Method for alignment, process tool and method for wafer-level alignment
US10957595B2 (en) 2018-10-16 2021-03-23 Cerebras Systems Inc. Systems and methods for precision fabrication of an orifice within an integrated circuit
US10953539B2 (en) * 2018-12-27 2021-03-23 Kawasaki Jukogyo Kabushiki Kaisha Substrate transfer robot and automatic teaching method
CN110246781B (zh) * 2019-05-29 2021-06-22 桂林立德智兴电子科技有限公司 一种半导体晶圆平坦化设备
JP7250641B2 (ja) * 2019-08-06 2023-04-03 キオクシア株式会社 アライメント装置及び半導体装置の製造方法
JP7564862B2 (ja) 2019-08-23 2024-10-09 エーファウ・グループ・エー・タルナー・ゲーエムベーハー 基板をアライメントする方法および装置
US11145530B2 (en) * 2019-11-08 2021-10-12 Cerebras Systems Inc. System and method for alignment of an integrated circuit
CN114730719B (zh) 2019-12-10 2025-12-30 Ev集团E·索尔纳有限责任公司 用于对准基板的方法和装置
JP7391733B2 (ja) * 2020-03-17 2023-12-05 キオクシア株式会社 半導体製造装置及び半導体装置の製造方法
CN111524449B (zh) * 2020-04-28 2022-03-29 昆山国显光电有限公司 贴合设备校正装置及方法、显示面板贴合设备及方法
DE102020126211A1 (de) 2020-05-28 2021-12-02 Taiwan Semiconductor Manufacturing Co. Ltd. Photolithographie-Ausrichtungsprozess für gebondete Wafer
EP4173028B1 (de) 2020-06-29 2024-04-10 EV Group E. Thallner GmbH Verfahren und vorrichtung zum bonden von substraten
JP7130720B2 (ja) * 2020-11-25 2022-09-05 エーファウ・グループ・エー・タルナー・ゲーエムベーハー 基板を位置合わせする方法および装置
US11845179B2 (en) * 2020-12-22 2023-12-19 Kawasaki Jukogyo Kabushiki Kaisha Wafer jig, robot system, communication method, and robot teaching method
TWI792785B (zh) * 2020-12-31 2023-02-11 南韓商Ｔｅｓ股份有限公司 基板接合裝置及基板接合方法
KR102677190B1 (ko) * 2020-12-31 2024-06-20 주식회사 테스 기판접합장치 및 기판접합방법
TWM627561U (zh) * 2021-08-26 2022-06-01 雷傑科技股份有限公司 對位設備
KR102880566B1 (ko) * 2021-12-17 2025-11-04 에베 그룹 에. 탈너 게엠베하 기판 정렬 방법 및 장치
CN114373686B (zh) 2022-03-21 2022-06-14 北京芯士联半导体科技有限公司 基板的接合方法
JP7809596B2 (ja) * 2022-06-15 2026-02-02 キオクシア株式会社 接合装置、接合方法、及び半導体装置の製造方法
CN119731776A (zh) 2022-09-02 2025-03-28 Ev 集团 E·索尔纳有限责任公司 具有优化真空密封件的真空基底支架
KR102749845B1 (ko) * 2022-11-14 2025-01-07 주식회사 큐빅셀 스캐닝 홀로그래피 기반의 기판 정렬 장치 및 방법
WO2025061255A1 (de) 2023-09-18 2025-03-27 Erich Thallner Substratstapel, modifiziertes schichtsystem, verfahren zum handhaben des substratstapels und vorrichtung für ein solches verfahren

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4573791A (en) * 1979-04-03 1986-03-04 Optimetrix Corporation Step-and-repeat projection alignment and exposure system
US4597664A (en) * 1980-02-29 1986-07-01 Optimetrix Corporation Step-and-repeat projection alignment and exposure system with auxiliary optical unit
US4810941A (en) * 1986-04-17 1989-03-07 Canon Kabushiki Kaisha Control system for a servomotor
JP3061150B2 (ja) 1991-05-16 2000-07-10 三井・デュポンポリケミカル株式会社 水性分散体組成物及びそれより形成される被膜ならびにその製法
JP2577140B2 (ja) 1991-05-27 1997-01-29 日立テクノエンジニアリング株式会社 基板の位置合わせ装置
US5639323A (en) * 1995-02-17 1997-06-17 Aiwa Research And Development, Inc. Method for aligning miniature device components
US6048750A (en) * 1997-11-24 2000-04-11 Micron Technology, Inc. Method for aligning and connecting semiconductor components to substrates
AT405775B (de) 1998-01-13 1999-11-25 Thallner Erich Verfahren und vorrichtung zum ausgerichteten zusammenführen von scheibenförmigen halbleitersubstraten
JP4315420B2 (ja) * 2003-04-18 2009-08-19 キヤノン株式会社 露光装置及び露光方法
WO2004103563A2 (en) * 2003-05-20 2004-12-02 Fluidigm Corporation Method and system for microfluidic device and imaging thereof
JP4626160B2 (ja) * 2004-03-04 2011-02-02 株式会社ニコン ウェハ重ね合わせ方法及びウェハ重ね合わせ装置
US7442476B2 (en) * 2004-12-27 2008-10-28 Asml Netherlands B.V. Method and system for 3D alignment in wafer scale integration
US7433038B2 (en) 2006-04-27 2008-10-07 Asml Netherlands B.V. Alignment of substrates for bonding
KR101236043B1 (ko) * 2006-07-14 2013-02-21 가부시키가이샤 니콘 스테이지 장치, 노광 장치 및 디바이스 제조 방법
TW200834730A (en) 2006-09-29 2008-08-16 Tokyo Electron Ltd Method for forming silicon oxide film, plasma processing apparatus and storage medium
US20080083818A1 (en) 2006-10-06 2008-04-10 Asml Netherlands B.V. Measuring the bonding of bonded substrates
TWI478271B (zh) 2007-08-10 2015-03-21 尼康股份有限公司 Substrate bonding device and substrate bonding method
TWI478272B (zh) 2007-08-15 2015-03-21 尼康股份有限公司 A positioning device, a bonding device, a laminated substrate manufacturing device, an exposure device, and a positioning method
US20090123874A1 (en) * 2007-11-14 2009-05-14 Tadashi Nagayama Exposure method, exposure apparatus, and method for manufacturing device
WO2010023935A1 (ja) * 2008-08-29 2010-03-04 株式会社ニコン 基板位置合わせ装置、基板位置合わせ方法および積層型半導体の製造方法
US8148646B2 (en) * 2008-09-29 2012-04-03 Formfactor, Inc. Process of positioning groups of contact structures
JP5353892B2 (ja) 2008-10-01 2013-11-27 株式会社ニコン アラインメント装置およびアラインメント方法
DE102009018977A1 (de) * 2009-04-25 2010-11-04 Ev Group Gmbh Vorrichtung zur Ausrichtung und Vorfixierung eines Wafers
EP2299472B1 (de) 2009-09-22 2020-07-08 EV Group E. Thallner GmbH Vorrichtung zum Ausrichten zweier Substrate
JP5565792B2 (ja) * 2009-11-02 2014-08-06 ボンドテック株式会社 アライメント装置
JP5628549B2 (ja) 2010-04-27 2014-11-19 芝浦メカトロニクス株式会社 基板貼合装置
JP5889581B2 (ja) * 2010-09-13 2016-03-22 東京エレクトロン株式会社 ウエハ検査装置
EP2463892B1 (de) 2010-12-13 2013-04-03 EV Group E. Thallner GmbH Einrichtung, Vorrichtung und Verfahren zur Ermittlung von Ausrichtungsfehlern
JP5139604B1 (ja) 2011-11-25 2013-02-06 信越エンジニアリング株式会社 基板搬送装置及び基板組み立てライン
CN103246170B (zh) * 2012-02-09 2015-07-08 中芯国际集成电路制造(上海)有限公司 曝光装置及曝光方法
SG2014014070A (en) * 2012-06-06 2014-06-27 Ev Group E Thallner Gmbh Device and method for determination of alignment errors
US9772564B2 (en) * 2012-11-12 2017-09-26 Nikon Corporation Exposure apparatus and exposure method, and device manufacturing method
JP6294686B2 (ja) * 2014-02-04 2018-03-14 キヤノン株式会社 インプリント装置、インプリント方法及び物品の製造方法

Also Published As

Publication number Publication date
KR20150080449A (ko) 2015-07-09
WO2015082020A1 (de) 2015-06-11
CN105247670A (zh) 2016-01-13
KR20160101202A (ko) 2016-08-24
CN105247670B (zh) 2018-06-12
US9851645B2 (en) 2017-12-26
SG11201406979VA (en) 2015-07-30
TW201523782A (zh) 2015-06-16
EP2893556B1 (de) 2018-01-10
TWI637458B (zh) 2018-10-01
EP2893556A1 (de) 2015-07-15
EP2893556B9 (de) 2018-09-12
JP2016503589A (ja) 2016-02-04
US20160240420A1 (en) 2016-08-18
KR101741384B1 (ko) 2017-05-29

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