JP5840658B2 - 電子パッケージモジュール及びその製造方法 - Google Patents
電子パッケージモジュール及びその製造方法 Download PDFInfo
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- JP5840658B2 JP5840658B2 JP2013169774A JP2013169774A JP5840658B2 JP 5840658 B2 JP5840658 B2 JP 5840658B2 JP 2013169774 A JP2013169774 A JP 2013169774A JP 2013169774 A JP2013169774 A JP 2013169774A JP 5840658 B2 JP5840658 B2 JP 5840658B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 33
- 238000007789 sealing Methods 0.000 claims description 118
- 239000010410 layer Substances 0.000 claims description 110
- 239000004020 conductor Substances 0.000 claims description 35
- 238000000034 method Methods 0.000 claims description 32
- 239000011247 coating layer Substances 0.000 claims description 9
- 239000003973 paint Substances 0.000 claims description 8
- 238000007639 printing Methods 0.000 claims description 7
- 239000008393 encapsulating agent Substances 0.000 claims description 5
- 239000002904 solvent Substances 0.000 claims description 5
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical group CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 4
- CYNYIHKIEHGYOZ-UHFFFAOYSA-N 1-bromopropane Chemical compound CCCBr CYNYIHKIEHGYOZ-UHFFFAOYSA-N 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims 1
- 230000001678 irradiating effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 13
- 238000005240 physical vapour deposition Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/1056—Metal over component, i.e. metal plate over component mounted on or embedded in PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1316—Moulded encapsulation of mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1327—Moulding over PCB locally or completely
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Light Receiving Elements (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Led Device Packages (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
100、200 電子パッケージモジュール
110、110’、210、210’ 回路基板
110a、110a’、212a、212a’ 載置面
110b 回路基板底面
112a、112b、112c パッド
112g 接地パッド
121a、121b 第1の電子素子
122a、122b 第2の電子素子
130a、130a’、130b、230 モールド封止体
130a” 残留モールド封止体
132a、230a 頂面
134a、136a、230s 側面
138a 開口
140 シールド導体層
150 マスクパターン層
150b 下表面
150e 空きスペース
150s 傾斜側面
150t 上表面
160 テンプレート
160a テンプレート体
160b 壁体
160s テンプレート傾斜側面
162 空きスペース
230b モールド封止体底面
A1、A2 夾角
C1 カッター
H1、H2 厚さ
L1 レーザービーム
S1 空間スペース
T1 溝部
Claims (11)
- 載置面を有する回路基板と、
前記載置面の上に実装される少なくとも一つの第1の電子素子と、
前記載置面の上に実装される少なくとも一つの第2の電子素子と、
前記載置面を部分的に被覆するように前記載置面の上に設置されており、前記少なくとも一つの第2の電子素子を封入せずに前記少なくとも一つの第1の電子素子を封入する少なくとも一つのモールド封止体と、
を含み、前記少なくとも1つの第2の電子素子は光電素子であり、
前記少なくとも一つのモールド封止体は開口及び前記開口に接続される側壁を有し、前記側壁は前記開口と前記載置面との間に位置し、前記少なくとも一つの第2の電子素子は前記開口に位置する
ことを特徴とする電子パッケージモジュール。 - 前記少なくとも一つのモールド封止体を被覆する少なくとも一つのシールド導体層を更に含み、前記回路基板は、前記載置面に設けられる少なくとも一つの接地パッドを更に備え、
前記少なくとも一つのシールド導体層は、前記少なくとも一つの接地パッドに接続されることを特徴とする請求項1に記載の電子パッケージモジュール。 - 前記少なくとも一つのモールド封止体は頂面及び前記頂面に接続される側面を有し、前記側面は前記頂面と前記載置面との間に位置し、前記少なくとも一つのシールド導体層は前記頂面及び前記側面を被覆することを特徴とする請求項2に記載の電子パッケージモジュール。
- 前記少なくとも一つのモールド封止体は頂面及び前記頂面に接続される側面を有し、前記側面は前記頂面と前記載置面との間に位置し、前記少なくとも一つのモールド封止体は前記頂面から前記載置面に向かって漸次狭くなっていることを特徴とする請求項1に記載の電子パッケージモジュール。
- 前記光電素子は画像センサー素子又は発光素子であることを特徴とする請求項1に記載の電子パッケージモジュール。
- 載置面を有する回路基板、前記載置面の上に実装された少なくとも一つの第1の電子素子及び前記載置面の上に実装された少なくとも一つの第2の電子素子を含む回路基板アセンブリの上に、前記載置面を部分的に被覆すると共に前記少なくとも一つの第2の電子素子を完全に被覆するように、前記少なくとも一つの第1の電子素子を位置させる少なくとも一つの前記載置面に対して傾斜角が90°より小さい傾斜側面を有する空きスペースを含むマスクパターン層を形成する工程と、
傾斜側面を有する前記空きスペースの中に、前記少なくとも一つの第1の電子素子を封入する少なくとも一つのモールド封止体を形成する工程と、
前記少なくとも一つのモールド封止体を形成した後、前記マスクパターン層を除去することによって前記少なくとも一つの第2の電子素子を露出させる工程と、
を含み、
前記マスクパターン層を除去する前に、前記少なくとも一つのモールド封止体をダイシングすることによって、前記載置面の一部及び前記回路基板の少なくとも一つの接地パッドを露出させる溝部であって、前記傾斜側面に付着した残留モールド封止体を前記モールド封止体から分離する溝部、を形成する工程と、
シールド導体層が前記少なくとも一つの溝部の中に延伸すると共に前記少なくとも一つの接地パッドに接触するように、前記少なくとも一つのモールド封止体を被覆する前記シールド導体層を形成する工程と、
前記シールド導体層を形成した後、前記マスクパターン層を除去する工程と、を更に含む
ことを特徴とする電子パッケージモジュールの製造方法。 - 前記マスクパターン層を形成する方法は、
前記少なくとも一つの第2の電子素子に対応する空きパターンを有すると共に前記回路基板アセンブリをカバーするためのテンプレートをマスクとして用いられ、塗装層が前記少なくとも一つの第2の電子素子を完全に被覆するように前記回路基板の上に前記塗装層を印刷する工程と、
前記塗装層を硬化する工程と、
を含むことを特徴とする請求項6に記載の電子パッケージモジュールの製造方法。 - 前記塗装層を硬化する方法は、前記塗装層を加熱すること若しくは前記塗装層に紫外線を照射することであることを特徴とする請求項7に記載の電子パッケージモジュールの製造方法。
- 前記マスクパターン層を除去する方法は、溶剤により前記マスクパターン層を溶解することであることを特徴とする請求項6に記載の電子パッケージモジュールの製造方法。
- 前記溶剤は、アセトン又はブロモプロパンであることを特徴とする請求項9に記載の電子パッケージモジュールの製造方法。
- 前記回路基板は、ダイシングして形成された回路基板ユニットであることを特徴とする請求項6に記載の電子パッケージモジュールの製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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TW101140726 | 2012-11-02 | ||
TW101140726A TWI502733B (zh) | 2012-11-02 | 2012-11-02 | 電子封裝模組及其製造方法 |
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JP2014093520A JP2014093520A (ja) | 2014-05-19 |
JP5840658B2 true JP5840658B2 (ja) | 2016-01-06 |
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US (1) | US9332646B2 (ja) |
JP (1) | JP5840658B2 (ja) |
DE (1) | DE102013103572A1 (ja) |
FR (1) | FR2997790B1 (ja) |
TW (1) | TWI502733B (ja) |
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2012
- 2012-11-02 TW TW101140726A patent/TWI502733B/zh active
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2013
- 2013-01-19 US US13/745,766 patent/US9332646B2/en active Active
- 2013-04-09 FR FR1353161A patent/FR2997790B1/fr active Active
- 2013-04-10 DE DE201310103572 patent/DE102013103572A1/de active Pending
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US10564679B2 (en) | 2018-04-05 | 2020-02-18 | Samsung Electro-Mechanics Co., Ltd. | Electronic device module, method of manufacturing the same and electronic apparatus |
US11209872B2 (en) | 2018-04-05 | 2021-12-28 | Samsung Electro-Mechanics Co., Ltd. | Electronic device module, method of manufacturing the same and electronic apparatus |
US11347273B2 (en) | 2018-04-05 | 2022-05-31 | Samsung Electro-Mechanics Co., Ltd. | Electronic device module, method of manufacturing the same and electronic apparatus |
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US9332646B2 (en) | 2016-05-03 |
TWI502733B (zh) | 2015-10-01 |
DE102013103572A1 (de) | 2014-02-13 |
US20140126161A1 (en) | 2014-05-08 |
FR2997790A1 (fr) | 2014-05-09 |
JP2014093520A (ja) | 2014-05-19 |
TW201419507A (zh) | 2014-05-16 |
FR2997790B1 (fr) | 2019-04-05 |
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