JP5820267B2 - 配線用セルフアライン(自己整合)バリア層 - Google Patents

配線用セルフアライン(自己整合)バリア層 Download PDF

Info

Publication number
JP5820267B2
JP5820267B2 JP2011500986A JP2011500986A JP5820267B2 JP 5820267 B2 JP5820267 B2 JP 5820267B2 JP 2011500986 A JP2011500986 A JP 2011500986A JP 2011500986 A JP2011500986 A JP 2011500986A JP 5820267 B2 JP5820267 B2 JP 5820267B2
Authority
JP
Japan
Prior art keywords
metal
copper
deposited
depositing
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2011500986A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011525697A (ja
JP2011525697A5 (https=
Inventor
ゴードン,ロイ・ジェラルド
キム,フーン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harvard University
Original Assignee
Harvard University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harvard University filed Critical Harvard University
Publication of JP2011525697A publication Critical patent/JP2011525697A/ja
Publication of JP2011525697A5 publication Critical patent/JP2011525697A5/ja
Application granted granted Critical
Publication of JP5820267B2 publication Critical patent/JP5820267B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/052Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by treatments not introducing additional elements therein
    • H10W20/0526Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by treatments not introducing additional elements therein by thermal treatment thereof
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/16Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal carbonyl compounds
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/18Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43Chemical deposition, e.g. chemical vapour deposition [CVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/037Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics the barrier, adhesion or liner layers being on top of a main fill metal
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/043Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroplating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/047Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein
    • H10W20/049Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein by diffusing alloying elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/055Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by formation methods other than physical vapour deposition [PVD], chemical vapour deposition [CVD] or liquid deposition
    • H10W20/0552Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by formation methods other than physical vapour deposition [PVD], chemical vapour deposition [CVD] or liquid deposition by diffusing metallic dopants to react with dielectrics
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/075Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers of multilayered thin functional dielectric layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/0888Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures wherein via-level dielectrics are compositionally different than trench-level dielectrics

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Wire Bonding (AREA)
JP2011500986A 2008-03-21 2009-03-20 配線用セルフアライン(自己整合)バリア層 Expired - Fee Related JP5820267B2 (ja)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US3865708P 2008-03-21 2008-03-21
US61/038,657 2008-03-21
US4323608P 2008-04-08 2008-04-08
US61/043,236 2008-04-08
US7446708P 2008-06-20 2008-06-20
US61/074,467 2008-06-20
PCT/US2009/037826 WO2009117670A2 (en) 2008-03-21 2009-03-20 Self-aligned barrier layers for interconnects

Publications (3)

Publication Number Publication Date
JP2011525697A JP2011525697A (ja) 2011-09-22
JP2011525697A5 JP2011525697A5 (https=) 2012-05-17
JP5820267B2 true JP5820267B2 (ja) 2015-11-24

Family

ID=41091558

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011500986A Expired - Fee Related JP5820267B2 (ja) 2008-03-21 2009-03-20 配線用セルフアライン(自己整合)バリア層

Country Status (5)

Country Link
US (2) US7932176B2 (https=)
JP (1) JP5820267B2 (https=)
KR (2) KR101649714B1 (https=)
CN (1) CN102132398B (https=)
WO (1) WO2009117670A2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8933579B2 (en) * 2009-03-27 2015-01-13 The Japan Research Institute, Limited Manufacturing method and vehicle

Families Citing this family (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4783561B2 (ja) * 2004-09-27 2011-09-28 株式会社アルバック 銅配線の形成方法
EP1909320A1 (en) * 2006-10-05 2008-04-09 ST Microelectronics Crolles 2 SAS Copper diffusion barrier
JP5820267B2 (ja) 2008-03-21 2015-11-24 プレジデント アンド フェローズ オブ ハーバード カレッジ 配線用セルフアライン(自己整合)バリア層
JP5507909B2 (ja) * 2009-07-14 2014-05-28 東京エレクトロン株式会社 成膜方法
AU2010310750B2 (en) * 2009-10-23 2015-02-26 President And Fellows Of Harvard College Self-aligned barrier and capping layers for interconnects
CN103400857B (zh) 2009-11-27 2016-12-28 株式会社半导体能源研究所 半导体装置和及其制造方法
US8138084B2 (en) 2009-12-23 2012-03-20 Intel Corporation Electroless Cu plating for enhanced self-forming barrier layers
US20110266676A1 (en) * 2010-05-03 2011-11-03 Toshiba America Electronic Components, Inc. Method for forming interconnection line and semiconductor structure
US9926639B2 (en) 2010-07-16 2018-03-27 Applied Materials, Inc. Methods for forming barrier/seed layers for copper interconnect structures
US8492289B2 (en) 2010-09-15 2013-07-23 International Business Machines Corporation Barrier layer formation for metal interconnects through enhanced impurity diffusion
JP5857970B2 (ja) 2010-11-02 2016-02-10 宇部興産株式会社 (アミドアミノアルカン)金属化合物、及び当該金属化合物を用いた金属含有薄膜の製造方法
US8492897B2 (en) 2011-09-14 2013-07-23 International Business Machines Corporation Microstructure modification in copper interconnect structures
US9190323B2 (en) * 2012-01-19 2015-11-17 GlobalFoundries, Inc. Semiconductor devices with copper interconnects and methods for fabricating same
WO2013153777A1 (ja) * 2012-04-11 2013-10-17 東京エレクトロン株式会社 半導体装置の製造方法、半導体装置、半導体製造装置
US9048294B2 (en) 2012-04-13 2015-06-02 Applied Materials, Inc. Methods for depositing manganese and manganese nitrides
US9076661B2 (en) 2012-04-13 2015-07-07 Applied Materials, Inc. Methods for manganese nitride integration
US9054109B2 (en) * 2012-05-29 2015-06-09 International Business Machines Corporation Corrosion/etching protection in integration circuit fabrications
US8710660B2 (en) * 2012-07-20 2014-04-29 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid interconnect scheme including aluminum metal line in low-k dielectric
CN102768988B (zh) * 2012-07-25 2014-10-15 上海华力微电子有限公司 一种有效判定铜扩散阻挡层阻挡能力的方法
JP5969306B2 (ja) 2012-08-08 2016-08-17 東京エレクトロン株式会社 Cu配線の形成方法
US8765602B2 (en) 2012-08-30 2014-07-01 International Business Machines Corporation Doping of copper wiring structures in back end of line processing
JP6117588B2 (ja) 2012-12-12 2017-04-19 東京エレクトロン株式会社 Cu配線の形成方法
JP6030439B2 (ja) * 2012-12-27 2016-11-24 東京エレクトロン株式会社 マンガン含有膜の形成方法、処理システム、および電子デバイスの製造方法
JP2014141739A (ja) 2012-12-27 2014-08-07 Tokyo Electron Ltd 金属マンガン膜の成膜方法、処理システム、電子デバイスの製造方法および電子デバイス
US9209134B2 (en) * 2013-03-14 2015-12-08 Intermolecular, Inc. Method to increase interconnect reliability
US9184093B2 (en) 2013-03-15 2015-11-10 Applied Materials, Inc. Integrated cluster to enable next generation interconnect
CN104103575B (zh) * 2013-04-10 2017-12-29 中芯国际集成电路制造(上海)有限公司 铜互连线的形成方法
US9064937B2 (en) 2013-05-30 2015-06-23 International Business Machines Corporation Substrate bonding with diffusion barrier structures
JP6257217B2 (ja) 2013-08-22 2018-01-10 東京エレクトロン株式会社 Cu配線構造の形成方法
US9362228B2 (en) * 2013-10-22 2016-06-07 Globalfoundries Inc. Electro-migration enhancing method for self-forming barrier process in copper metalization
US9043743B2 (en) * 2013-10-22 2015-05-26 International Business Machines Corporation Automated residual material detection
US9275952B2 (en) 2014-01-24 2016-03-01 International Business Machines Corporation Ultrathin superlattice of MnO/Mn/MnN and other metal oxide/metal/metal nitride liners and caps for copper low dielectric constant interconnects
US9343357B2 (en) * 2014-02-28 2016-05-17 Qualcomm Incorporated Selective conductive barrier layer formation
FR3025396A1 (fr) 2014-09-02 2016-03-04 St Microelectronics Tours Sas Procede de fabrication d'un element de connexion electrique
US9728502B2 (en) * 2014-11-10 2017-08-08 Samsung Electronics Co., Ltd. Metal oxysilicate diffusion barriers for damascene metallization with low RC delays and methods for forming the same
JP2016167545A (ja) * 2015-03-10 2016-09-15 東京エレクトロン株式会社 ビアホール底のクリーニング方法および半導体装置の製造方法
JP2017050304A (ja) 2015-08-31 2017-03-09 東京エレクトロン株式会社 半導体装置の製造方法
US9842805B2 (en) 2015-09-24 2017-12-12 International Business Machines Corporation Drive-in Mn before copper plating
JP6559046B2 (ja) * 2015-11-04 2019-08-14 東京エレクトロン株式会社 パターン形成方法
US20160083405A1 (en) * 2015-11-30 2016-03-24 L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude Tantalum- or vanadium-containing film forming compositions and vapor deposition of tantalum- or vanadium-containing films
JP2017135237A (ja) * 2016-01-27 2017-08-03 東京エレクトロン株式会社 Cu配線の製造方法およびCu配線製造システム
US10049974B2 (en) 2016-08-30 2018-08-14 International Business Machines Corporation Metal silicate spacers for fully aligned vias
US10229851B2 (en) 2016-08-30 2019-03-12 International Business Machines Corporation Self-forming barrier for use in air gap formation
US9786760B1 (en) 2016-09-29 2017-10-10 International Business Machines Corporation Air gap and air spacer pinch off
US11024538B2 (en) * 2016-12-31 2021-06-01 Intel Corporation Hardened plug for improved shorting margin
US10760156B2 (en) 2017-10-13 2020-09-01 Honeywell International Inc. Copper manganese sputtering target
CN108047274B (zh) * 2017-12-15 2019-08-20 江南大学 一种铜互连阻挡层材料用吡啶基Mn(Ⅱ)化合物
US10204829B1 (en) 2018-01-12 2019-02-12 International Business Machines Corporation Low-resistivity metallic interconnect structures with self-forming diffusion barrier layers
US11035036B2 (en) 2018-02-01 2021-06-15 Honeywell International Inc. Method of forming copper alloy sputtering targets with refined shape and microstructure
US11152294B2 (en) 2018-04-09 2021-10-19 Corning Incorporated Hermetic metallized via with improved reliability
US11133216B2 (en) 2018-06-01 2021-09-28 International Business Machines Corporation Interconnect structure
WO2020061437A1 (en) 2018-09-20 2020-03-26 Industrial Technology Research Institute Copper metallization for through-glass vias on thin glass
WO2020171940A1 (en) 2019-02-21 2020-08-27 Corning Incorporated Glass or glass ceramic articles with copper-metallized through holes and processes for making the same
US10818589B2 (en) 2019-03-13 2020-10-27 International Business Machines Corporation Metal interconnect structures with self-forming sidewall barrier layer
JP7161767B2 (ja) * 2019-04-22 2022-10-27 気相成長株式会社 形成材料、形成方法、及び新規化合物
KR20220053482A (ko) * 2020-10-22 2022-04-29 에이에스엠 아이피 홀딩 비.브이. 바나듐 금속을 증착하는 방법, 구조체, 소자 및 증착 어셈블리
CN112687617B (zh) * 2020-12-24 2022-07-22 中国电子科技集团公司第十三研究所 绝缘子针的制备方法及绝缘子针

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6077774A (en) * 1996-03-29 2000-06-20 Texas Instruments Incorporated Method of forming ultra-thin and conformal diffusion barriers encapsulating copper
US6060534A (en) 1996-07-11 2000-05-09 Scimed Life Systems, Inc. Medical devices comprising ionically and non-ionically crosslinked polymer hydrogels having improved mechanical properties
US6951682B1 (en) 1998-12-01 2005-10-04 Syntrix Biochip, Inc. Porous coatings bearing ligand arrays and use thereof
US6203613B1 (en) * 1999-10-19 2001-03-20 International Business Machines Corporation Atomic layer deposition with nitrate containing precursors
KR100383759B1 (ko) 2000-06-15 2003-05-14 주식회사 하이닉스반도체 반도체 소자의 구리 금속 배선 형성 방법
US6413815B1 (en) * 2001-07-17 2002-07-02 Macronix International Co., Ltd. Method of forming a MIM capacitor
US20030134499A1 (en) * 2002-01-15 2003-07-17 International Business Machines Corporation Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof
DE60330896D1 (de) 2002-11-15 2010-02-25 Harvard College Atomlagenabscheidung (ald) mit hilfe von metallamidinaten
US7026714B2 (en) * 2003-03-18 2006-04-11 Cunningham James A Copper interconnect systems which use conductive, metal-based cap layers
KR100563817B1 (ko) 2003-12-30 2006-03-28 동부아남반도체 주식회사 반도체 소자의 구리 배선 형성 방법
JP4478038B2 (ja) 2004-02-27 2010-06-09 株式会社半導体理工学研究センター 半導体装置及びその製造方法
DE102004019241A1 (de) 2004-04-16 2005-11-03 Cellmed Ag Injizierbare vernetzte und unvernetzte Alginate und ihre Verwendung in der Medizin und in der ästhetischen Chirurgie
US7879710B2 (en) 2005-05-18 2011-02-01 Intermolecular, Inc. Substrate processing including a masking layer
EP1909320A1 (en) * 2006-10-05 2008-04-09 ST Microelectronics Crolles 2 SAS Copper diffusion barrier
JP4236201B2 (ja) * 2005-08-30 2009-03-11 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
JP4272191B2 (ja) * 2005-08-30 2009-06-03 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
JP2007103546A (ja) 2005-10-03 2007-04-19 Nec Electronics Corp 半導体装置およびその製造方法
WO2007066277A2 (en) 2005-12-07 2007-06-14 Nxp B.V. A method of forming a layer over a surface of a first material embedded in a second material in a structure for a semiconductor device
KR101351286B1 (ko) * 2005-12-20 2014-02-17 시바 홀딩 인크 옥심 에스테르 광개시제
JP2007173511A (ja) * 2005-12-22 2007-07-05 Sony Corp 半導体装置の製造方法
JP4741965B2 (ja) * 2006-03-23 2011-08-10 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP2007308789A (ja) 2006-04-19 2007-11-29 Tokyo Electron Ltd 成膜装置及び成膜方法
JP2008013848A (ja) 2006-06-08 2008-01-24 Tokyo Electron Ltd 成膜装置及び成膜方法
US20080032064A1 (en) 2006-07-10 2008-02-07 President And Fellows Of Harvard College Selective sealing of porous dielectric materials
JP5145225B2 (ja) * 2006-07-14 2013-02-13 株式会社アルバック 半導体装置の製造方法
KR101629965B1 (ko) * 2007-04-09 2016-06-13 프레지던트 앤드 펠로우즈 오브 하바드 칼리지 구리 배선용 코발트 질화물층 및 이의 제조방법
DE102007035837A1 (de) * 2007-07-31 2009-02-05 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauelement mit einer Kornorientierungsschicht
US7884475B2 (en) * 2007-10-16 2011-02-08 International Business Machines Corporation Conductor structure including manganese oxide capping layer
US20090117731A1 (en) * 2007-11-01 2009-05-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor interconnection structure and method for making the same
US7555191B1 (en) 2008-01-30 2009-06-30 Joshua John Edward Moore Self-locking unidirectional interposer springs for optical transceiver modules
US7651943B2 (en) * 2008-02-18 2010-01-26 Taiwan Semicondcutor Manufacturing Company, Ltd. Forming diffusion barriers by annealing copper alloy layers
JP5820267B2 (ja) * 2008-03-21 2015-11-24 プレジデント アンド フェローズ オブ ハーバード カレッジ 配線用セルフアライン(自己整合)バリア層

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8933579B2 (en) * 2009-03-27 2015-01-13 The Japan Research Institute, Limited Manufacturing method and vehicle

Also Published As

Publication number Publication date
CN102132398A (zh) 2011-07-20
KR20120020035A (ko) 2012-03-07
KR101649714B1 (ko) 2016-08-30
US7932176B2 (en) 2011-04-26
WO2009117670A2 (en) 2009-09-24
KR20160102570A (ko) 2016-08-30
US20110254164A1 (en) 2011-10-20
CN102132398B (zh) 2015-01-28
US20090263965A1 (en) 2009-10-22
JP2011525697A (ja) 2011-09-22
WO2009117670A3 (en) 2012-03-22
US8222134B2 (en) 2012-07-17
HK1159852A1 (en) 2012-08-03
KR101803221B1 (ko) 2017-11-29

Similar Documents

Publication Publication Date Title
JP5820267B2 (ja) 配線用セルフアライン(自己整合)バリア層
JP5809153B2 (ja) 相互接続用自己整合バリアおよびキャッピング層
US8058728B2 (en) Diffusion barrier and adhesion layer for an interconnect structure
US7727883B2 (en) Method of forming a diffusion barrier and adhesion layer for an interconnect structure
TWI694501B (zh) 防止銅擴散的介電/金屬阻障集成
CN101034695A (zh) 半导体结构和制造半导体结构的方法
US8895441B2 (en) Methods and materials for anchoring gapfill metals
HK1159852B (en) Self-aligned barrier layers for interconnects
AU2013204566A1 (en) Self-aligned barrier and capping layers for interconnects
HK1177326A (en) Self-aligned barrier and capping layers for interconnects

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120321

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120321

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20131017

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131018

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20140117

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20140124

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20140214

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20140221

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20140317

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20140325

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140418

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20141201

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20150227

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20150330

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20150501

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20150508

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150601

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20150623

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150814

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20150903

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20151002

R150 Certificate of patent or registration of utility model

Ref document number: 5820267

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees