JP5662701B2 - クロック供給装置 - Google Patents

クロック供給装置 Download PDF

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Publication number
JP5662701B2
JP5662701B2 JP2010120371A JP2010120371A JP5662701B2 JP 5662701 B2 JP5662701 B2 JP 5662701B2 JP 2010120371 A JP2010120371 A JP 2010120371A JP 2010120371 A JP2010120371 A JP 2010120371A JP 5662701 B2 JP5662701 B2 JP 5662701B2
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JP
Japan
Prior art keywords
clock
signal
reset
flip
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2010120371A
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English (en)
Japanese (ja)
Other versions
JP2011248579A (ja
JP2011248579A5 (enExample
Inventor
伊藤　直紹
直紹 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2010120371A priority Critical patent/JP5662701B2/ja
Priority to US13/113,823 priority patent/US8487672B2/en
Publication of JP2011248579A publication Critical patent/JP2011248579A/ja
Priority to US13/914,326 priority patent/US8698526B2/en
Publication of JP2011248579A5 publication Critical patent/JP2011248579A5/ja
Application granted granted Critical
Publication of JP5662701B2 publication Critical patent/JP5662701B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/06—Clock generators producing several clock signals
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
JP2010120371A 2010-05-26 2010-05-26 クロック供給装置 Active JP5662701B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2010120371A JP5662701B2 (ja) 2010-05-26 2010-05-26 クロック供給装置
US13/113,823 US8487672B2 (en) 2010-05-26 2011-05-23 Clock supply apparatus
US13/914,326 US8698526B2 (en) 2010-05-26 2013-06-10 Clock supply apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010120371A JP5662701B2 (ja) 2010-05-26 2010-05-26 クロック供給装置

Publications (3)

Publication Number Publication Date
JP2011248579A JP2011248579A (ja) 2011-12-08
JP2011248579A5 JP2011248579A5 (enExample) 2013-07-04
JP5662701B2 true JP5662701B2 (ja) 2015-02-04

Family

ID=45021579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010120371A Active JP5662701B2 (ja) 2010-05-26 2010-05-26 クロック供給装置

Country Status (2)

Country Link
US (2) US8487672B2 (enExample)
JP (1) JP5662701B2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012010926A1 (en) * 2010-07-20 2012-01-26 Freescale Semiconductor, Inc. Electronic circuit, safety critical system, and method for providing a reset signal
TWI568182B (zh) * 2012-03-09 2017-01-21 鈺創科技股份有限公司 輸入接收電路及其操作方法
US9419630B2 (en) * 2014-12-29 2016-08-16 Texas Instruments Incorporated Phase shifted coarse/fine clock dithering responsive to controller select signals
KR102387466B1 (ko) * 2015-09-18 2022-04-15 삼성전자주식회사 반도체 장치
CN106992770B (zh) * 2016-01-21 2021-03-30 华为技术有限公司 时钟电路及其传输时钟信号的方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2040628A (en) * 1979-01-29 1980-08-28 Control Data Corp A clock pulse circuit
JPH02292613A (ja) * 1989-05-02 1990-12-04 Hitachi Ltd Ｎ倍周期クロック生成方式および回路ならびに情報処理システム
JP3119628B2 (ja) 1998-08-21 2000-12-25 甲府日本電気株式会社 消費電力低減回路
JP2001005552A (ja) * 1999-06-18 2001-01-12 Nec Eng Ltd 消費電力低減回路
JP2003256068A (ja) * 2002-03-04 2003-09-10 Seiko Epson Corp クロック制御システム
JP2004110718A (ja) * 2002-09-20 2004-04-08 Matsushita Electric Ind Co Ltd 半導体集積回路装置のリセット方法及び半導体集積回路装置
JP2005157883A (ja) * 2003-11-27 2005-06-16 Oki Electric Ind Co Ltd リセット回路
JP2009054031A (ja) * 2007-08-28 2009-03-12 Toshiba Corp リセット制御装置

Also Published As

Publication number Publication date
US8487672B2 (en) 2013-07-16
JP2011248579A (ja) 2011-12-08
US20130271189A1 (en) 2013-10-17
US8698526B2 (en) 2014-04-15
US20110291710A1 (en) 2011-12-01

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