JP5635613B2 - プリント回路基板及びその製造方法 - Google Patents
プリント回路基板及びその製造方法 Download PDFInfo
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- JP5635613B2 JP5635613B2 JP2012533067A JP2012533067A JP5635613B2 JP 5635613 B2 JP5635613 B2 JP 5635613B2 JP 2012533067 A JP2012533067 A JP 2012533067A JP 2012533067 A JP2012533067 A JP 2012533067A JP 5635613 B2 JP5635613 B2 JP 5635613B2
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- Prior art keywords
- insulating layer
- circuit board
- printed circuit
- embedded
- manufacturing
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- Expired - Fee Related
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- 238000004519 manufacturing process Methods 0.000 title claims description 29
- 238000000034 method Methods 0.000 claims description 26
- 239000000758 substrate Substances 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000007769 metal material Substances 0.000 claims description 8
- 238000010030 laminating Methods 0.000 claims description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 4
- 238000000206 photolithography Methods 0.000 claims description 4
- 238000011161 development Methods 0.000 claims description 3
- 238000007772 electroless plating Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 238000009713 electroplating Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 108
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 2
- 239000012792 core layer Substances 0.000 description 2
- 238000005868 electrolysis reaction Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
- H05K3/4658—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern characterized by laminating a prefabricated metal foil pattern, e.g. by transfer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/0108—Male die used for patterning, punching or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
以下、本発明の実施例が示された添付の図面を参照して本発明についてさらに詳細に説明する。明細書全体に亘って図中の同様の構成要素については同様の符号を付し、これについての重複説明は省略する。様々な構成要素を説明するために「第1」及び「第2」が使用されるが、構成要素はそれらの用語には限定されず、それらの用語は1つの構成要素を他の構成要素と区別するためにのみ用いられる。
ステップS1では、一方の面にシード層120が形成された第1絶縁層110を形成する。所定の凸状の回路パターンを有する金型Pを用意し、第1絶縁層110と目合わせする。金型Pのパターンをフォトリソグラフィー、もしくはレーザ加工等により形成してもよい。
次いで、ステップS5において、第1絶縁層110の下部に、第2絶縁層200と、内部回路310が形成されたベース基板300と、を配置する。その後、ステップS6において、第2絶縁層200とベース基板300とを加熱圧着してプリント回路基板を形成する。ステップ6の後に、フォトリソグラフィーによりプリント回路基板の所定の領域にビアホールを形成し、ビアホールを充填するステップを加えてもよい。
Claims (14)
- 一方の面に形成されたシード層と、内部に埋め込まれた少なくとも1つの金属パターンと、を有する第1絶縁層を形成する第1ステップと、
前記第1絶縁層とベース基板との間に第2絶縁層を挿入させて、前記第1絶縁層と、内部回路を有する前記ベース基板と、を積層する第2ステップと、を含み、
前記第1絶縁層は、
前記シード層が外部に露出するように、前記第1絶縁層の他方の面が前記第2絶縁層に接触することにより前記第2絶縁層に積層されることを特徴とする埋め込み型プリント回路基板の製造方法。 - 前記第1ステップは、
a1)一方の面に前記シード層が形成された第1絶縁層に金型で凹パターンを形成するステップと、
a2)前記凹パターンに金属材料を充填するステップと、
を含む、請求項1に記載の埋め込み型プリント回路基板の製造方法。 - 前記ステップa2)は、前記シード層が露出するように化学的又は物理的エッチングを行うステップをさらに含む、請求項2に記載の埋め込み型プリント回路基板の製造方法。
- 前記第1絶縁層の厚さが前記金型のパターンの厚さに等しい、請求項2または3に記載の埋め込み型プリント回路基板の製造方法。
- 前記シード層の厚さが前記第1絶縁層の厚さ未満である、請求項2乃至4のいずれか一項に記載の埋め込み型プリント回路基板の製造方法。
- 前記ステップa2)は、前記の露出したシード層を用いて電解又は無電解メッキで前記凹パターンに前記金属材料を充填するステップである、請求項4または5に記載の埋め込み型プリント回路基板の製造方法。
- 前記ステップa2)の前又は後に、前記第1絶縁層に粗面を形成するステップをさらに含む、請求項2乃至6のいずれか一項に記載の埋め込み型プリント回路基板の製造方法。
- 前記第2ステップは、前記第1絶縁層、前記第2絶縁層、及び前記内部回路を備えた前記ベース基板を順次積層し、前記の積層構造に熱及び圧力を加えるステップである、請求項1乃至7のいずれか一項に記載の埋め込み型プリント回路基板の製造方法。
- 前記第2ステップの後に、前記第1絶縁層の一方の面に形成された前記シード層を除去する第3ステップをさらに有する、請求項8に記載の埋め込み型プリント回路基板の製造方法。
- 前記第3ステップの後に、前記プリント回路基板の所定の領域にビアホールを形成し、前記ビアホールの内部を充填するステップをさらに含む、請求項9に記載の埋め込み型プリント回路基板の製造方法。
- 前記ビアホールは、前記プリント回路基板上にフォトレジストを塗布し、前記フォトレジストの露光、現像、及びエッチングによるフォトリソグラフィーを実行することにより形成される、請求項10に記載の埋め込み型プリント回路基板の製造方法。
- 第1絶縁層の内部に埋め込まれた少なくとも1つの金属パターンと、
前記第1絶縁層の下部に形成された第2絶縁層と、
前記第2絶縁層の下部に形成され、前記第2絶縁層の内部に埋め込まれた内部回路パターンを備えるベース基板と、を含み、
前記第1絶縁層の一方の面にはシード層が形成され、
前記第1絶縁層は、
前記シード層が外部に露出するように、前記第1絶縁層の他方の面が前記第2絶縁層に接触することにより前記第2絶縁層に積層されることを特徴とする埋め込み型プリント回路基板。 - 前記金属パターンの厚さは前記第1絶縁層の厚さを超えない、請求項12に記載の埋め込み型プリント回路基板。
- 前記第2絶縁層内に埋め込まれた前記内部回路パターンと電気的に接続されたビアホールをさらに備える、請求項12または13に記載の埋め込み型プリント回路基板。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020090095840A KR20110038521A (ko) | 2009-10-08 | 2009-10-08 | 인쇄회로기판 및 그 제조방법 |
KR10-2009-0095840 | 2009-10-08 | ||
PCT/KR2010/005124 WO2011043537A2 (en) | 2009-10-08 | 2010-08-05 | Printed circuit board and manufacturing method thereof |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2013507763A JP2013507763A (ja) | 2013-03-04 |
JP2013507763A5 JP2013507763A5 (ja) | 2013-09-26 |
JP5635613B2 true JP5635613B2 (ja) | 2014-12-03 |
Family
ID=43857240
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012533067A Expired - Fee Related JP5635613B2 (ja) | 2009-10-08 | 2010-08-05 | プリント回路基板及びその製造方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US20120255764A1 (ja) |
JP (1) | JP5635613B2 (ja) |
KR (1) | KR20110038521A (ja) |
CN (1) | CN102577642B (ja) |
TW (1) | TWI482549B (ja) |
WO (1) | WO2011043537A2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106034373B (zh) * | 2015-03-10 | 2018-09-25 | 上海量子绘景电子股份有限公司 | 高密度多层铜线路板及其制备方法 |
CN112423474A (zh) * | 2019-08-23 | 2021-02-26 | 中国科学技术大学 | 电路板的制备方法及电路板 |
US11191159B2 (en) * | 2020-03-26 | 2021-11-30 | Battelle Memorial Institute | Printed circuit board connector |
EP4319496A4 (en) * | 2021-03-22 | 2024-09-25 | Panasonic Ip Man Co Ltd | WIRING BODY, MOUNTING SUBSTRATE, WIRING TRANSFER BOARD WITH WIRING, INTERMEDIATE MATERIAL FOR WIRING BODY, MANUFACTURING METHOD FOR WIRING BODY AND MANUFACTURING METHOD FOR MOUNTING SUBSTRATE |
CN113347808B (zh) * | 2021-05-13 | 2022-07-19 | 江苏普诺威电子股份有限公司 | 具有厚铜和超微细密线路的多层电路板的制作方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6294744B1 (en) * | 1995-04-28 | 2001-09-25 | Victor Company Of Japan, Ltd. | Multilayer print circuit board and the production method of the multilayer print circuit board |
US5772905A (en) * | 1995-11-15 | 1998-06-30 | Regents Of The University Of Minnesota | Nanoimprint lithography |
US6753483B2 (en) * | 2000-06-14 | 2004-06-22 | Matsushita Electric Industrial Co., Ltd. | Printed circuit board and method of manufacturing the same |
US6815709B2 (en) * | 2001-05-23 | 2004-11-09 | International Business Machines Corporation | Structure having flush circuitry features and method of making |
US7186365B2 (en) * | 2003-06-05 | 2007-03-06 | Intel Corporation | Methods for forming an imprinting tool |
KR101063620B1 (ko) * | 2003-09-08 | 2011-09-07 | 엘지이노텍 주식회사 | 다층 인쇄회로기판 및 그의 제조방법 |
KR100601474B1 (ko) * | 2004-10-28 | 2006-07-18 | 삼성전기주식회사 | 임프린트법을 이용한 고분해능 인쇄회로기판의 제조방법 |
KR100741677B1 (ko) * | 2006-03-06 | 2007-07-23 | 삼성전기주식회사 | 임프린팅에 의한 기판의 제조방법 |
KR100836653B1 (ko) * | 2006-10-25 | 2008-06-10 | 삼성전기주식회사 | 회로기판 및 그 제조방법 |
JP5069449B2 (ja) * | 2006-11-14 | 2012-11-07 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
KR100776248B1 (ko) * | 2006-11-21 | 2007-11-16 | 삼성전기주식회사 | 인쇄회로기판 제조방법 |
JP4697156B2 (ja) * | 2007-02-28 | 2011-06-08 | トヨタ自動車株式会社 | 回路基板の製造方法 |
JP5078451B2 (ja) * | 2007-06-11 | 2012-11-21 | パナソニック株式会社 | 電子部品内蔵モジュール |
KR100916646B1 (ko) * | 2007-11-26 | 2009-09-08 | 삼성전기주식회사 | 인쇄회로기판의 제조방법 |
JP2009177005A (ja) * | 2008-01-25 | 2009-08-06 | Nitto Denko Corp | 配線回路基板の製造方法 |
-
2009
- 2009-10-08 KR KR1020090095840A patent/KR20110038521A/ko not_active Application Discontinuation
-
2010
- 2010-08-05 WO PCT/KR2010/005124 patent/WO2011043537A2/en active Application Filing
- 2010-08-05 US US13/500,754 patent/US20120255764A1/en not_active Abandoned
- 2010-08-05 CN CN201080045505.XA patent/CN102577642B/zh not_active Expired - Fee Related
- 2010-08-05 JP JP2012533067A patent/JP5635613B2/ja not_active Expired - Fee Related
- 2010-08-13 TW TW099127093A patent/TWI482549B/zh active
Also Published As
Publication number | Publication date |
---|---|
TW201114348A (en) | 2011-04-16 |
US20120255764A1 (en) | 2012-10-11 |
WO2011043537A3 (en) | 2011-07-07 |
KR20110038521A (ko) | 2011-04-14 |
CN102577642B (zh) | 2016-02-10 |
CN102577642A (zh) | 2012-07-11 |
TWI482549B (zh) | 2015-04-21 |
WO2011043537A2 (en) | 2011-04-14 |
JP2013507763A (ja) | 2013-03-04 |
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