JP5502468B2 - 半導体装置の製造方法および半導体装置 - Google Patents
半導体装置の製造方法および半導体装置 Download PDFInfo
- Publication number
- JP5502468B2 JP5502468B2 JP2009514085A JP2009514085A JP5502468B2 JP 5502468 B2 JP5502468 B2 JP 5502468B2 JP 2009514085 A JP2009514085 A JP 2009514085A JP 2009514085 A JP2009514085 A JP 2009514085A JP 5502468 B2 JP5502468 B2 JP 5502468B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode material
- layer
- recess
- electrode
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 119
- 238000004519 manufacturing process Methods 0.000 title claims description 48
- 239000007772 electrode material Substances 0.000 claims description 151
- 239000000758 substrate Substances 0.000 claims description 127
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 31
- 239000011810 insulating material Substances 0.000 claims description 31
- 238000000034 method Methods 0.000 claims description 13
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 230000007423 decrease Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 167
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 70
- 229910052710 silicon Inorganic materials 0.000 description 70
- 239000010703 silicon Substances 0.000 description 70
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 16
- 229920005591 polysilicon Polymers 0.000 description 16
- 229910004298 SiO 2 Inorganic materials 0.000 description 13
- 239000011229 interlayer Substances 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000005360 phosphosilicate glass Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66719—With a step of forming an insulating sidewall spacer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
2、22 シリコン基板(基板)
2a、22a トレンチ(第1凹部)
2b、22b トレンチ(第2凹部)
3、23 電極(第1電極材)
4、24 電極(第2電極材)
6、26 配線層
13 ポリシリコン膜(電極材)
14 酸化膜(埋め込み層)
14b TEOS膜(埋め込み層)
15、35 酸化膜(絶縁材)
まず、図1を参照して、本発明の第1実施形態による半導体装置1の構造について説明する。
この第2実施形態では、図12〜図14を参照して、上記第1実施形態と異なり、半導体装置21にFET(電界効果トランジスタ)を設けた例について説明する。
Claims (11)
- 基板または半導体層に第1凹部および第2凹部を形成する工程と、
前記第1凹部および第2凹部の内部に、前記第1凹部および第2凹部の上端部よりも下側になるように、それぞれ第1電極材および第2電極材を配置する工程と、
前記基板または半導体層と前記第1電極材および第2電極材とを覆うように埋め込み層を配置する工程と、
前記第1電極材の上面の少なくとも一部、および、前記基板または半導体層の上面が露出するとともに、前記第2電極材の上面が露出しないように、全面エッチバックすることにより、前記埋め込み層を全面にわたって除去する工程と、
前記基板または半導体層と前記第1電極材および第2電極材とを覆うように絶縁材を配置する工程と、
前記第1電極材の上面の少なくとも一部が露出するとともに、前記基板または半導体層の上面の少なくとも一部と前記第2電極材上の埋め込み層の上面の少なくとも一部とが露出しないように、前記絶縁材を全面にわたって除去する工程と、
少なくとも前記第1電極材上に配線層を配置する工程とを備え、
前記基板または半導体層に第1凹部および第2凹部を形成する工程は、前記第1凹部の幅が、前記第2凹部の幅より大きくなるように、前記第1凹部および第2凹部を形成する工程を含み、
前記埋め込み層を配置する工程は、
前記第1電極材の上面の中央部上の前記埋め込み層の厚みが、前記基板または半導体層上の前記埋め込み層の厚みと同じ大きさになるとともに、前記第2電極材の上面上の前記埋め込み層の厚みが、前記基板または半導体層上の前記埋め込み層の厚みよりも大きくなるように、前記埋め込み層を配置する工程を含むことを特徴とする半導体装置の製造方法。 - 前記第1電極材および第2電極材を配置する工程は、前記第1電極材の幅が、前記第2電極材の幅より大きくなるように、前記第1電極材および第2電極材を配置する工程を含むことを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記絶縁材を配置する工程は、
前記基板または半導体層上の厚み、および、前記第2電極材上に配置された前記埋め込み層上の厚みよりも前記第1電極材上の少なくとも一部の厚みが小さくなるように、前記絶縁材を配置する工程を含むことを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記絶縁材は、前記埋め込み層よりも埋め込み性の低い材料からなることを特徴とする請求項3に記載の半導体装置の製造方法。
- 前記埋め込み層を配置する工程は、
前記第1凹部の幅の1/2より小さく、かつ、前記第2凹部の幅の1/2以上の厚みに前記埋め込み層を配置する工程を含むことを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記第1電極材および第2電極材を配置する工程は、
前記基板または半導体層の前記第1凹部および第2凹部側を覆うとともに、前記第1凹部および第2凹部を埋め込むように、前記第1凹部の幅の1/2以上の厚みに電極材を配置する工程と、
前記基板または半導体層の上面が露出するとともに、前記第1凹部および第2凹部の内部の前記電極材が残るように、前記電極材を除去することにより、前記第1凹部および第2凹部の内部にそれぞれ前記第1電極材および第2電極材を配置する工程とを含むことを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記埋め込み層を全面にわたって除去する工程は、
前記第1凹部および第2凹部の内部にそれぞれ配置されるとともに、前記第1電極材の上面の周縁部および前記第2電極材上をそれぞれ覆うように配置された第1埋め込み層および第2埋め込み層を形成する工程を含み、
前記第1埋め込み層および第2埋め込み層を形成する工程は、
前記第1埋め込み層の前記第1電極材の中央部上の部分に、前記第1電極材の方向に向かってその径が小さくなるように開口部を形成するとともに、前記第1埋め込み層を、前記第1凹部から上側に突出しないように形成する工程を含むことを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記第1埋め込み層および第2埋め込み層を形成する工程は、
前記第2埋め込み層を、前記第2凹部から上側に突出しないように形成する工程を含むことを特徴とする請求項7に記載の半導体装置の製造方法。 - 前記開口部は、前記基板または半導体層の面方向の幅Dと前記面方向に直交する厚み方向の高さHとの比であるアスペクト比H/Dが0.4以上になるように形成されることを特徴とする請求項7または8に記載の半導体装置の製造方法。
- 前記開口部は、前記アスペクト比H/Dが1.0以上になるように形成されることを特徴とする請求項9に記載の半導体装置の製造方法。
- 前記第1埋め込み層および前記第2埋め込み層は、TEOS膜であり、
前記絶縁材は、BPSG膜であることを特徴とする請求項7〜10のいずれか1項に記載の半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009514085A JP5502468B2 (ja) | 2007-04-27 | 2008-04-25 | 半導体装置の製造方法および半導体装置 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007118932 | 2007-04-27 | ||
JP2007118932 | 2007-04-27 | ||
JP2009514085A JP5502468B2 (ja) | 2007-04-27 | 2008-04-25 | 半導体装置の製造方法および半導体装置 |
PCT/JP2008/058099 WO2008139898A1 (ja) | 2007-04-27 | 2008-04-25 | 半導体装置の製造方法および半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2008139898A1 JPWO2008139898A1 (ja) | 2011-01-27 |
JP5502468B2 true JP5502468B2 (ja) | 2014-05-28 |
Family
ID=40002114
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009514085A Active JP5502468B2 (ja) | 2007-04-27 | 2008-04-25 | 半導体装置の製造方法および半導体装置 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP5502468B2 (ja) |
TW (1) | TW200849472A (ja) |
WO (1) | WO2008139898A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9123559B2 (en) * | 2013-05-31 | 2015-09-01 | Infineon Technologies Ag | Method for producing a semiconductor component |
CN107452787B (zh) * | 2016-05-31 | 2020-05-12 | 无锡华润上华科技有限公司 | 沟槽栅极引出结构及其制造方法 |
JP6872951B2 (ja) * | 2017-03-30 | 2021-05-19 | エイブリック株式会社 | 半導体装置及びその製造方法 |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6449242A (en) * | 1987-08-20 | 1989-02-23 | Matsushita Electronics Corp | Manufacture of semiconductor device |
JPH0349228A (ja) * | 1989-07-18 | 1991-03-04 | Fuji Electric Co Ltd | 半導体集積回路の製造方法 |
JP2001085520A (ja) * | 1999-09-09 | 2001-03-30 | Seiko Epson Corp | コンタクトプラグ構造及びその製造方法 |
JP2002270841A (ja) * | 2001-03-13 | 2002-09-20 | Denso Corp | 半導体装置及びその製造方法 |
JP2002373988A (ja) * | 2001-06-14 | 2002-12-26 | Rohm Co Ltd | 半導体装置およびその製法 |
JP2004179277A (ja) * | 2002-11-26 | 2004-06-24 | New Japan Radio Co Ltd | 半導体装置の製造方法 |
JP2004207476A (ja) * | 2002-12-25 | 2004-07-22 | Mitsubishi Electric Corp | 電力用半導体装置及び電力用半導体装置の製造方法 |
JP2004311547A (ja) * | 2003-04-03 | 2004-11-04 | Seiko Instruments Inc | 縦形mosトランジスタの製造方法 |
JP2005191487A (ja) * | 2003-12-26 | 2005-07-14 | Seiko Instruments Inc | 半導体装置およびその製造法 |
JP2006100404A (ja) * | 2004-09-28 | 2006-04-13 | Nec Electronics Corp | 半導体装置及びその製造方法 |
JP2006100317A (ja) * | 2004-09-28 | 2006-04-13 | Nec Electronics Corp | 半導体装置 |
-
2008
- 2008-04-25 TW TW097115433A patent/TW200849472A/zh unknown
- 2008-04-25 WO PCT/JP2008/058099 patent/WO2008139898A1/ja active Application Filing
- 2008-04-25 JP JP2009514085A patent/JP5502468B2/ja active Active
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6449242A (en) * | 1987-08-20 | 1989-02-23 | Matsushita Electronics Corp | Manufacture of semiconductor device |
JPH0349228A (ja) * | 1989-07-18 | 1991-03-04 | Fuji Electric Co Ltd | 半導体集積回路の製造方法 |
JP2001085520A (ja) * | 1999-09-09 | 2001-03-30 | Seiko Epson Corp | コンタクトプラグ構造及びその製造方法 |
JP2002270841A (ja) * | 2001-03-13 | 2002-09-20 | Denso Corp | 半導体装置及びその製造方法 |
JP2002373988A (ja) * | 2001-06-14 | 2002-12-26 | Rohm Co Ltd | 半導体装置およびその製法 |
JP2004179277A (ja) * | 2002-11-26 | 2004-06-24 | New Japan Radio Co Ltd | 半導体装置の製造方法 |
JP2004207476A (ja) * | 2002-12-25 | 2004-07-22 | Mitsubishi Electric Corp | 電力用半導体装置及び電力用半導体装置の製造方法 |
JP2004311547A (ja) * | 2003-04-03 | 2004-11-04 | Seiko Instruments Inc | 縦形mosトランジスタの製造方法 |
JP2005191487A (ja) * | 2003-12-26 | 2005-07-14 | Seiko Instruments Inc | 半導体装置およびその製造法 |
JP2006100404A (ja) * | 2004-09-28 | 2006-04-13 | Nec Electronics Corp | 半導体装置及びその製造方法 |
JP2006100317A (ja) * | 2004-09-28 | 2006-04-13 | Nec Electronics Corp | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
WO2008139898A1 (ja) | 2008-11-20 |
JPWO2008139898A1 (ja) | 2011-01-27 |
TW200849472A (en) | 2008-12-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8237221B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
JP4947931B2 (ja) | 半導体装置 | |
JP5511308B2 (ja) | 半導体装置およびその製造方法 | |
JP6666671B2 (ja) | 半導体装置 | |
US20240304680A1 (en) | Method of manufacturing semiconductor device | |
JP2013254815A (ja) | 半導体装置およびその製造方法 | |
KR20180111534A (ko) | 반도체 장치 및 그 제조 방법 | |
JP2009094484A (ja) | 半導体装置および半導体装置の製造方法 | |
JP2012028805A (ja) | 半導体装置の製造方法 | |
JP2008288499A (ja) | 半導体装置及びその製造方法 | |
US8269312B2 (en) | Semiconductor device with resistive element | |
JP2009032967A (ja) | 半導体装置及びその製造方法 | |
JP5502468B2 (ja) | 半導体装置の製造方法および半導体装置 | |
JP5443978B2 (ja) | 半導体装置の製造方法および半導体装置 | |
JP2012199468A (ja) | 半導体装置の製造方法 | |
JP2012004510A (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2016086002A (ja) | 半導体装置及びその製造方法 | |
JP5220988B2 (ja) | 半導体装置 | |
JP2009081427A (ja) | 半導体装置および半導体装置の製造方法 | |
JP2009224660A (ja) | 半導体装置の製造方法 | |
JP2007200981A (ja) | 横型パワーmosfetおよびその製造方法 | |
CN113594042A (zh) | Mosfet的制作方法 | |
JP2009238866A (ja) | 半導体装置の製造方法 | |
JP2006196583A (ja) | 半導体装置の製造方法 | |
JP2009158587A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20110407 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120416 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130625 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130823 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130823 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20131008 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131108 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140121 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140121 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140225 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20140313 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5502468 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
RD03 | Notification of appointment of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: R3D03 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |