JP5462160B2 - メモリの動的電圧調整 - Google Patents
メモリの動的電圧調整 Download PDFInfo
- Publication number
- JP5462160B2 JP5462160B2 JP2010517037A JP2010517037A JP5462160B2 JP 5462160 B2 JP5462160 B2 JP 5462160B2 JP 2010517037 A JP2010517037 A JP 2010517037A JP 2010517037 A JP2010517037 A JP 2010517037A JP 5462160 B2 JP5462160 B2 JP 5462160B2
- Authority
- JP
- Japan
- Prior art keywords
- test
- memory
- voltage level
- voltage
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/021—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/777,635 | 2007-07-13 | ||
| US11/777,635 US7616509B2 (en) | 2007-07-13 | 2007-07-13 | Dynamic voltage adjustment for memory |
| PCT/US2008/064969 WO2009011977A1 (en) | 2007-07-13 | 2008-05-28 | Dynamic voltage adjustment for memory |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010534896A JP2010534896A (ja) | 2010-11-11 |
| JP2010534896A5 JP2010534896A5 (enExample) | 2011-07-14 |
| JP5462160B2 true JP5462160B2 (ja) | 2014-04-02 |
Family
ID=40252976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010517037A Active JP5462160B2 (ja) | 2007-07-13 | 2008-05-28 | メモリの動的電圧調整 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7616509B2 (enExample) |
| JP (1) | JP5462160B2 (enExample) |
| KR (1) | KR101498514B1 (enExample) |
| CN (1) | CN101743598B (enExample) |
| TW (1) | TWI490873B (enExample) |
| WO (1) | WO2009011977A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12340857B2 (en) | 2021-11-02 | 2025-06-24 | Samsung Electronics Co., Ltd. | Electronic device for adjusting driving voltage of volatile memory and method for operating the same |
Families Citing this family (63)
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| US8103496B1 (en) | 2000-10-26 | 2012-01-24 | Cypress Semicondutor Corporation | Breakpoint control in an in-circuit emulation system |
| US8160864B1 (en) | 2000-10-26 | 2012-04-17 | Cypress Semiconductor Corporation | In-circuit emulator and pod synchronized boot |
| US6724220B1 (en) | 2000-10-26 | 2004-04-20 | Cyress Semiconductor Corporation | Programmable microcontroller architecture (mixed analog/digital) |
| US8176296B2 (en) | 2000-10-26 | 2012-05-08 | Cypress Semiconductor Corporation | Programmable microcontroller architecture |
| US8149048B1 (en) | 2000-10-26 | 2012-04-03 | Cypress Semiconductor Corporation | Apparatus and method for programmable power management in a programmable analog circuit block |
| US7406674B1 (en) | 2001-10-24 | 2008-07-29 | Cypress Semiconductor Corporation | Method and apparatus for generating microcontroller configuration information |
| US8078970B1 (en) | 2001-11-09 | 2011-12-13 | Cypress Semiconductor Corporation | Graphical user interface with user-selectable list-box |
| US8042093B1 (en) | 2001-11-15 | 2011-10-18 | Cypress Semiconductor Corporation | System providing automatic source code generation for personalization and parameterization of user modules |
| US6971004B1 (en) | 2001-11-19 | 2005-11-29 | Cypress Semiconductor Corp. | System and method of dynamically reconfiguring a programmable integrated circuit |
| US7844437B1 (en) | 2001-11-19 | 2010-11-30 | Cypress Semiconductor Corporation | System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit |
| US8069405B1 (en) | 2001-11-19 | 2011-11-29 | Cypress Semiconductor Corporation | User interface for efficiently browsing an electronic document using data-driven tabs |
| US8103497B1 (en) | 2002-03-28 | 2012-01-24 | Cypress Semiconductor Corporation | External interface for event architecture |
| US7295049B1 (en) | 2004-03-25 | 2007-11-13 | Cypress Semiconductor Corporation | Method and circuit for rapid alignment of signals |
| US7332976B1 (en) * | 2005-02-04 | 2008-02-19 | Cypress Semiconductor Corporation | Poly-phase frequency synthesis oscillator |
| US7400183B1 (en) | 2005-05-05 | 2008-07-15 | Cypress Semiconductor Corporation | Voltage controlled oscillator delay cell and method |
| US7652494B2 (en) | 2005-07-01 | 2010-01-26 | Apple Inc. | Operating an integrated circuit at a minimum supply voltage |
| US7876634B2 (en) * | 2005-12-02 | 2011-01-25 | Arm Limited | Apparatus and method for adjusting a supply voltage based on a read result |
| US8067948B2 (en) | 2006-03-27 | 2011-11-29 | Cypress Semiconductor Corporation | Input/output multiplexer bus |
| US8026739B2 (en) | 2007-04-17 | 2011-09-27 | Cypress Semiconductor Corporation | System level interconnect with programmable switching |
| US8130025B2 (en) | 2007-04-17 | 2012-03-06 | Cypress Semiconductor Corporation | Numerical band gap |
| US8040266B2 (en) * | 2007-04-17 | 2011-10-18 | Cypress Semiconductor Corporation | Programmable sigma-delta analog-to-digital converter |
| US8111577B2 (en) * | 2007-04-17 | 2012-02-07 | Cypress Semiconductor Corporation | System comprising a state-monitoring memory element |
| US9720805B1 (en) | 2007-04-25 | 2017-08-01 | Cypress Semiconductor Corporation | System and method for controlling a target device |
| US8049569B1 (en) | 2007-09-05 | 2011-11-01 | Cypress Semiconductor Corporation | Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes |
| US8116151B2 (en) * | 2008-08-11 | 2012-02-14 | Spansion Llc | Multi-level storage algorithm to emphasize disturb conditions |
| US7915910B2 (en) * | 2009-01-28 | 2011-03-29 | Apple Inc. | Dynamic voltage and frequency management |
| CN101957397A (zh) * | 2009-07-14 | 2011-01-26 | 鸿富锦精密工业(深圳)有限公司 | 电压自动量测系统及量测方法 |
| CN102598255A (zh) * | 2009-10-23 | 2012-07-18 | 拉姆伯斯公司 | 层叠的半导体器件 |
| US8717093B2 (en) * | 2010-01-08 | 2014-05-06 | Mindspeed Technologies, Inc. | System on chip power management through package configuration |
| KR20120004017A (ko) | 2010-07-06 | 2012-01-12 | 주식회사 하이닉스반도체 | 동적 전압 조정 모드 판별 장치와 방법 및 이를 이용한 펌핑 전압 감지 장치와 방법 |
| US8909957B2 (en) * | 2010-11-04 | 2014-12-09 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Dynamic voltage adjustment to computer system memory |
| KR101218096B1 (ko) * | 2010-12-17 | 2013-01-03 | 에스케이하이닉스 주식회사 | 반도체 장치의 테스트 방법 및 반도체 장치의 테스트 시스템 |
| US9368162B2 (en) | 2011-02-08 | 2016-06-14 | Freescale Semiconductor, Inc. | Integrated circuit device, power management module and method for providing power management |
| US8797813B2 (en) * | 2011-05-17 | 2014-08-05 | Maxlinear, Inc. | Method and apparatus for memory power and/or area reduction |
| KR20150090418A (ko) * | 2014-01-29 | 2015-08-06 | 에스케이하이닉스 주식회사 | 최소 동작 전원을 사용하는 시스템 및 메모리의 전원전압 설정 방법 |
| US9461626B2 (en) * | 2014-07-14 | 2016-10-04 | Qualcomm Incorporated | Dynamic voltage adjustment of an I/O interface signal |
| US9933828B2 (en) | 2014-08-19 | 2018-04-03 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Controlling power consumption of a voltage regulator in a computer system |
| CN105575438B (zh) * | 2014-10-16 | 2020-11-06 | 恩智浦美国有限公司 | 用于测试存储器的方法及装置 |
| US9786356B2 (en) * | 2015-01-30 | 2017-10-10 | Qualcomm Incorporated | Memory device with adaptive voltage scaling based on error information |
| JP2016157383A (ja) * | 2015-02-26 | 2016-09-01 | 富士通株式会社 | 半導体集積回路装置、無線センサーネットワーク端末および半導体集積回路装置のメモリ制御方法 |
| CN105989900B (zh) * | 2015-03-05 | 2019-06-07 | 展讯通信(上海)有限公司 | 片上系统芯片及其嵌入式存储器最低工作电压的测量 |
| US9495000B1 (en) * | 2015-04-30 | 2016-11-15 | Qualcomm Technologies International, Ltd. | Power management of a wireless device |
| US9905277B2 (en) | 2015-06-30 | 2018-02-27 | Industrial Technology Research Institute | Memory controlling method and memory system |
| TWI584304B (zh) * | 2016-05-23 | 2017-05-21 | 大心電子(英屬維京群島)股份有限公司 | 解碼方法、記憶體儲存裝置及記憶體控制電路單元 |
| CN107436820B (zh) * | 2016-05-27 | 2020-07-17 | 深圳大心电子科技有限公司 | 解码方法、存储器存储装置及存储器控制电路单元 |
| US10209726B2 (en) | 2016-06-10 | 2019-02-19 | Microsoft Technology Licensing, Llc | Secure input voltage adjustment in processing devices |
| US10338670B2 (en) | 2016-06-10 | 2019-07-02 | Microsoft Technology Licensing, Llc | Input voltage reduction for processing devices |
| US10310572B2 (en) | 2016-06-10 | 2019-06-04 | Microsoft Technology Licensing, Llc | Voltage based thermal control of processing device |
| US10248186B2 (en) | 2016-06-10 | 2019-04-02 | Microsoft Technology Licensing, Llc | Processor device voltage characterization |
| US10725104B2 (en) * | 2017-12-22 | 2020-07-28 | Sandisk Technologies Llc | Self testing circuit for power optimization |
| US10446254B1 (en) * | 2018-05-03 | 2019-10-15 | Western Digital Technologies, Inc. | Method for maximizing power efficiency in memory interface block |
| US10825540B2 (en) * | 2018-05-16 | 2020-11-03 | Micron Technology, Inc. | Memory system quality integral analysis and configuration |
| US10535417B2 (en) | 2018-05-16 | 2020-01-14 | Micron Technology, Inc. | Memory system quality margin analysis and configuration |
| CN109375543B (zh) * | 2018-10-31 | 2020-08-11 | 珠海全志科技股份有限公司 | Dvs电压管理装置、系统及方法、存储介质、计算机设备 |
| WO2020245951A1 (ja) * | 2019-06-05 | 2020-12-10 | 三菱電機株式会社 | 電力供給システム |
| CN112382328B (zh) * | 2020-11-06 | 2024-10-11 | 润昇系统测试(深圳)有限公司 | 内存测试装置以及测试电压调整方法 |
| US11598806B2 (en) * | 2021-01-21 | 2023-03-07 | Nanya Technology Corporation | Test apparatus and test method to a memory device |
| CN115529831A (zh) * | 2021-04-27 | 2022-12-27 | 美光科技公司 | 存储器电路的动态电压供应 |
| US20230079229A1 (en) * | 2021-09-10 | 2023-03-16 | Maxim Integrated Products, Inc. | Power modulation using dynamic voltage and frequency scaling |
| US12217815B2 (en) * | 2022-11-16 | 2025-02-04 | Nanya Technology Corporation | Memory testing system and memory testing method |
| US20240321380A1 (en) * | 2023-03-20 | 2024-09-26 | Micron Technology, Inc. | Voltage domain based error management |
| WO2024196372A1 (en) * | 2023-03-23 | 2024-09-26 | Siemens Industry Software Inc. | Memory built-in self-test with automated write trim tuning |
| US12272415B2 (en) | 2023-06-13 | 2025-04-08 | Nanya Technology Corporation | System and method for testing memory device |
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| JP3609868B2 (ja) | 1995-05-30 | 2005-01-12 | 株式会社ルネサステクノロジ | スタティック型半導体記憶装置 |
| JPH09153290A (ja) * | 1995-11-30 | 1997-06-10 | Nec Corp | 半導体記憶装置 |
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| US6483754B1 (en) | 2001-05-16 | 2002-11-19 | Lsi Logic Corporation | Self-time scheme to reduce cycle time for memories |
| JP2003007094A (ja) * | 2001-06-19 | 2003-01-10 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP4162076B2 (ja) * | 2002-05-30 | 2008-10-08 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
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| KR100761358B1 (ko) * | 2004-06-03 | 2007-09-27 | 주식회사 하이닉스반도체 | 반도체 기억 소자 및 그의 내부 전압 조절 방법 |
| JP4198644B2 (ja) | 2004-06-21 | 2008-12-17 | 富士通マイクロエレクトロニクス株式会社 | 半導体集積回路 |
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| JP2006114078A (ja) * | 2004-10-12 | 2006-04-27 | Toshiba Corp | 不揮発性半導体記憶装置及びその動作方法 |
| JP2006118995A (ja) * | 2004-10-21 | 2006-05-11 | Oki Electric Ind Co Ltd | 半導体集積回路 |
| US20060259840A1 (en) * | 2005-05-12 | 2006-11-16 | International Business Machines Corporation | Self-test circuitry to determine minimum operating voltage |
| EP1953762B1 (en) * | 2007-01-25 | 2013-09-18 | Imec | Memory device with reduced standby power consumption and method for operating same |
| JP2009076169A (ja) * | 2007-09-25 | 2009-04-09 | Fujitsu Microelectronics Ltd | 半導体記憶装置 |
| JP2009176340A (ja) * | 2008-01-22 | 2009-08-06 | Sony Corp | 不揮発性メモリ |
-
2007
- 2007-07-13 US US11/777,635 patent/US7616509B2/en active Active
-
2008
- 2008-05-28 KR KR1020107000648A patent/KR101498514B1/ko active Active
- 2008-05-28 JP JP2010517037A patent/JP5462160B2/ja active Active
- 2008-05-28 CN CN200880024536.XA patent/CN101743598B/zh active Active
- 2008-05-28 WO PCT/US2008/064969 patent/WO2009011977A1/en not_active Ceased
- 2008-06-12 TW TW097121961A patent/TWI490873B/zh active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12340857B2 (en) | 2021-11-02 | 2025-06-24 | Samsung Electronics Co., Ltd. | Electronic device for adjusting driving voltage of volatile memory and method for operating the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010534896A (ja) | 2010-11-11 |
| TWI490873B (zh) | 2015-07-01 |
| KR101498514B1 (ko) | 2015-03-04 |
| US7616509B2 (en) | 2009-11-10 |
| TW200907990A (en) | 2009-02-16 |
| CN101743598A (zh) | 2010-06-16 |
| US20090016140A1 (en) | 2009-01-15 |
| WO2009011977A1 (en) | 2009-01-22 |
| CN101743598B (zh) | 2013-07-24 |
| KR20100047216A (ko) | 2010-05-07 |
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| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
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| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |