JP5396436B2 - 半導体装置ならびに半導体装置の製造方法 - Google Patents
半導体装置ならびに半導体装置の製造方法 Download PDFInfo
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- JP5396436B2 JP5396436B2 JP2011144593A JP2011144593A JP5396436B2 JP 5396436 B2 JP5396436 B2 JP 5396436B2 JP 2011144593 A JP2011144593 A JP 2011144593A JP 2011144593 A JP2011144593 A JP 2011144593A JP 5396436 B2 JP5396436 B2 JP 5396436B2
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- electrode surface
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- electrode
- spreading
- conductor member
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- 239000004065 semiconductor Substances 0.000 title claims description 125
- 238000004519 manufacturing process Methods 0.000 title claims description 25
- 238000000034 method Methods 0.000 title claims description 19
- 229910000679 solder Inorganic materials 0.000 claims description 332
- 238000003892 spreading Methods 0.000 claims description 128
- 239000004020 conductor Substances 0.000 claims description 93
- 230000001681 protective effect Effects 0.000 claims description 29
- 238000007789 sealing Methods 0.000 claims description 24
- 238000005476 soldering Methods 0.000 claims description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 238000007747 plating Methods 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 5
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 19
- 229910052782 aluminium Inorganic materials 0.000 description 17
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 17
- 238000005304 joining Methods 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 229920005591 polysilicon Polymers 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 5
- 239000011888 foil Substances 0.000 description 5
- 238000009413 insulation Methods 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- 239000006071 cream Substances 0.000 description 4
- 229920005992 thermoplastic resin Polymers 0.000 description 4
- 239000011800 void material Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 238000009736 wetting Methods 0.000 description 3
- 229920000106 Liquid crystal polymer Polymers 0.000 description 2
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 2
- 239000004734 Polyphenylene sulfide Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229920006122 polyamide resin Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000003507 refrigerant Substances 0.000 description 1
- 230000004043 responsiveness Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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- H—ELECTRICITY
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Description
請求項2に係る発明は、請求項1に記載の半導体装置において、両櫛歯状の電極面は、主半田広がり電極面と、主半田広がり電極面から両側方に櫛状に延在する副半田広がり電極面とを有していることを特徴とする。
請求項3に係る発明は、請求項1または2に記載の半導体装置において、両櫛歯状の電極面の周縁にはゲート配線が配設され、ゲート配線は絶縁性を有し、両櫛歯状の電極面に比べて半田の濡れ性が低い保護膜によって覆われていることを特徴とする。
請求項4に係る発明は、請求項1ないし3のいずれか1項に記載の半導体装置において、第1導体部材および第2導体部材は銅材からなり、第1導体部材および第2導体部材における半田との接合面には表面加工が施されていないことを特徴とする。
請求項5に係る発明は、IGBTチップおよびダイオードチップと、IGBTチップの一方の面に少なくとも1つ設けられるエミッタ電極面およびダイオードチップの一方の面に設けられるアノード電極面に半田により接合される第1導体板と、IGBTチップの他方の面に設けられるコレクタ電極面およびダイオードチップの他方の面に設けられるカソード電極面に半田により接合される第2導体板とを備え、IGBTチップの一方の面に設けられるエミッタ電極面の少なくとも1つは両櫛歯状とされ、両櫛歯状の電極面は、主半田広がり電極面と、主半田広がり電極面から両側方に櫛状に延在する副半田広がり電極面とを有し、エミッタ電極面の周縁にはゲート配線が配設され、ゲート配線は、エミッタ電極面に比べて半田の濡れ性が低い絶縁性保護膜によって覆われていることを特徴とする半導体装置である。
請求項6に係る発明は、インバータ回路の上下アームを構成する上アーム用IGBTチップおよび上アーム用ダイオードチップならびに下アーム用IGBTチップおよび下アーム用ダイオードチップと、上アーム用IGBTチップの一方の面に少なくとも1つ設けられるエミッタ電極面および上アーム用ダイオードチップの一方の面に設けられるアノード電極面に半田により接合される第2交流電極リードフレームと、上アーム用IGBTチップの他方の面に設けられるコレクタ電極面および上アーム用ダイオードチップの他方の面に設けられるカソード電極面に半田により接合される直流正極電極リードフレームと、下アーム用IGBTチップの一方の面に少なくとも1つ設けられるエミッタ電極面および下アーム用ダイオードチップの一方の面に設けられるアノード電極面に半田により接合される直流負極電極リードフレームと、下アーム用IGBTチップの他方の面に設けられるコレクタ電極面および下アーム用ダイオードチップの他方の面に設けられるカソード電極面に半田により接合される第1交流電極リードフレームとを備え、上アーム用IGBTチップおよび下アーム用IGBTチップの一方の面のそれぞれに設けられるエミッタ電極面の少なくとも1つは両櫛歯状とされ、両櫛歯状の電極面は、主半田広がり電極面と、主半田広がり電極面から両側方に櫛状に延在する副半田広がり電極面とを有し、エミッタ電極面の周縁にはゲート配線が配設され、ゲート配線は、エミッタ電極面に比べて半田の濡れ性が低い絶縁性保護膜によって覆われていることを特徴とする半導体装置である。
請求項7に係る発明は、請求項1ないし6のいずれか1項に記載の半導体装置において、両櫛歯状の電極面には、半田の濡れ性を向上させるニッケルめっきが施されていることを特徴とする。
請求項8に係る発明は、請求項2ないし4のいずれか1項に記載の半導体装置を製造する方法であって、両櫛歯状の電極面を少なくとも1つ有する半導体素子と、第1導体部材と、第2導体部材とを準備する工程と、半田により半導体素子の他方の面に設けられる電極面を第2導体部材に接合する工程と、半導体素子の両櫛歯状の電極面を構成する主半田広がり電極面の一部を含む所定領域、または、第1導体部材における所定領域に対向する領域に溶融状態の半田を滴下する工程と、第1導体部材と半導体素子の一方の面に設けられる電極面との距離を近づけることで溶融状態の半田を主半田広がり電極面から副半田広がり電極面に広がらせて、半田により半導体素子の一方の面に設けられる電極面を第1導体部材に接合する工程と、第1導体部材と第2導体部材とを封止部材により封止する工程とを含むことを特徴とする半導体装置の製造方法である。
請求項9に係る発明は、請求項2ないし4のいずれか1項に記載の半導体装置を製造する方法であって、両櫛歯状の電極面を少なくとも1つ有する半導体素子と、第1導体部材と、第2導体部材とを準備する工程と、半田により半導体素子の他方の面に設けられる電極面を第2導体部材に接合する工程と、第1導体部材の滴下領域に溶融状態の半田を滴下する工程と、滴下領域に滴下された半田が半導体素子の一方の面に設けられた両櫛歯状の電極面を構成する主半田広がり電極面の一部を含む所定領域に対向して配置されるように位置決めする工程と、第1導体部材に半導体素子の一方の面を近づけ、溶融状態の半田を主半田広がり電極面から副半田広がり電極面に広がらせて、半田により半導体素子の一方の面に設けられる電極面を第1導体部材に接合する工程と、第1導体部材と第2導体部材とを封止部材により封止する工程とを含むことを特徴とする半導体装置の製造方法である。
請求項10に係る発明は、請求項5に記載の半導体装置を製造する方法であって、両櫛歯状のエミッタ電極面を少なくとも1つ有するIGBTチップと、ダイオードチップと、第1導体板と、第2導体板とを準備する工程と、IGBTチップのコレクタ電極面およびダイオードチップのカソード電極面のそれぞれの中央位置、または、それぞれの中央位置に対向する第2導体板の所定位置に溶融状態の半田を滴下する工程と、第2導体板にIGBTチップのコレクタ電極面およびダイオードチップのカソード電極面を同時に近づけ、溶融状態の半田をコレクタ電極面およびカソード電極面に広がらせて、半田によりIGBTチップのコレクタ電極面およびダイオードチップのカソード電極面のそれぞれを第2導体板に接合する工程と、IGBTチップのエミッタ電極面を構成する主半田広がり電極面の一部を含む所定領域およびダイオードチップのアノード電極面の中央位置、または、所定領域およびアノード電極面の中央位置に対向する第1導体板の所定位置に溶融状態の半田を滴下する工程と、第1導体板にIGBTチップのエミッタ電極面およびダイオードチップのアノード電極面を同時に近づけ、溶融状態の半田をエミッタ電極面における主半田広がり電極面から副半田広がり電極面に広がらせるとともに、溶融状態の半田をアノード電極面に広がらせて、半田によりIGBTチップのエミッタ電極面およびダイオードチップのアノード電極面のそれぞれを第1導体板に接合する工程と、第1導体板と第2導体板とを封止部材により封止する工程とを含むことを特徴とする半導体装置の製造方法である。
請求項11に係る発明は、請求項2ないし4のいずれか1項に記載の半導体装置を製造する方法であって、両櫛歯状の電極面を少なくとも1つ有する半導体素子と、第1導体部材と、第2導体部材とを準備する工程と、半田により半導体素子の他方の面に設けられる電極面を第2導体部材に接合する工程と、半導体素子の両櫛歯状の電極面を構成する主半田広がり電極面の一部を含む所定領域、または、第1導体部材における所定領域に対向する領域に半田を設置する工程と、半田を加熱して溶融させ、第1導体部材と半導体素子の一方の面に設けられる電極面との距離を近づけることで溶融状態の半田を主半田広がり電極面から副半田広がり電極面に広がらせて、半田により半導体素子の一方の面に設けられる電極面を第1導体部材に接合する工程と、第1導体部材と第2導体部材とを封止部材により封止する工程とを含むことを特徴とする半導体装置の製造方法である。
なお、本実施の形態に係るIGBTチップ1は、10mm×10mm程度のサイズである。
(1)エミッタ電極面11aは、主半田広がり電極面11a1から両側方に櫛状に副半田広がり電極面11a2が延在する両櫛歯状とされている。エミッタ電極面11aの周縁にはアルミゲート配線15を覆うように半田濡れ性の低い保護膜14が形成されている。エミッタ電極面11aの中央部に滴下された溶融半田5aは放射状に流れ、主半田広がり電極面11a1と副半田広がり電極面11a2上に満遍なく流れるとともに、エミッタ電極11aの周縁に形成した保護膜は半田濡れ性が悪いので、エミッタ電極面11aを越えた半田流れを防止できる。
(1)本発明による半導体装置の電極面の形状は、上述した実施の形態に限定されない。たとえば、図13(a)に示すように、IGBTチップ201に複数の両櫛歯状の電極面211a,211bを設けてもよい。図13(a)に示すIGBTチップ201では、x方向に2分割された電極面211a,211bが設けられ、一方の電極面211aはx方向に延びる主半田広がり電極面211a1を有し、主半田広がり電極面211a1から両側方である+y方向および−y方向に櫛状に延在する副半田広がり電極面211a2を有している。他方の電極面211bも同様に、x方向に延びる主半田広がり電極面211b1を有し、主半田広がり電極面211b1から両側方である+y方向および−y方向に櫛状に延在する副半田広がり電極面211b2を有している。
図15(a)〜(c)に示すように、主半田広がり電極面から両側方に櫛状に延在する副半田広がり電極面とを有することで、主半田広がり電極面を含む半田設定領域に滴下した溶融状態の半田を電極面全体に広がらせることができる。
Claims (11)
- 両面のそれぞれに少なくとも1つの電極面を有する半導体素子と、
前記半導体素子の一方の面に設けられる電極面に半田により接合される第1導体部材と、
前記半導体素子の他方の面に設けられる電極面に半田により接合される第2導体部材とを備え、
前記半導体素子の一方の面に設けられる電極面の少なくとも1つが両櫛歯状とされていることを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記両櫛歯状の電極面は、主半田広がり電極面と、前記主半田広がり電極面から両側方に櫛状に延在する副半田広がり電極面とを有していることを特徴とする半導体装置。 - 請求項1または2に記載の半導体装置において、
前記両櫛歯状の電極面の周縁にはゲート配線が配設され、前記ゲート配線は絶縁性を有し、前記両櫛歯状の電極面に比べて半田の濡れ性が低い保護膜によって覆われていることを特徴とする半導体装置。 - 請求項1ないし3のいずれか1項に記載の半導体装置において、
前記第1導体部材および前記第2導体部材は銅材からなり、前記第1導体部材および前記第2導体部材における前記半田との接合面には表面加工が施されていないことを特徴とする半導体装置。 - IGBTチップおよびダイオードチップと、
IGBTチップの一方の面に少なくとも1つ設けられるエミッタ電極面およびダイオードチップの一方の面に設けられるアノード電極面に半田により接合される第1導体板と、
IGBTチップの他方の面に設けられるコレクタ電極面およびダイオードチップの他方の面に設けられるカソード電極面に半田により接合される第2導体板とを備え、
前記IGBTチップの一方の面に設けられるエミッタ電極面の少なくとも1つは両櫛歯状とされ、
前記両櫛歯状の電極面は、主半田広がり電極面と、前記主半田広がり電極面から両側方に櫛状に延在する副半田広がり電極面とを有し、
前記エミッタ電極面の周縁にはゲート配線が配設され、
前記ゲート配線は、前記エミッタ電極面に比べて半田の濡れ性が低い絶縁性保護膜によって覆われていることを特徴とする半導体装置。 - インバータ回路の上下アームを構成する上アーム用IGBTチップおよび上アーム用ダイオードチップならびに下アーム用IGBTチップおよび下アーム用ダイオードチップと、
前記上アーム用IGBTチップの一方の面に少なくとも1つ設けられるエミッタ電極面および上アーム用ダイオードチップの一方の面に設けられるアノード電極面に半田により接合される第2交流電極リードフレームと、
前記上アーム用IGBTチップの他方の面に設けられるコレクタ電極面および上アーム用ダイオードチップの他方の面に設けられるカソード電極面に半田により接合される直流正極電極リードフレームと、
前記下アーム用IGBTチップの一方の面に少なくとも1つ設けられるエミッタ電極面および下アーム用ダイオードチップの一方の面に設けられるアノード電極面に半田により接合される直流負極電極リードフレームと、
前記下アーム用IGBTチップの他方の面に設けられるコレクタ電極面および下アーム用ダイオードチップの他方の面に設けられるカソード電極面に半田により接合される第1交流電極リードフレームとを備え、
前記上アーム用IGBTチップおよび前記下アーム用IGBTチップの一方の面のそれぞれに設けられるエミッタ電極面の少なくとも1つは両櫛歯状とされ、
前記両櫛歯状の電極面は、主半田広がり電極面と、前記主半田広がり電極面から両側方に櫛状に延在する副半田広がり電極面とを有し、
前記エミッタ電極面の周縁にはゲート配線が配設され、
前記ゲート配線は、前記エミッタ電極面に比べて半田の濡れ性が低い絶縁性保護膜によって覆われていることを特徴とする半導体装置。 - 請求項1ないし6のいずれか1項に記載の半導体装置において、
前記両櫛歯状の電極面には、半田の濡れ性を向上させるニッケルめっきが施されていることを特徴とする半導体装置。 - 請求項2ないし4のいずれか1項に記載の半導体装置を製造する方法であって、
前記両櫛歯状の電極面を少なくとも1つ有する半導体素子と、前記第1導体部材と、前記第2導体部材とを準備する工程と、
半田により前記半導体素子の他方の面に設けられる電極面を前記第2導体部材に接合する工程と、
前記半導体素子の両櫛歯状の電極面を構成する前記主半田広がり電極面の一部を含む所定領域、または、前記第1導体部材における前記所定領域に対向する領域に溶融状態の半田を滴下する工程と、
前記第1導体部材と前記半導体素子の一方の面に設けられる電極面との距離を近づけることで前記溶融状態の半田を前記主半田広がり電極面から前記副半田広がり電極面に広がらせて、半田により前記半導体素子の一方の面に設けられる電極面を前記第1導体部材に接合する工程と、
前記第1導体部材と前記第2導体部材とを封止部材により封止する工程とを含むことを特徴とする半導体装置の製造方法。 - 請求項2ないし4のいずれか1項に記載の半導体装置を製造する方法であって、
前記両櫛歯状の電極面を少なくとも1つ有する半導体素子と、前記第1導体部材と、前記第2導体部材とを準備する工程と、
半田により前記半導体素子の他方の面に設けられる電極面を前記第2導体部材に接合する工程と、
前記第1導体部材の滴下領域に溶融状態の半田を滴下する工程と、
前記滴下領域に滴下された半田が前記半導体素子の一方の面に設けられた両櫛歯状の電極面を構成する前記主半田広がり電極面の一部を含む所定領域に対向して配置されるように位置決めする工程と、
前記第1導体部材に前記半導体素子の一方の面を近づけ、前記溶融状態の半田を前記主半田広がり電極面から前記副半田広がり電極面に広がらせて、半田により前記半導体素子の一方の面に設けられる電極面を前記第1導体部材に接合する工程と、
前記第1導体部材と前記第2導体部材とを封止部材により封止する工程とを含むことを特徴とする半導体装置の製造方法。 - 請求項5に記載の半導体装置を製造する方法であって、
前記両櫛歯状のエミッタ電極面を少なくとも1つ有するIGBTチップと、前記ダイオードチップと、前記第1導体板と、前記第2導体板とを準備する工程と、
前記IGBTチップのコレクタ電極面および前記ダイオードチップのカソード電極面のそれぞれの中央位置、または、前記それぞれの中央位置に対向する第2導体板の所定位置に溶融状態の半田を滴下する工程と、
前記第2導体板に前記IGBTチップのコレクタ電極面および前記ダイオードチップのカソード電極面を同時に近づけ、前記溶融状態の半田を前記コレクタ電極面および前記カソード電極面に広がらせて、半田により前記IGBTチップのコレクタ電極面および前記ダイオードチップのカソード電極面のそれぞれを前記第2導体板に接合する工程と、
前記IGBTチップのエミッタ電極面を構成する前記主半田広がり電極面の一部を含む所定領域および前記ダイオードチップのアノード電極面の中央位置、または、前記所定領域および前記アノード電極面の中央位置に対向する第1導体板の所定位置に溶融状態の半田を滴下する工程と、
前記第1導体板に前記IGBTチップのエミッタ電極面および前記ダイオードチップのアノード電極面を同時に近づけ、前記溶融状態の半田を前記エミッタ電極面における前記主半田広がり電極面から前記副半田広がり電極面に広がらせるとともに、前記溶融状態の半田を前記アノード電極面に広がらせて、半田により前記IGBTチップのエミッタ電極面および前記ダイオードチップのアノード電極面のそれぞれを前記第1導体板に接合する工程と、
前記第1導体板と前記第2導体板とを封止部材により封止する工程とを含むことを特徴とする半導体装置の製造方法。 - 請求項2ないし4のいずれか1項に記載の半導体装置を製造する方法であって、
前記両櫛歯状の電極面を少なくとも1つ有する半導体素子と、前記第1導体部材と、前記第2導体部材とを準備する工程と、
半田により前記半導体素子の他方の面に設けられる電極面を前記第2導体部材に接合する工程と、
前記半導体素子の両櫛歯状の電極面を構成する前記主半田広がり電極面の一部を含む所定領域、または、前記第1導体部材における前記所定領域に対向する領域に半田を設置する工程と、
前記半田を加熱して溶融させ、前記第1導体部材と前記半導体素子の一方の面に設けられる電極面との距離を近づけることで前記溶融状態の半田を前記主半田広がり電極面から前記副半田広がり電極面に広がらせて、半田により前記半導体素子の一方の面に設けられる電極面を前記第1導体部材に接合する工程と、
前記第1導体部材と前記第2導体部材とを封止部材により封止する工程とを含むことを特徴とする半導体装置の製造方法。
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JP5396436B2 (ja) | 2011-06-29 | 2014-01-22 | 日立オートモティブシステムズ株式会社 | 半導体装置ならびに半導体装置の製造方法 |
WO2014002442A1 (ja) * | 2012-06-29 | 2014-01-03 | 株式会社デンソー | 半導体装置および半導体装置の接続構造 |
JP5941787B2 (ja) * | 2012-08-09 | 2016-06-29 | 日立オートモティブシステムズ株式会社 | パワーモジュールおよびパワーモジュールの製造方法 |
JP6226365B2 (ja) * | 2013-09-05 | 2017-11-08 | 株式会社東芝 | 半導体装置 |
DE102014227024A1 (de) * | 2014-12-30 | 2016-06-30 | Robert Bosch Gmbh | Leistungsbauteil |
JP2017103434A (ja) * | 2015-12-04 | 2017-06-08 | トヨタ自動車株式会社 | 半導体装置 |
JP6439750B2 (ja) | 2016-05-20 | 2018-12-19 | 株式会社デンソー | 半導体装置 |
DE102016120778B4 (de) | 2016-10-31 | 2024-01-25 | Infineon Technologies Ag | Baugruppe mit vertikal beabstandeten, teilweise verkapselten Kontaktstrukturen |
JP6638620B2 (ja) * | 2016-11-01 | 2020-01-29 | 株式会社デンソー | 半導体装置 |
WO2018109820A1 (ja) * | 2016-12-13 | 2018-06-21 | 新電元工業株式会社 | 電子モジュール |
CN108807316B (zh) * | 2017-08-14 | 2020-07-10 | 苏州捷芯威半导体有限公司 | 半导体封装结构及半导体器件 |
JP7069787B2 (ja) * | 2018-02-09 | 2022-05-18 | 株式会社デンソー | 半導体装置 |
WO2020166255A1 (ja) * | 2019-02-13 | 2020-08-20 | 日立オートモティブシステムズ株式会社 | 半導体装置 |
JP2021027135A (ja) * | 2019-08-02 | 2021-02-22 | 株式会社デンソー | 半導体装置及びその製造方法 |
WO2024074194A1 (en) * | 2022-10-04 | 2024-04-11 | Huawei Technologies Co., Ltd. | Semiconductor arrangement with direct liquid cooling |
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JPS60119777A (ja) * | 1983-11-30 | 1985-06-27 | Mitsubishi Electric Corp | ゲ−トタ−ンオフサイリスタ |
JP2003258179A (ja) * | 2002-02-28 | 2003-09-12 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP2004221269A (ja) | 2003-01-14 | 2004-08-05 | Fuji Electric Device Technology Co Ltd | 半導体装置 |
JP4882234B2 (ja) | 2005-01-26 | 2012-02-22 | 富士電機株式会社 | 半導体装置およびその製造方法 |
JP5390064B2 (ja) * | 2006-08-30 | 2014-01-15 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
DE102006040820B4 (de) | 2006-08-31 | 2009-07-02 | Denso Corporation, Kariya | Elektrische Leistungspackung mit zwei Substraten mit mehreren elektronischen Komponenten |
JP4278680B2 (ja) * | 2006-12-27 | 2009-06-17 | 三菱電機株式会社 | 電子制御装置 |
JP5245485B2 (ja) | 2008-03-25 | 2013-07-24 | 富士電機株式会社 | 半導体装置の製造方法 |
JP5107839B2 (ja) * | 2008-09-10 | 2012-12-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5481148B2 (ja) | 2009-10-02 | 2014-04-23 | 日立オートモティブシステムズ株式会社 | 半導体装置、およびパワー半導体モジュール、およびパワー半導体モジュールを備えた電力変換装置 |
JP5396436B2 (ja) | 2011-06-29 | 2014-01-22 | 日立オートモティブシステムズ株式会社 | 半導体装置ならびに半導体装置の製造方法 |
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JP2013012596A (ja) | 2013-01-17 |
US9306020B2 (en) | 2016-04-05 |
WO2013002338A1 (ja) | 2013-01-03 |
EP2728615A4 (en) | 2015-07-22 |
CN103688352B (zh) | 2016-06-22 |
CN103688352A (zh) | 2014-03-26 |
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US20140110752A1 (en) | 2014-04-24 |
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