JP5393027B2 - シリコン・ゲルマニウム層中に高濃度のゲルマニウムを有するバイポーラ接合トランジスタおよびその形成方法 - Google Patents
シリコン・ゲルマニウム層中に高濃度のゲルマニウムを有するバイポーラ接合トランジスタおよびその形成方法 Download PDFInfo
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- JP5393027B2 JP5393027B2 JP2007503058A JP2007503058A JP5393027B2 JP 5393027 B2 JP5393027 B2 JP 5393027B2 JP 2007503058 A JP2007503058 A JP 2007503058A JP 2007503058 A JP2007503058 A JP 2007503058A JP 5393027 B2 JP5393027 B2 JP 5393027B2
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- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 title claims description 92
- 229910052732 germanium Inorganic materials 0.000 title claims description 90
- 229910000577 Silicon-germanium Inorganic materials 0.000 title claims description 68
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 title claims description 68
- 238000000034 method Methods 0.000 title claims description 35
- 230000003647 oxidation Effects 0.000 claims description 14
- 238000007254 oxidation reaction Methods 0.000 claims description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- 239000010703 silicon Substances 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 238000000137 annealing Methods 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 41
- 239000002019 doping agent Substances 0.000 description 27
- 235000012239 silicon dioxide Nutrition 0.000 description 20
- 239000000377 silicon dioxide Substances 0.000 description 20
- 230000015572 biosynthetic process Effects 0.000 description 16
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 9
- 238000005468 ion implantation Methods 0.000 description 8
- 125000006850 spacer group Chemical group 0.000 description 8
- 239000000758 substrate Substances 0.000 description 8
- 229910052581 Si3N4 Inorganic materials 0.000 description 7
- 238000002955 isolation Methods 0.000 description 7
- 230000007547 defect Effects 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 229920005591 polysilicon Polymers 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- 239000000969 carrier Substances 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- YBMRDBCBODYGJE-UHFFFAOYSA-N germanium dioxide Chemical compound O=[Ge]=O YBMRDBCBODYGJE-UHFFFAOYSA-N 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 229940119177 germanium dioxide Drugs 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000009279 wet oxidation reaction Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- -1 boron ion Chemical class 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
- H01L29/7371—Vertical transistors
- H01L29/7378—Vertical transistors comprising lattice mismatched active layers, e.g. SiGe strained layer transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1004—Base region of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66242—Heterojunction transistors [HBT]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
Description
Claims (10)
- 半導体デバイスを製造する方法であって、コレクタ領域を覆う、第1上面を有するシリコン・ゲルマニウム・ベース領域を形成すること、
前記第1上面内に熱成長酸化物を形成するために前記上面に沿って前記ベース領域を反応すること、
ゲルマニウム濃縮シリコン・ゲルマニウム部分を有する前記ベース領域の第2上面を露出するために前記熱成長酸化物を除去すること、および
前記ベースのゲルマニウム濃縮シリコン・ゲルマニウム部分上にエミッタ領域を形成することを含む方法。 - さらに、前記ベース領域の前記反応工程が、ゲルマニウム濃度が前記第2上面近傍でより多くなるように、前記ゲルマニウム濃度を変更することを含む、請求項1に記載の方法。
- さらに、前記ゲルマニウム濃縮シリコン・ゲルマニウム部分のゲルマニウム原子を再分配する前記半導体デバイスのアニールを含む、請求項1に記載の方法。
- シリコン・コレクタ上にベースを形成することであって、前記ベースが、その上面に隣接してシリコン・ゲルマニウム層を有するベースの形成と、
前記上面に隣接してゲルマニウム濃縮シリコン・ゲルマニウム部分を形成するために前記シリコン・ゲルマニウム層を熱酸化することであって、前記ゲルマニウム濃縮シリコン・ゲルマニウム部分が、前記ベースの残余よりかなり多いゲルマニウム濃度を有する熱酸化と、
前記ベースのゲルマニウム濃縮シリコン・ゲルマニウム部分上にエミッタを形成することとを含む、半導体デバイスを製造する方法。 - 前記ゲルマニウム濃縮シリコン・ゲルマニウム部分が、約30%より多いゲルマニウム濃度を有する、請求項4に記載の方法。
- 前記ゲルマニウム濃縮シリコン・ゲルマニウム領域がエミッタ領域とベース領域との間にバンド・ギャップ差を作り出す、請求項1に記載の方法。
- 前記ゲルマニウム濃縮シリコン・ゲルマニウム領域が、歪みゲルマニウム濃縮シリコン・ゲルマニウム領域を備える、請求項1に記載の方法。
- 前記半導体デバイスが、約0.21eVより大きい価電子帯オフセットを有する、請求項1に記載の方法。
- 前記ゲルマニウム濃縮シリコン・ゲルマニウム領域が、前記エミッタと前記ベースの間にバンド・ギャップ差を作り出す、請求項4に記載の方法。
- 前記ゲルマニウム濃縮シリコン・ゲルマニウム領域が、歪みゲルマニウム濃縮シリコン・ゲルマニウム領域を備える、請求項4に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US55230804P | 2004-03-10 | 2004-03-10 | |
US60/552,308 | 2004-03-10 | ||
PCT/US2005/008212 WO2005088721A1 (en) | 2004-03-10 | 2005-03-10 | A bipolar junction transistor having a high germanium concentration in a silicon-germanium layer and a method for forming the bipolar junction transistor |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013174500A Division JP5710714B2 (ja) | 2004-03-10 | 2013-08-26 | シリコン・ゲルマニウム層中に高濃度のゲルマニウムを有するバイポーラ接合トランジスタおよびその形成方法 |
Publications (2)
Publication Number | Publication Date |
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JP2007528617A JP2007528617A (ja) | 2007-10-11 |
JP5393027B2 true JP5393027B2 (ja) | 2014-01-22 |
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Family Applications (2)
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JP2007503058A Active JP5393027B2 (ja) | 2004-03-10 | 2005-03-10 | シリコン・ゲルマニウム層中に高濃度のゲルマニウムを有するバイポーラ接合トランジスタおよびその形成方法 |
JP2013174500A Active JP5710714B2 (ja) | 2004-03-10 | 2013-08-26 | シリコン・ゲルマニウム層中に高濃度のゲルマニウムを有するバイポーラ接合トランジスタおよびその形成方法 |
Family Applications After (1)
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JP2013174500A Active JP5710714B2 (ja) | 2004-03-10 | 2013-08-26 | シリコン・ゲルマニウム層中に高濃度のゲルマニウムを有するバイポーラ接合トランジスタおよびその形成方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7714361B2 (ja) |
EP (2) | EP2600403A1 (ja) |
JP (2) | JP5393027B2 (ja) |
KR (2) | KR101173526B1 (ja) |
WO (1) | WO2005088721A1 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10324065A1 (de) * | 2003-05-27 | 2004-12-30 | Texas Instruments Deutschland Gmbh | Verfahren zur Herstellung eines integrierten Silizium-Germanium-Heterobipolartranistors und ein integrierter Silizium-Germanium Heterobipolartransitor |
US8227319B2 (en) | 2004-03-10 | 2012-07-24 | Agere Systems Inc. | Bipolar junction transistor having a high germanium concentration in a silicon-germanium layer and a method for forming the bipolar junction transistor |
KR101173526B1 (ko) | 2004-03-10 | 2012-08-14 | 에이저 시스템즈 인크 | 실리콘-게르마늄층에서 고 게르마늄 농도를 갖는 바이폴라접합 트랜지스터 및 바이폴라 접합 트랜지스터를 형성하는방법 |
US7750371B2 (en) * | 2007-04-30 | 2010-07-06 | International Business Machines Corporation | Silicon germanium heterojunction bipolar transistor structure and method |
US7900167B2 (en) * | 2007-10-24 | 2011-03-01 | International Business Machines Corporation | Silicon germanium heterojunction bipolar transistor structure and method |
US7598539B2 (en) * | 2007-06-01 | 2009-10-06 | Infineon Technologies Ag | Heterojunction bipolar transistor and method for making same |
EP2281302B1 (en) | 2008-05-21 | 2012-12-26 | Nxp B.V. | A method of manufacturing a bipolar transistor semiconductor device |
US8574981B2 (en) * | 2011-05-05 | 2013-11-05 | Globalfoundries Inc. | Method of increasing the germanium concentration in a silicon-germanium layer and semiconductor device comprising same |
KR102259328B1 (ko) | 2014-10-10 | 2021-06-02 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3725161A (en) * | 1971-03-03 | 1973-04-03 | A Kuper | Oxidation of semiconductive alloys and products obtained thereby |
JPH0744185B2 (ja) * | 1988-11-22 | 1995-05-15 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JP3255423B2 (ja) * | 1989-12-27 | 2002-02-12 | レイテオン カンパニー | ゲルマニウム層を形成する方法 |
US5089428A (en) * | 1989-12-27 | 1992-02-18 | Texas Instruments Incorporated | Method for forming a germanium layer and a heterojunction bipolar transistor |
US5117271A (en) | 1990-12-07 | 1992-05-26 | International Business Machines Corporation | Low capacitance bipolar junction transistor and fabrication process therfor |
EP0881669B1 (en) * | 1997-05-30 | 2005-12-14 | STMicroelectronics S.r.l. | Manufacturing process of a germanium implanted heterojunction bipolar transistor |
US6815303B2 (en) * | 1998-04-29 | 2004-11-09 | Micron Technology, Inc. | Bipolar transistors with low-resistance emitter contacts |
JP3884203B2 (ja) * | 1998-12-24 | 2007-02-21 | 株式会社東芝 | 半導体装置の製造方法 |
US6437376B1 (en) * | 2000-03-01 | 2002-08-20 | Applied Micro Circuits Corporation | Heterojunction bipolar transistor (HBT) with three-dimensional base contact |
US6617220B2 (en) * | 2001-03-16 | 2003-09-09 | International Business Machines Corporation | Method for fabricating an epitaxial base bipolar transistor with raised extrinsic base |
US6767798B2 (en) * | 2002-04-09 | 2004-07-27 | Maxim Integrated Products, Inc. | Method of forming self-aligned NPN transistor with raised extrinsic base |
US6586297B1 (en) * | 2002-06-01 | 2003-07-01 | Newport Fab, Llc | Method for integrating a metastable base into a high-performance HBT and related structure |
US6686250B1 (en) * | 2002-11-20 | 2004-02-03 | Maxim Integrated Products, Inc. | Method of forming self-aligned bipolar transistor |
KR101173526B1 (ko) | 2004-03-10 | 2012-08-14 | 에이저 시스템즈 인크 | 실리콘-게르마늄층에서 고 게르마늄 농도를 갖는 바이폴라접합 트랜지스터 및 바이폴라 접합 트랜지스터를 형성하는방법 |
-
2005
- 2005-03-10 KR KR1020067018437A patent/KR101173526B1/ko active IP Right Grant
- 2005-03-10 JP JP2007503058A patent/JP5393027B2/ja active Active
- 2005-03-10 EP EP13155042.8A patent/EP2600403A1/en not_active Withdrawn
- 2005-03-10 WO PCT/US2005/008212 patent/WO2005088721A1/en not_active Application Discontinuation
- 2005-03-10 US US10/598,213 patent/US7714361B2/en active Active
- 2005-03-10 KR KR1020127015010A patent/KR101216580B1/ko active IP Right Grant
- 2005-03-10 EP EP05725404A patent/EP1733430A1/en not_active Withdrawn
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2013
- 2013-08-26 JP JP2013174500A patent/JP5710714B2/ja active Active
Also Published As
Publication number | Publication date |
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EP1733430A1 (en) | 2006-12-20 |
KR20070015921A (ko) | 2007-02-06 |
JP5710714B2 (ja) | 2015-04-30 |
KR101173526B1 (ko) | 2012-08-14 |
KR101216580B1 (ko) | 2012-12-31 |
KR20120068996A (ko) | 2012-06-27 |
US7714361B2 (en) | 2010-05-11 |
EP2600403A1 (en) | 2013-06-05 |
JP2014013921A (ja) | 2014-01-23 |
WO2005088721A1 (en) | 2005-09-22 |
US20080191245A1 (en) | 2008-08-14 |
JP2007528617A (ja) | 2007-10-11 |
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