JP5361381B2 - 半導体構成素子を製作するための方法及び薄膜半導体構成素子 - Google Patents
半導体構成素子を製作するための方法及び薄膜半導体構成素子 Download PDFInfo
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- JP5361381B2 JP5361381B2 JP2008524355A JP2008524355A JP5361381B2 JP 5361381 B2 JP5361381 B2 JP 5361381B2 JP 2008524355 A JP2008524355 A JP 2008524355A JP 2008524355 A JP2008524355 A JP 2008524355A JP 5361381 B2 JP5361381 B2 JP 5361381B2
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Description
‐半導体材料を有する層複合体を成長基板上に形成し、
‐フレキシブルな支持体層を前記層複合体に付与し、
‐フレキシブルな支持体層を自己支持型の支持体層へと硬化させ、
‐成長基板を剥離することを特徴とする、半導体構成素子を製作するための方法、及び、
‐半導体材料を有する層複合体を成長基板上に形成し、
‐自己支持型の支持体層を層複合体に付与し、この場合、支持体層がベース層と、層複合体に面した付着層とを有しており、この付着層が層複合体に付着し、
‐成長基板を剥離することを特徴とする、半導体構成素子を製作するための方法、
並びに請求項25及び26に記載の薄膜半導体構成素子、即ち:
‐積層体と、
‐該積層体に配置された自己支持型の支持体層を有しており、しかも、該支持体層が硬化されていることを特徴とする、薄膜半導体構成素子、及び、
‐積層体と、
‐該積層体に配置された自己支持型の支持体層を有しており、しかも、該支持体層が、ベース層と、前記積層体に面した付着層とを有しており、該付着層が積層体に付着していることを特徴とする、薄膜半導体構成素子によって解決される。前記方法及び薄膜半導体構成素子の有利な改良は、従属請求項に記載されている。
‐半導体材料を有する層複合体を成長基板上に形成し、
‐フレキシブルな支持体層を層複合体に付与し、
‐フレキシブルな支持体層を自己支持型の支持体層へと硬化させ、
‐成長基板を剥離する。
‐半導体材料を有する層複合体を成長基板上に形成し、
‐自己支持型の支持体層を層複合体に付与し、この場合、支持体層がベース層と、層複合体に面した付着層とを有しており、この付着層が層複合体に付着し、
‐成長基板を剥離する。
‐支持体エレメントに面した、放射線発生型のエピタキシ層列の第1の主要面に、有利には反射性の層が付与又は形成されており、この層が、エピタキシ層列において発生された電磁放射線の少なくとも一部を、エピタキシ層に反射し戻し、
‐エピタキシ層列が、20μm又は20μm未満の範囲内、特に10μmの範囲内の厚さを有しており、
‐エピタキシ層列が、混合層を有する少なくとも1つの面を備えた、少なくとも1つの半導体層を有しており、前記混合層が、理想的にはほぼエルゴード的な配光をエピタキシャルなエピタキシ層列内に生ぜしめる、即ち、前記混合層は、可能な限りエルゴード的な確率の散乱特性を有している。
‐積層体、
‐該積層体に配置された自己支持型の、有利には剛性の支持体層を有しており、しかも、該支持体層は硬化されている。
‐積層体、
‐該積層体に配置された自己支持型の支持体層を有しており、しかも、該支持体層が、ベース層と、前記積層体に面した付着層とを有しており、該付着層が積層体に付着している。
Claims (42)
- ‐半導体材料を有する層複合体(6)を成長基板(1)上に形成し、前記層複合体(6)は、電磁放射線を発生させるための活性層列(4)を有しており、
‐フレキシブルな支持体層(2)を前記層複合体(6)に付与し、
‐フレキシブルな支持体層を自己支持型の支持体層(2)へと硬化させ、
‐成長基板(1)を剥離し、
‐シートであるフレキシブルな被覆層(11)を、前記層複合体(6)の、前記支持体層(2)とは反対の側に付与し、前記支持体層(2)と前記被覆層(11)とは、完成した薄膜半導体チップ内にとどまり、
‐前記層複合体(6)を、各1つの積層体(60)を有する複数の薄膜半導体チップ(8)に個別化することを特徴とする、放射線放射型の薄膜半導体チップ(8)を製作するための方法。 - ‐半導体材料を有する層複合体(6)を成長基板(1)上に形成し、前記層複合体(6)は、電磁放射線を発生させるための活性層列(4)を有しており、
‐自己支持型の支持体層(2)を層複合体(6)に付与し、この場合、支持体層(2)がベース層(2b)と、層複合体(6)に面した付着層(2a)とを有しており、この付着層が層複合体(6)に付着し、
‐成長基板(1)を剥離し、
‐シートであるフレキシブルな被覆層(11)を、前記層複合体(6)の、前記支持体層(2)とは反対の側に付与し、前記支持体層(2)と前記被覆層(11)とは、完成した薄膜半導体チップ内にとどまり、
‐前記層複合体(6)を、各1つの積層体(60)を有する複数の薄膜半導体チップ(8)に個別化することを特徴とする、放射線放射型の薄膜半導体チップ(8)を製作するための方法。 - 付着層(2a)を溶融接着剤から形成する、請求項2記載の方法。
- ベース層(2b)をプラスチック材料から形成する、請求項2又は3記載の方法。
- 支持体層(2)がシートである、請求項1から4までのいずれか1項記載の方法。
- 支持体層(2)が透明である、請求項1から5までのいずれか1項記載の方法。
- 支持体層(2)がプラスチック材料を有している、請求項1又は請求項1を引用する請求項5又は6記載の方法。
- 前記プラスチック材料が、エポキシ樹脂、ポリエチレンテレフタレート及び/又はポリマーを有している、請求項7記載の方法。
- 前記プラスチック材料が150℃の範囲内の硬化温度を有している、請求項7又は8記載の方法。
- 支持体層(2)が、100μm未満又は100μmの厚さを有している、請求項1から9までのいずれか1項記載の方法。
- 支持体層(2)が熱伝導性材料を有している、請求項1から10までのいずれか1項記載の方法。
- 支持体層(2)が電気的に絶縁性の材料を有している、請求項1から11までのいずれか1項記載の方法。
- 支持体層(2)が少なくとも1つの電気的な導体路(10a)を有している、請求項2又は請求項2を引用する、請求項3から6,10から12までのいずれか1項記載の方法。
- 支持体層(2)が導電性材料を有している、請求項1から13までのいずれか1項記載の方法。
- 層複合体(6)が、支持体層(2)に面した側に第1の金属化コンタクト(50)を有している、請求項1から14までのいずれか1項記載の方法。
- 前記金属化コンタクト(50)が、活性層列(4)から発生された放射線を少なくとも部分的に反射する、請求項15記載の方法。
- 成長基板(1)を、レーザ剥離法により剥離する、請求項1から16までのいずれか1項記載の方法。
- 成長基板(1)の剥離後に、層複合体(6)に第2の金属化コンタクト(3)を設ける、請求項1から17までのいずれか1項記載の方法。
- 第2の金属化コンタクト(3)に被覆層(11)を付与する、請求項18記載の方法。
- フレキシブルな被覆層(11)を部分的に又は完全に硬化させる、請求項1又は2記載の方法。
- ‐電磁放射線を発生させるための活性積層(40)を有する積層体(60)と、
‐該積層体(60)に配置された自己支持型の支持体層(2)を有しており、しかも、該支持体層が硬化されており、
‐シートであり、前記積層体(60)の、前記支持体層(2)とは反対の側に配置される被覆層(11)を有していることを特徴とする、放射線放射型の薄膜半導体チップ(8)。 - ‐電磁放射線を発生させるための活性積層(40)を有する積層体(60)と、
‐該積層体(60)に配置された自己支持型の支持体層(2)を有しており、しかも、該支持体層(2)が、ベース層(2b)と、前記積層体(60)に面した付着層(2a)とを有しており、該付着層が積層体(60)に付着しており、
‐シートであり、前記積層体(60)の、前記支持体層(2)とは反対の側に配置される被覆層(11)を有していることを特徴とする、放射線放射型の薄膜半導体チップ(8)。 - 付着層(2a)が溶融接着剤から形成されている、請求項22記載の薄膜半導体チップ。
- ベース層(2b)がプラスチック材料から形成されている、請求項22又は23記載の薄膜半導体チップ。
- 支持体層(2)がシートである、請求項21から24までのいずれか1項記載の薄膜半導体チップ。
- 支持体層(2)が透明である、請求項21から25までのいずれか1項記載の薄膜半導体チップ。
- 支持体層(2)がプラスチック材料を有している、請求項21又は請求項21を引用する請求項25又は26記載の薄膜半導体チップ。
- 支持体層が、エポキシ樹脂、ポリエチレンテレフタレート及び/又はポリイミドを有している、請求項27記載の薄膜半導体チップ。
- 支持体層(2)が電気的に絶縁性の材料を有している、請求項21から28までのいずれか1項記載の薄膜半導体チップ。
- 支持体層(2)が少なくとも1つの電気的な導体路(10a)を有している、請求項22又は請求項22を引用する、請求項23から26、29のいずれか1項記載の薄膜半導体チップ。
- 支持体層(2)が導電性材料を有している、請求項21から28までのいずれか1項記載の薄膜半導体チップ。
- 支持体層(2)が金属、特にアルミニウム、銀、チタン又は銅を有しているか、あるいは合金、特に黄銅を有している、請求項31記載の薄膜半導体チップ。
- 支持体層(2)が炭素繊維を有している、請求項31記載の薄膜半導体チップ。
- 支持体層(2)がケイ酸塩を有している、請求項21から32までのいずれか1項記載の薄膜半導体チップ。
- 支持体層(2)が、100μm未満又は100μmの厚さを有している、請求項21から34までのいずれか1項記載の薄膜半導体チップ。
- 被覆層(11)が自己支持型である、請求項21から35までのいずれか1項記載の薄膜半導体チップ。
- 前記被覆層(11)が光学的な構造を有している、請求項36記載の薄膜半導体チップ。
- 前記被覆層(11)が変換材料を有している、請求項36又は37記載の薄膜半導体チップ。
- 支持体層(2)と被覆層(11)との間に充填層(17)が配置されている、請求項36から38までのいずれか1項記載の薄膜半導体チップ。
- 支持体層(2)及び被覆層(11)が、放射線を放射する半導体構成素子(8)のためのケーシング体を形成している、請求項36から39までのいずれか1項記載の薄膜半導体チップ。
- 被覆層(11)が、活性積層(40)から発生される放射線に関して透過性である、請求項36から40までのいずれか1項記載の薄膜半導体チップ。
- 薄膜半導体チップ(8)が両面放射型である、請求項41記載の薄膜半導体チップ。
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DE102005055293A DE102005055293A1 (de) | 2005-08-05 | 2005-11-21 | Verfahren zur Herstellung von Halbleiterchips und Dünnfilm-Halbleiterchip |
PCT/DE2006/001367 WO2007016908A1 (de) | 2005-08-05 | 2006-08-04 | Verfahren zur herstellung von halbleiterbauelementen und dünnfilm-halbleiterbauelement |
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DE102005055293A1 (de) | 2005-08-05 | 2007-02-15 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von Halbleiterchips und Dünnfilm-Halbleiterchip |
DE102007004301A1 (de) * | 2006-08-04 | 2008-02-07 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements und Dünnfilm-Halbleiterbauelement |
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US8058147B2 (en) | 2011-11-15 |
EP1911104A1 (de) | 2008-04-16 |
DE102005055293A1 (de) | 2007-02-15 |
CN101238593A (zh) | 2008-08-06 |
US20100133564A1 (en) | 2010-06-03 |
WO2007016908A1 (de) | 2007-02-15 |
JP2009503878A (ja) | 2009-01-29 |
TWI319591B (en) | 2010-01-11 |
KR101330455B1 (ko) | 2013-11-15 |
TW200746231A (en) | 2007-12-16 |
KR20080035679A (ko) | 2008-04-23 |
CN101238593B (zh) | 2010-05-26 |
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R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
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R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |