CN101238593B - 用于制造半导体器件的方法和薄膜半导体器件 - Google Patents
用于制造半导体器件的方法和薄膜半导体器件 Download PDFInfo
- Publication number
- CN101238593B CN101238593B CN2006800287081A CN200680028708A CN101238593B CN 101238593 B CN101238593 B CN 101238593B CN 2006800287081 A CN2006800287081 A CN 2006800287081A CN 200680028708 A CN200680028708 A CN 200680028708A CN 101238593 B CN101238593 B CN 101238593B
- Authority
- CN
- China
- Prior art keywords
- layer
- supporting mass
- thin
- film semiconductor
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 114
- 239000010409 thin film Substances 0.000 title claims description 58
- 238000004519 manufacturing process Methods 0.000 title abstract description 14
- 239000002131 composite material Substances 0.000 claims abstract description 53
- 239000000463 material Substances 0.000 claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 239000010410 layer Substances 0.000 claims description 342
- 238000000034 method Methods 0.000 claims description 58
- 238000010276 construction Methods 0.000 claims description 46
- 230000005855 radiation Effects 0.000 claims description 33
- 238000001465 metallisation Methods 0.000 claims description 23
- 239000004033 plastic Substances 0.000 claims description 13
- 229920003023 plastic Polymers 0.000 claims description 13
- 239000004020 conductor Substances 0.000 claims description 11
- 229910052709 silver Inorganic materials 0.000 claims description 9
- 239000003822 epoxy resin Substances 0.000 claims description 8
- 229920000647 polyepoxide Polymers 0.000 claims description 8
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 7
- 230000005670 electromagnetic radiation Effects 0.000 claims description 7
- 238000009413 insulation Methods 0.000 claims description 7
- 239000004332 silver Substances 0.000 claims description 7
- 239000004642 Polyimide Substances 0.000 claims description 6
- 230000003287 optical effect Effects 0.000 claims description 6
- -1 polyethylene terephthalate Polymers 0.000 claims description 6
- 229920001721 polyimide Polymers 0.000 claims description 6
- 229920000139 polyethylene terephthalate Polymers 0.000 claims description 5
- 239000005020 polyethylene terephthalate Substances 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 239000012943 hotmelt Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 230000007704 transition Effects 0.000 claims description 4
- 229920000049 Carbon (fiber) Polymers 0.000 claims description 3
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 3
- 239000004917 carbon fiber Substances 0.000 claims description 3
- 229920000642 polymer Polymers 0.000 claims description 3
- 239000002356 single layer Substances 0.000 claims description 3
- 229910001369 Brass Inorganic materials 0.000 claims description 2
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 claims description 2
- 230000002146 bilateral effect Effects 0.000 claims description 2
- 239000010951 brass Substances 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 230000000717 retained effect Effects 0.000 claims 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims 1
- 239000004411 aluminium Substances 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- 239000010949 copper Substances 0.000 claims 1
- 239000010936 titanium Substances 0.000 claims 1
- 239000010408 film Substances 0.000 description 17
- 239000011230 binding agent Substances 0.000 description 12
- 239000011521 glass Substances 0.000 description 8
- 239000012528 membrane Substances 0.000 description 6
- 230000005611 electricity Effects 0.000 description 5
- 230000002349 favourable effect Effects 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 208000034189 Sclerosis Diseases 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 3
- 150000001252 acrylic acid derivatives Chemical class 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229920006254 polymer film Polymers 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005352 clarification Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000001429 visible spectrum Methods 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01025—Manganese [Mn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01049—Indium [In]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P20/00—Technologies relating to chemical industry
- Y02P20/50—Improvements relating to the production of bulk chemicals
- Y02P20/582—Recycling of unreacted starting or intermediate materials
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
- Laminated Bodies (AREA)
- Recrystallisation Techniques (AREA)
Abstract
本发明涉及一种用于制造半导体器件的方法,其中在生长衬底(1)上构建包含半导体材料的层复合结构(6),将柔性的支承体层(2)施加到所述层复合结构(6)上,将柔性的层硬化为自支承的支承体层(2),以及将生长衬底(1)剥离。替代地,支承体层(2)可以具有基本层(2b)和粘附在层复合结构上的粘附层(2a)。
Description
本发明涉及一种用于制造半导体器件的方法和一种薄膜半导体器件。
本发明的任务是,提出一种简化的用于制造半导体器件的方法。此外,本发明的任务是,提出一种薄膜半导体器件,该器件容易处理并且机械稳定。
该任务通过根据权利要求1和2的方法以及根据权利要求25和26的薄膜半导体器件来解决。所述方法和薄膜半导体器件的有利的改进方案在从属权利要求中说明。
根据本发明的用于制造半导体器件的方法的第一变形方案包括以下步骤:
-在生长衬底上构建包含半导体材料的层复合结构,
-将柔性的支承体层施加到所述层复合结构上,
-将所述柔性的支承体层硬化为自支承的支承体层,
-将生长衬底剥离。
于是,在层复合结构的背离生长衬底的侧施加了柔性的支承体层,该支承体层在硬化之后作为自支承的、优选为刚性的支承体层附着在层复合结构上。
根据本发明的用于制造半导体器件的方法的第二变形方案包括以下步骤:
-在生长衬底上构建包含半导体材料的层复合结构,
-将自支承的支承体层施加到所述层复合结构上,其中支承体层具有基本层和朝着层复合结构的粘附层,该粘附层粘附在层复合结构上,
-将生长衬底剥离。
于是,在层复合结构的背离生长衬底的侧施加了支承体层。在完成的半导体器件中,该支承体层作为自支承的、优选为刚性的支承体层附着在层复合结构上。
有利的是,可以在层复合结构和支承体层之间设置特别的连接,譬如焊接连接,由此可以省去导致开销的方法步骤-接合。
根据第一变形方案,相对于柔性的支承体层,自支承的支承体层的优点是,其构造更坚固并且因此更易处理。
在第二变形方案中,粘附层由热熔粘合剂(Schmelzklebstoff)形成,而基本层由固态塑料形成。在此,需要对粘附层加热,以将该粘附层熔化,并且实现层复合结构的足够的润湿并在硬化之后实现足够的粘附。在室温时,粘附层优选为固态的。此外可能的是,粘附层无需附加的加热就粘附在层复合结构上。在这种情况中,粘附层例如可以包含硅树脂,而基本层包含聚酰亚胺。
在所述方法的第二变形方案的一种优选的实施形式中,基本层包含塑料材料。替代地,基本层可以包含玻璃。
优选的是,支承体层是薄片(Folie)。特别地,支承体层可以是以片状(in Bahnen)制造的塑料片。在根据本发明的支承体层的较小的厚度情况下也能实现足够的稳定性。因为由于较小的厚度,支承体层具有弹性,由此减小了形成裂缝的危险。在此,较小的厚度理解为优选100μm,特别优选为小于100μm。
特别优选的是,支承体层是透明的。这样的优点是,支承体层可以同时用作耦合输出层。
借助根据本发明的方法,优选地制造薄膜半导体器件,特别是发射辐射的薄膜半导体器件。
发射辐射的薄膜半导体器件的特征尤其是在于至少一个以下特征:
-在产生辐射的外延层序列的、朝着支承体元件的第一主面上优选地施加或者构造了反射层,该反射层将外延层序列中产生的电磁辐射的至少一部分反射回该外延层序列中;
-外延层序列具有20μm或者更小范围中的厚度,特别是10μm范围中的厚度;以及
-外延层序列包含至少一个带有至少一个面的半导体层,其中所述面具有混匀结构,该结构在理想情况下导致光在外延的外延层序列中的近似各态历经的分布,即其具有尽可能各态历经的随机散射特性。
发射辐射的薄膜半导体器件的基本原理例如在1993年10月18日I.Schnitzer等人所著的Appl.Phys.Lett.63(16)的第2174-2176页中进行了描述,其公开内容通过引用结合于此。
这种发射辐射的薄膜半导体器件良好地近似于朗伯(Lambert’scher)表面发射器。
在本发明中,层复合结构相应地具有有源层序列,用于产生电磁辐射。该有源层序列优选外延地生长在生长衬底上。
为了制造多个薄膜半导体器件,层复合结构被结构化为单个的层堆叠。这些层堆叠例如可以通过锯割来分离。
支承体层可以预先结构化地施加到层复合结构上,使得层复合结构可以沿着该结构被分离为层堆叠。
在根据本发明的方法的第一变形方案的一种优选的实施形式中使用了具有塑料材料的支承体层。这种支承体层特别优选地包含环氧树脂,PET(聚对苯二甲酸乙二酯)或者聚合物,特别是聚酰亚胺,例如Kapton,或者这些材料的组合。Kapton是由DuPont公司提供的聚酰亚胺产品的商标名称。
在传统的方法中,在将层复合结构接合到支承体本体上时,典型地达到400℃范围的温度。在随后冷却到室温时,当生长衬底和支承体本体的热膨胀系数彼此差别较大时,会出现张紧或者扭曲。此外,由此会在支承体本体中出现裂缝,使得形成的器件不再具有足够的稳定性。
因为根据本发明的方法以较低的温度实现,所以出现较小的热张紧,由此有利地减小了形成裂缝的危险。
例如,包含填充有银的环氧树脂的支承体层在80℃至90℃时熔化,并且在150℃的温度时硬化,其中10%的偏差是可允许的。
根据本发明的支承体层的另一种可能性是用玻璃颗粒填充的粘合剂膜。该粘合剂膜可以由混合材料形成,该混合材料特别是包含环氧树脂和丙烯酸盐。带有银涂层的玻璃颗粒被嵌入到该混合材料中,其中粘合剂膜有利地借助玻璃颗粒而导电。粘合剂膜可以在120℃时熔化,并且在160℃时被硬化了30分钟长。
为了使得在根据本发明的方法所制造的半导体器件中能够导出工作时产生的损耗热,支承体层优选地导热地构建。由此,可以避免不希望的影响,例如半导体器件所发射的辐射的波长偏移或者强度降低。
在根据本发明的方法的一种优选的实施形式中,支承体层用电绝缘的材料构建。在支承体层上可以施加至少一个电印制导线,以便以后将由施加在共同的支承体层上的层堆叠构成的装置或者被分割的器件与电极相连。
替代地,支承体层可以用导电的材料构建。例如,支承体层含有金属,特别是Al、Ag、Ti、Cu或者合金,特别是黄铜。
为了半导体器件的电接触,层复合结构在朝着支承体层的侧设置有接触面,特别是包含有金属的接触金属化物。
在根据本发明的方法的一种优选的实施形式中,针对接触金属化物选择了一种材料,该材料将在以后的工作中由有源的层堆叠产生的辐射至少部分地反射。特别是当支承体层对于所产生的辐射不可穿透,并且辐射在半导体器件的、与支承体层对置的侧上耦合输出时,这一点是有利的。
生长衬底优选地通过激光剥离方法去除,例如由WO 98/14986所公开的那样,其内容在此通过引用结合于此。生长衬底也可以通过其它方法,例如等离子体刻蚀或者干刻蚀来剥离或者以机械方式去除。
在剥离生长衬底之后,在层复合结构的与支承体层背离的侧上优选地施加第二接触面,特别是接触金属化物,该第二接触面设置用于另外地电接触以后的薄膜半导体器件。
此外,可以在层堆叠的背离支承体层的侧施加柔性的覆盖层,该覆盖层可以被硬化。替代地,柔性的覆盖层可以保持未完全硬化的状态。
另一种可能性在于,施加具有基本层和朝着层复合结构的粘附层的覆盖层,其中粘附层粘附在层复合结构上。
特别地,覆盖层可以是薄片。
优选的是,覆盖层对于有源层所产生的辐射是可穿透的。在一种有利的实施形式中,覆盖层包含转换材料,用于将以后的有源层堆叠所产生的辐射部分地进行波长转换。
特别优选的是,覆盖层具有与支承体层对应的特性。然而,覆盖层也可以包含与支承体层不同的材料。
根据一种优选的变形方案,覆盖层由玻璃构成。此外,覆盖层在朝着层复合结构的侧可以具有至少一个印制导线,用于从上侧接触薄膜半导体器件。其中该印制导线特别是包含辐射透射的材料,例如ITO(铟锡氧化物)。
有利的是,可以两侧地设置支承体层和覆盖层来替代壳体。
一种根据第一变形方案的根据本发明的薄膜半导体器件,该半导体器件优选地可以相应于根据本发明的方法的第一变形方案来制造,具有以下的组成部分:
-层堆叠,
-自支承的、优选为刚性的支承体层,该支承体层设置在层堆叠上,其中支承体层被硬化。
一种根据第二变形方案的根据本发明的薄膜半导体器件,该半导体器件优选地可以相应于根据本发明的方法的第二变形方案来制造,具有以下的组成部分:
-层堆叠,
-自支承的支承体层,该支承体层设置在层堆叠上,其中支承体层具有基本层和朝着层堆叠的粘附层,该粘附层粘附在层堆叠上。
特别地,支承体层具有已经结合所述方法的第一和第二变形方案所提及的特性。
因为在具有根据本发明的支承体层的薄膜半导体器件中,存在足够的机械稳定性,所以无需附加的支承体。由此,半导体器件能够以有利地小的结构高度(例如120μm)来实施。
薄膜半导体器件被设计用于产生电磁辐射,并且为此具有有源的层堆叠。该有源的层堆叠是层堆叠的一部分。例如,有源的层堆叠可以具有传统的pn结、双异质结构、单量子阱结构或者多量子阱结构。
此外,在一种优选的实施形式中,薄膜半导体器件具有氮化物化合物半导体,这意味着,有源的层堆叠或者其中至少一层包括氮化物-III/V-化合物半导体材料,优选为AlnGamIn1-n-mN,其中0≤n≤1,0≤m≤1并且n+m≤1。在此,该材料不必一定具有根据上式的数学上精确的组成。更确切地说,该材料可以具有一种或者多种掺杂剂以及附加的组成部分,它们基本上不改变AlnGamIn1-n-mN材料的典型的物理特性。然而,出于简单的原因,上式仅仅包括晶格的主要组成部分(Al,Ga,In,N),即使它们可以部分地通过少量其它的物质、例如P来替代。
具有氮化物化合物半导体的薄膜半导体器件主要发射具有在可见光谱中的短波范围中的波长的辐射。
波长可以借助在辐射方向中设置在层堆叠之后的转换元件至少部分地转化为较长波长。
特别地,可以将转换材料集成到薄膜半导体器件中,优选集成在覆盖层中。
根据本发明,支承体层可以包含塑料材料。对于支承体层优选的材料例如是环氧树脂、PET、聚合物,特别是聚酰亚胺,例如Kapton,或者这些材料的组合。
此外,支承体层或者覆盖层可以具有任何结合根据本发明的方法所提及的特性。相应的也适用于薄膜半导体器件。
此外,在一种优选的实施形式中,支承体层包含碳纤维。这些碳纤维例如可以被嵌入聚合物膜中,并且具有比聚合物膜更高的导热性,使得由此有利地总体上得到粘附的并且导热的支承体层。此外,支承体层可以具有玻璃网,特别是硅酸盐。
在另一种优选的实施形式中,支承体层对于由有源的层堆叠所产生的辐射是可穿透的。这样的优点是,辐射可以直接耦合输出,并且减少了由于在有源的层堆叠中对被反射的辐射的吸收而会出现的辐射损耗。
可能的是,将覆盖层施加在背离支承体层的侧,该覆盖层可以保持未完全硬化的状态,而优选的是自支承地、特别是刚性地构建,并且具有对应于支承体层的特性。
在一种有利的实施形式中,覆盖层包括转换材料,用于将有源的层堆叠所产生的辐射部分地进行波长转换。此外,覆盖层可以具有光学结构。光学结构可以设置到覆盖层的朝着层堆叠或者背离层堆叠的侧上。有利的是,可以借助光学结构来影响在薄膜半导体器件中产生的辐射的辐射特性。例如,光学结构可以构建为透镜状、棱镜状或者棱锥状。
因为层堆叠典型地具有在20μm或者10μm范围中的高度,所以支承体层和覆盖层(其厚度特别优选地小于或者等于100μm)可以包围层堆叠。这样的优点是,无需另外的亮体。
根据一种优选的实施形式,在支承体层和覆盖层之间设置了填充层。填充层例如可以包含塑料材料。
此外,薄膜半导体器件可以安装到壳体中。
在一种特别的实施形式中,支承体层和覆盖层对于有源的层堆叠所产生的辐射都是可穿透的,这导致双侧发射的薄膜半导体器件。
所述方法或者薄膜半导体器件的其它的特征和有利的扩展方案由以下结合图1a至1f、2和3进一步阐述的实施例中得出。
其中:
图1a至1f借助六个制造步骤示意性示出了根据本发明的方法的第一实施例,
图2是根据本发明的薄膜半导体器件的第一实施例的示意性透视图,
图3是根据本发明的薄膜半导体器件的第二实施例的示意性透视图,
图4是根据第一实施例的根据本发明的薄膜半导体器件的示意性剖面图,其中该薄膜半导体器件设置在壳体中,
图5a至5d借助四个制造步骤示意性示出了根据本发明的方法的第二实施例。
在这些实施例中,相同的或者作用相同的组成部分分别设置有相同的参考标号。附图的所示的组成部分、特别是所示的层厚的大小基本上不能视为符合比例。更确切地说,它们可以为了更好的理解而被部分夸大地示出。
在图1a至1f中分别示出了根据本发明的方法的第一实施例的制造步骤。
在图1a中所示的第一制造步骤中,有源层序列4被施加到生长衬底1上。这例如可以通过在蓝宝石衬底或者SiC衬底上外延地生长多个不同的层来实现。其中这些层优选地包含根据上述定义的氮化物化合物半导体。这样制造的有源层序列4优选地适合于产生电磁辐射。其结构对应于上述可能性之一来构造。
在图1b中示出了第二制造步骤,其中在有源层序列4上施加接触金属化物5。有源层序列4和接触金属化物5一同形成了层复合结构6。接触金属化物5导电,并且此外在尤其是由层复合结构形成的器件的以后的工作中,反射由有源的层堆叠40发射的辐射。
接触金属化物5可以整面地施加在有源层序列4上。替代地,接触金属化物5可以例如通过掩模部分地施加在一些位置上,其中以后在这些位置上构建层堆叠。
优选的是,接触金属化物5包含金属材料,例如Ag、Al或Au,该材料例如被气相淀积。此外,可以在有源层序列4上设置带有集成的电接触部和不同的介电常数的层,这些层形成布拉格反射器。
在以后的器件中,接触金属化物5可以同时形成背面的电接触部。
在图1c中示出的第三制造步骤中,在层复合结构6上首先设置共同的柔性支承体层2,该支承体层2随后被硬化为刚性的、自支承的支承体层2。支承体层2的厚度优选在100μm的范围中。
例如,针对支承体层2使用了填充银的环氧树脂粘合剂膜,该环氧树脂粘合剂膜包含80%的银和20%的非挥发性的环氧树脂。填充银的环氧树脂粘合剂膜被施加到层复合结构6上,并且随后被加热到80℃至90℃。在此,粘合剂膜容易熔化,由此该粘合剂膜获得良好的初步粘附(Primaerhaftung)。随后,该膜在大约150℃的情况下硬化。这样形成的支承体层2导电,并且具有150至155℃的玻璃化转变温度。此外,支承体层2是耐热和耐化学腐蚀的。
对于支承体2,特别是可以使用任意其他的材料,优选使用一种塑料材料,所述材料具有这样的特性:这些特性对应于例如借助环氧树脂粘合剂膜表明的特性。
在另一种变形方案中,支承体层2包括被填充的粘合剂膜。该粘合剂膜由混合材料构成,该混合材料包含环氧树脂和丙烯酸盐。带有银涂层的玻璃颗粒被嵌入到该混合材料中,其中粘合剂膜有利地借助玻璃颗粒而导电。粘合剂膜可以在120℃时熔化,并且在160℃时被硬化了30分钟长。
在图1d中示出了第四制造步骤,其中生长衬底1被从层复合结构6剥离。剥离可以借助激光剥离方法来进行,如例如由WO 98/14986公开的那样,其内容通过引用结合于此。替代地,剥离可以通过刻蚀或者其它合适的提取方法来实现。
基本上,在激光剥离方法中,穿过生长衬底1用电磁辐射(优选为激光辐射)照射在生长衬底1和有源层序列4之间的边界面,使得在该边界面上通过吸收辐射而产生材料分解。由此,生长衬底1和有源层序列4可以基本上无损坏地彼此分离。由此,可以继续使用生长衬底1。
在图1e中示出的第五制造步骤中,由支承体层2上的层复合结构6形成彼此分离的层堆叠60,这些层堆叠具有有源的层堆叠40和各个导电的接触金属化物50。这例如通过湿化学刻蚀或者干刻蚀进行。
替代地,层复合结构6可以在结合图1b所描述的制造步骤中已经被分离为单个的层堆叠60。这同样可以通过刻蚀、例如通过等离子体刻蚀进行。
在图1f中示出了第六制造步骤,其中将第二接触金属化物3施加到层堆叠60上,第二接触金属化物3例如用于以后的半导体器件的上侧的接触。
层堆叠60可以与支承体层2一同沿着分割面7被分割,特别是锯开。由此形成单个的半导体器件8,这些半导体器件可以单个地安装到亮体中。
可以添加另外的制造步骤,其中在分割之前,在层堆叠60上在与支承体层2对置的侧施加柔性的覆盖层,该覆盖层随后可以被硬化为刚性的、自支承的覆盖层,或者替代地可以保持未完全硬化的状态。
要指出的是,根据本发明的方法并非固定为根据实施形式所说明的次序。
在图2中示出了层堆叠60,其优选地依照根据本发明的方法来制造。
层堆叠60包括接触金属化物50和有源的层堆叠40。层堆叠60的高度大约为10μm。在有源的层堆叠40上施加了第二接触金属化物3。层堆叠60设置在刚性的、自支承的支承体层2上,该支承体层具有大约100μm的厚度。
根据第一实施形式,半导体器件8单独地沿着分割面7分割。作为单个的半导体器件,它们例如可以安装在壳体中。因为支承体层2刚性、自支承并且足够稳定地构建,所以半导体器件8容易处理,而无需附加的辅助支承体用于进一步加工。
此外,支承体层2优选导电地构建,使得半导体器件8可以从背面通过支承体层2连接到第一电极上。通过第二接触金属化物3,半导体器件8可以从上侧连接到第二电极。此外,接触金属化物50导电,并且将有源的层堆叠40中产生的辐射反射。由此可以提高在辐射方向9中的辐射量。
根据第二实施形式,支承体层2未被分割。更确切地说,设置在支承体层2上的层堆叠60形成了矩阵。支承体层2例如可以是导电的。替代地,支承体层2可以是电绝缘的,并且具有分离地施加的印制导线。这些印制导线可以将层堆叠60以任意的、预先给定的方式彼此相连。
这种矩阵布置例如可以用于显示器或者显示器背光。
在图3中示出了根据本发明的半导体器件8,该器件具有设置在支承体层2上的层堆叠60,该层堆叠具有施加在其上的第二接触金属化物3。
在该实施例中,接触金属化物50导电,并且对于有源的层堆叠40产生的辐射是可穿透的。此外,支承体层2是电绝缘的,并且对于有源的层堆叠40产生的辐射是可穿透的。
在半导体器件8的与支承体层2对置的侧设置有覆盖层11。覆盖层11如支承体层2那样是电绝缘的,并且对于有源的层堆叠40产生的辐射是可穿透的。由此,薄膜半导体器件8不但在辐射方向9上发射,而且在辐射方向12上发射。覆盖层11以及支承体层2可以具有光学结构,如上面已经提及的那样。
优选的是,两个层2和11包含塑料材料。
支承体层2和覆盖层11具有印制导线10a、b,这些印制导线将薄膜半导体器件8和电压供给相连。支承体层2和覆盖层11可以在施加到层堆叠60上之前设置有印制导线10a、b。在支承体层2和覆盖层11之间可以设置填充层17。优选的是,填充层17包含电绝缘的材料,这样防止了在支承体层2和覆盖层11之间的短路。
所示的薄膜半导体器件8具有足够的机械稳定性,使得可以省去进一步安装到壳体中。由于层堆叠60的高度(大约10μm)比支承体层2和柔性的覆盖层11的厚度(大约100μm)小,层堆叠60在一定程度上可以被两个层2和11包围。
在图4中示出的薄膜半导体器件8设置在壳体12中。为了安装半导体器件8,支承体层2被熔化和硬化。在硬化之后,半导体器件8被固定在安装面16上。支承体层2有利地包含导电的材料,如结合图2已经描述的那样,使得借助支承体层2可以从背面电连接。安装面16优选地设置在引线框架的第一部分13a上,使得薄膜半导体器件8可以从背面借助引线框架13a电连接。在上侧,薄膜半导体器件8借助电导体14与第二引线框架13b电连接。薄膜半导体器件8被嵌入填料(Verguss)15中。
结合图5a至5d所描述的根据本发明的方法的第二实施例可以具有已经结合图1a和1b描述的方法步骤作为第一方法步骤。随后的步骤在图5a至5d中示出。这些步骤基本上类似于在图1c至1f中示出的第一实施例的步骤来实施。不同之处在于,在当前情况中支承体层2以两阶段的方式构建。支承体层2具有基本层2b和粘附层2a。
粘附层2a由粘合剂膜形成,该粘合剂膜例如包含粘性的硅树脂材料。粘附层2a设置在例如包含聚酰亚胺的基本层2b上。替代地,粘附层2a可以由热熔粘合剂形成,其中粘附层2a首先被熔化,并且在其粘附在层复合结构6上之前被硬化。
在本申请中所描述的半导体器件在其它意义中也可以称为“半导体芯片”。为了清楚的原因,在此选择了较中性的名称“半导体器件”,以避免与包含半导体材料的层复合结构、即譬如外延的半导体层堆叠混淆。名称“半导体器件”特别对应于德国专利申请102005037023.3和102005055293.5的名称“半导体芯片”,本申请要求了其优先权。
本发明并非通过借助实施例对本发明的描述而局限于此。更确切地说,本发明包括任意新的特征以及这些特征的任意组合,特别是包含权利要求中的特征的任意组合,即使这些特征或者组合本身没有明确地在权利要求中或者实施例中被明确说明。
Claims (48)
1.一种用于制造半导体器件(8)的方法,具有以下步骤:
-在生长衬底(1)上构建包含半导体材料的层复合结构(6),
-将柔性的支承体层(2)施加到所述层复合结构(6)上,
-将柔性的层硬化为自支承的支承体层(2),
-将生长衬底(1)剥离,
-将作为薄片的柔性的覆盖层(11)施加到层复合结构(6)的背离支承体层(2)的侧上,其中支承体层(2)和覆盖层(11)保留在完成的半导体器件中。
2.一种用于制造半导体器件(8)的方法,具有以下步骤:
-在生长衬底(1)上构建包含半导体材料的层复合结构(6),
-将自支承的支承体层(2)施加到所述层复合结构(6)上,其中支承体层(2)具有基本层(2b)和朝着层复合结构(6)的粘附层(2a),该粘附层粘附在层复合结构(6)上,
-将生长衬底(1)剥离,
-将作为薄片的柔性的覆盖层(11)施加到层复合结构(6)的背离支承体层(2)的侧上,其中支承体层(2)和覆盖层(11)保留在完成的半导体器件中。
3.根据权利要求2所述的方法,其中粘附层(2a)由热熔粘合剂形成。
4.根据权利要求2或3所述的方法,其中基本层(2b)由塑料材料形成。
5.根据权利要求1或2所述的方法,其中支承体层(2)是薄片。
6.根据权利要求1或2所述的方法,其中支承体层(2)是透明的。
7.根据权利要求1或2所述的方法,其中半导体器件(8)是薄膜半导体器件。
8.根据权利要求1或2所述的方法,其中层复合结构(6)具有有源的层序列(4),用于产生电磁辐射。
9.根据权利要求1或2所述的方法,其中层复合结构(6)结构化为单个的层堆叠(60)。
10.根据权利要求1所述的方法,其中支承体层(2)包含塑料材料。
11.根据权利要求10所述的方法,其中塑料材料包含环氧树脂、聚对苯二甲酸乙二酯和/或聚合物。
12.根据权利要求10或11所述的方法,其中塑料材料具有在150℃范围中的硬化温度。
13.根据权利要求1或2所述的方法,其中支承体层(2)具有小于或等于100μm的厚度。
14.根据权利要求1或2所述的方法,其中支承体层(2)包含导热的材料。
15.根据权利要求1或2所述的方法,其中支承体层(2)包含电绝缘的材料。
16.根据权利要求2所述的方法,其中支承体层(2)具有至少一个电印制导线(10a)。
17.根据权利要求1或2所述的方法,其中支承体层(2)具有导电的材料。
18.根据权利要求1或2所述的方法,其中层复合结构(6)在朝着支承体层(2)的侧具有第一接触金属化物(50)。
19.根据权利要求18所述的方法,其中接触金属化物(50)将有源层序列(4)所产生的辐射至少部分地反射。
20.根据权利要求1或2所述的方法,其中生长衬底(1)借助激光剥离方法被剥离。
21.根据权利要求1或2所述的方法,其中在剥离生长衬底(1)之后层复合结构(6)设置有第二接触金属化物(3)。
22.根据权利要求21所述的方法,其中将覆盖层(11)施加到第二接触金属化物(3)上。
23.根据权利要求1或2所述的方法,其中柔性的覆盖层(11)被部分地或者完全地硬化。
24.一种薄膜半导体器件(8),具有
-层堆叠(60),
-设置在层堆叠(60)上的自支承的支承体层(2),其中支承体层(2)被硬化,
-覆盖层(11),其是薄片并且设置在层堆叠(60)的背离支承体层(2)的侧上。
25.一种薄膜半导体器件(8),具有
-层堆叠(60),
-设置在层堆叠(60)上的自支承的支承体层(2),其中支承体层(2)具有基本层(2b)和朝着层堆叠(60)的粘附层(2a),所述粘附层(2a)粘附在层堆叠(60)上,
-覆盖层(11),其是薄片并且设置在层堆叠(60)的背离支承体层(2)的侧上。
26.根据权利要求25所述的薄膜半导体器件(8),其中粘附层(2a)由热熔粘合剂形成。
27.根据权利要求25或26所述的薄膜半导体器件(8),其中基本层(2b)由塑料材料形成。
28.根据权利要求24或25所述的薄膜半导体器件(8),其中支承体层(2)是薄片。
29.根据权利要求24或25所述的薄膜半导体器件(8),其中支承体层(2)是透明的。
30.根据权利要求24或25所述的薄膜半导体器件(8),其中层堆叠(60)具有有源的层堆叠(40),用于产生电磁辐射。
31.根据权利要求24所述的薄膜半导体器件(8),其中支承体层(2)包含塑料材料。
32.根据权利要求31所述的薄膜半导体器件(8),其中支承体层包含环氧树脂、聚对苯二甲酸乙二酯和/或聚酰亚胺。
33.根据权利要求24或25所述的薄膜半导体器件(8),其中支承体层(2)包含电绝缘的材料。
34.根据权利要求25所述的薄膜半导体器件(8),其中支承体层(2)具有至少一个电印制导线(10a)。
35.根据权利要求24或25所述的薄膜半导体器件(8),其中支承体层(2)包含导电的材料。
36.根据权利要求35所述的薄膜半导体器件(8),其中支承体层(2)含有金属或者合金。
37.根据权利要求36所述的薄膜半导体器件(8),其中金属是铝、银、钛或者铜。
38.根据权利要求36所述的薄膜半导体器件(8),其中合金是黄铜。
39.根据权利要求35所述的薄膜半导体器件(8),其中支承体层(2)包含碳纤维。
40.根据权利要求24或25所述的薄膜半导体器件(8),其中支承体层(2)包含硅酸盐。
41.根据权利要求24或25所述的薄膜半导体器件(8),其中支承体层(2)具有小于或等于100μm的厚度。
42.根据权利要求24或25所述的薄膜半导体器件(8),其中覆盖层(11)是自支承的。
43.根据权利要求24或25所述的薄膜半导体器件(8),其中覆盖层(11)具有光学结构。
44.根据权利要求24或25所述的薄膜半导体器件(8),其中覆盖层(11)包含转换材料。
45.根据权利要求24或25所述的薄膜半导体器件(8),其中在支承体层(2)和覆盖层(11)之间设置了填充层(17)。
46.根据权利要求30所述的薄膜半导体器件(8),其中支承体层(2)和覆盖层(11)形成用于发射辐射的半导体器件(8)的壳体。
47.根据权利要求30所述的薄膜半导体器件(8),其中覆盖层(11)对于有源的层堆叠(40)产生的辐射是可穿透的。
48.根据权利要求47所述的薄膜半导体器件(8),其中薄膜半导体器件(8)双侧地发射。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005037023 | 2005-08-05 | ||
DE102005037023.3 | 2005-08-05 | ||
DE102005055293A DE102005055293A1 (de) | 2005-08-05 | 2005-11-21 | Verfahren zur Herstellung von Halbleiterchips und Dünnfilm-Halbleiterchip |
DE102005055293.5 | 2005-11-21 | ||
PCT/DE2006/001367 WO2007016908A1 (de) | 2005-08-05 | 2006-08-04 | Verfahren zur herstellung von halbleiterbauelementen und dünnfilm-halbleiterbauelement |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101238593A CN101238593A (zh) | 2008-08-06 |
CN101238593B true CN101238593B (zh) | 2010-05-26 |
Family
ID=37135458
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006800287081A Active CN101238593B (zh) | 2005-08-05 | 2006-08-04 | 用于制造半导体器件的方法和薄膜半导体器件 |
Country Status (8)
Country | Link |
---|---|
US (1) | US8058147B2 (zh) |
EP (1) | EP1911104B1 (zh) |
JP (1) | JP5361381B2 (zh) |
KR (1) | KR101330455B1 (zh) |
CN (1) | CN101238593B (zh) |
DE (1) | DE102005055293A1 (zh) |
TW (1) | TWI319591B (zh) |
WO (1) | WO2007016908A1 (zh) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005055293A1 (de) | 2005-08-05 | 2007-02-15 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von Halbleiterchips und Dünnfilm-Halbleiterchip |
DE102007004301A1 (de) * | 2006-08-04 | 2008-02-07 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements und Dünnfilm-Halbleiterbauelement |
DE102007004303A1 (de) * | 2006-08-04 | 2008-02-07 | Osram Opto Semiconductors Gmbh | Dünnfilm-Halbleiterbauelement und Bauelement-Verbund |
DE102007004304A1 (de) | 2007-01-29 | 2008-07-31 | Osram Opto Semiconductors Gmbh | Dünnfilm-Leuchtdioden-Chip und Verfahren zur Herstellung eines Dünnfilm-Leuchtdioden-Chips |
DE102007017113A1 (de) | 2007-01-31 | 2008-08-07 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement mit einer optisch aktiven Schicht, Anordnung mit einer Vielzahl von optisch aktiven Schichten und Verfahren zur Herstellung eines Halbleiterbauelements |
DE102007010755A1 (de) | 2007-03-06 | 2008-10-30 | Osram Opto Semiconductors Gmbh | Anordnung mit einem Halbleiterchip und einer Lichtleiterschicht |
DE102007030129A1 (de) | 2007-06-29 | 2009-01-02 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung einer Mehrzahl optoelektronischer Bauelemente und optoelektronisches Bauelement |
DE102007041896A1 (de) | 2007-09-04 | 2009-03-05 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements |
DE102007053286A1 (de) * | 2007-09-20 | 2009-04-02 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines optoelektronischen Bauelements |
DE102007051168A1 (de) * | 2007-09-26 | 2009-04-02 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines LED-Moduls und Modul |
DE102008005935A1 (de) | 2007-11-29 | 2009-06-04 | Osram Opto Semiconductors Gmbh | Halbleiteranordnung sowie Verfahren zur Herstellung einer Halbleiteranordnung |
DE102008008599A1 (de) * | 2007-12-20 | 2009-06-25 | Osram Opto Semiconductors Gmbh | Halbleiteranordnung, insbesondere Leuchtdiodenanordnung und Leuchtmittelanordnung |
DE102008019612A1 (de) * | 2008-04-18 | 2009-10-22 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauteil |
DE102008025693A1 (de) | 2008-05-29 | 2009-12-03 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement |
WO2010016206A1 (ja) | 2008-08-04 | 2010-02-11 | パナソニック株式会社 | フレキシブル半導体装置の製造方法 |
KR100969131B1 (ko) * | 2010-03-05 | 2010-07-07 | 엘지이노텍 주식회사 | 발광 소자 제조방법 |
KR101011757B1 (ko) * | 2010-04-09 | 2011-02-07 | 엘지이노텍 주식회사 | 발광 소자, 발광 소자의 제조방법 및 발광 소자 패키지 |
KR101028277B1 (ko) * | 2010-05-25 | 2011-04-11 | 엘지이노텍 주식회사 | 발광 소자, 발광 소자 제조방법, 발광 소자 패키지 및 라이트 유닛 |
DE102010054068A1 (de) * | 2010-12-10 | 2012-06-14 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines optoelektronischen Bauelements und Bauelement |
JP2012191019A (ja) * | 2011-03-10 | 2012-10-04 | Shin Etsu Chem Co Ltd | 光半導体装置用接着剤シートの製造方法及び光半導体装置用接着剤シート |
DE102013210668A1 (de) * | 2013-06-07 | 2014-12-11 | Würth Elektronik GmbH & Co. KG | Verfahren zur Herstellung eines optischen Moduls |
KR20160032236A (ko) * | 2013-07-19 | 2016-03-23 | 코닌클리케 필립스 엔.브이. | 광학 요소를 가지며 기판 캐리어를 갖지 않는 pc led |
DE102017112223A1 (de) * | 2017-06-02 | 2018-12-06 | Osram Opto Semiconductors Gmbh | Halbleiterlaser-Bauteil und Verfahren zur Herstellung eines Halbleiterlaser-Bauteils |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1271182A (zh) * | 1999-04-15 | 2000-10-25 | 住友电气工业株式会社 | 半导体发光器件及其制造方法和制造透明导体膜的方法 |
EP1351308A1 (en) * | 1996-08-27 | 2003-10-08 | Seiko Epson Corporation | Exfoliating method, transferring method of thin film device, and thin film device, thin film integrated circuit device, and liquid crystal display device produced by the same |
US20050148106A1 (en) * | 2000-12-14 | 2005-07-07 | Toshiaki Iwafuchi | Method of transferring a device, a method of producing a device holding substrate, and a device holding substrate |
Family Cites Families (76)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE8711105U1 (de) | 1987-08-14 | 1987-11-26 | Siemens AG, 1000 Berlin und 8000 München | Leiterplatte für die Elektronik |
JP2953468B2 (ja) | 1989-06-21 | 1999-09-27 | 三菱化学株式会社 | 化合物半導体装置及びその表面処理加工方法 |
JPH0992878A (ja) | 1995-09-25 | 1997-04-04 | Shin Etsu Handotai Co Ltd | 半導体発光素子及びその製造方法 |
US5779924A (en) | 1996-03-22 | 1998-07-14 | Hewlett-Packard Company | Ordered interface texturing for a light emitting device |
DE19640594B4 (de) * | 1996-10-01 | 2016-08-04 | Osram Gmbh | Bauelement |
JP4032443B2 (ja) | 1996-10-09 | 2008-01-16 | セイコーエプソン株式会社 | 薄膜トランジスタ、回路、アクティブマトリクス基板、液晶表示装置 |
US5833073A (en) | 1997-06-02 | 1998-11-10 | Fluoroware, Inc. | Tacky film frame for electronic device |
US6071795A (en) | 1998-01-23 | 2000-06-06 | The Regents Of The University Of California | Separation of thin films from transparent substrates by selective optical processing |
JP2000049382A (ja) | 1998-07-27 | 2000-02-18 | Matsushita Electron Corp | 半導体発光装置及びその製造方法 |
US7253445B2 (en) | 1998-07-28 | 2007-08-07 | Paul Heremans | High-efficiency radiating device |
US6504180B1 (en) | 1998-07-28 | 2003-01-07 | Imec Vzw And Vrije Universiteit | Method of manufacturing surface textured high-efficiency radiating devices and devices obtained therefrom |
EP0977277A1 (en) | 1998-07-28 | 2000-02-02 | Interuniversitair Microelektronica Centrum Vzw | Devices for emitting radiation with a high efficiency and a method for fabricating such devices |
JP2001168344A (ja) | 1999-12-13 | 2001-06-22 | Sony Corp | 薄膜トランジスタ及びその製造方法と加熱装置並びに表示装置 |
DE10017336C2 (de) | 2000-04-07 | 2002-05-16 | Vishay Semiconductor Gmbh | verfahren zur Herstellung von strahlungsemittierenden Halbleiter-Wafern |
DE10051465A1 (de) | 2000-10-17 | 2002-05-02 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements auf GaN-Basis |
JP2003532298A (ja) | 2000-04-26 | 2003-10-28 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | 発光半導体素子 |
DE10020464A1 (de) | 2000-04-26 | 2001-11-08 | Osram Opto Semiconductors Gmbh | Strahlungsemittierendes Halbleiterbauelement auf GaN-Basis |
TWI292227B (en) | 2000-05-26 | 2008-01-01 | Osram Opto Semiconductors Gmbh | Light-emitting-dioed-chip with a light-emitting-epitaxy-layer-series based on gan |
WO2002009192A1 (en) | 2000-07-24 | 2002-01-31 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device, liquid crystal display device, el display device, semiconductor film producing method, and semiconductor device producing method |
DE10040448A1 (de) | 2000-08-18 | 2002-03-07 | Osram Opto Semiconductors Gmbh | Halbleiterchip und Verfahren zu dessen Herstellung |
DE10041328B4 (de) | 2000-08-23 | 2018-04-05 | Osram Opto Semiconductors Gmbh | Verpackungseinheit für Halbleiterchips |
US6562648B1 (en) * | 2000-08-23 | 2003-05-13 | Xerox Corporation | Structure and method for separation and transfer of semiconductor thin films onto dissimilar substrate materials |
US6614103B1 (en) | 2000-09-01 | 2003-09-02 | General Electric Company | Plastic packaging of LED arrays |
DE10051159C2 (de) | 2000-10-16 | 2002-09-19 | Osram Opto Semiconductors Gmbh | LED-Modul, z.B. Weißlichtquelle |
TW567619B (en) | 2001-08-09 | 2003-12-21 | Matsushita Electric Ind Co Ltd | LED lighting apparatus and card-type LED light source |
DE20220258U1 (de) | 2002-09-20 | 2004-02-19 | Osram Opto Semiconductors Gmbh | Halbleiterchip |
DE10303977A1 (de) * | 2002-01-31 | 2003-11-27 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements |
TWI226139B (en) | 2002-01-31 | 2005-01-01 | Osram Opto Semiconductors Gmbh | Method to manufacture a semiconductor-component |
JP2004047975A (ja) * | 2002-05-17 | 2004-02-12 | Semiconductor Energy Lab Co Ltd | 積層体の転写方法及び半導体装置の作製方法 |
EP1536487A4 (en) | 2002-05-28 | 2008-02-06 | Matsushita Electric Works Ltd | LIGHT EMISSION ELEMENT, LIGHT EMITTING DEVICE AND THIS USE SURFACE EMISSION LIGHTING DEVICE |
JP2003347524A (ja) * | 2002-05-28 | 2003-12-05 | Sony Corp | 素子の転写方法、素子の配列方法及び画像表示装置の製造方法 |
JP2004047691A (ja) * | 2002-07-11 | 2004-02-12 | Seiko Epson Corp | 半導体装置の製造方法、電気光学装置、及び電子機器 |
DE10234978A1 (de) | 2002-07-31 | 2004-02-12 | Osram Opto Semiconductors Gmbh | Oberflächenmontierbares Halbleiterbauelement und Verfahren zu dessen Herstellung |
WO2004017407A1 (de) | 2002-07-31 | 2004-02-26 | Osram Opto Semiconductors Gmbh | Oberflächenmontierbares halbleiterbauelement und verfahren zu dessen herstellung |
US7078737B2 (en) | 2002-09-02 | 2006-07-18 | Matsushita Electric Industrial Co., Ltd. | Light-emitting device |
TWI313062B (en) * | 2002-09-13 | 2009-08-01 | Ind Tech Res Inst | Method for producing active plastic panel displayers |
DE10245628A1 (de) | 2002-09-30 | 2004-04-15 | Osram Opto Semiconductors Gmbh | Elektromagnetische Strahlung emittierender Halbleiterchip und Verfahren zu dessen Herstellung |
DE10245631B4 (de) * | 2002-09-30 | 2022-01-20 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Halbleiterbauelement |
US20040068572A1 (en) | 2002-10-04 | 2004-04-08 | Zhixue Wu | Methods and systems for communicating over a client-server network |
JP4097510B2 (ja) | 2002-11-20 | 2008-06-11 | 株式会社沖データ | 半導体装置の製造方法 |
JP4472314B2 (ja) * | 2002-11-22 | 2010-06-02 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法、表示装置の作製方法、および発光装置の作製方法 |
EP2894678A1 (de) | 2003-01-31 | 2015-07-15 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements |
US6786390B2 (en) | 2003-02-04 | 2004-09-07 | United Epitaxy Company Ltd. | LED stack manufacturing method and its structure thereof |
US6903381B2 (en) * | 2003-04-24 | 2005-06-07 | Opto Tech Corporation | Light-emitting diode with cavity containing a filler |
TWI330413B (en) | 2005-01-25 | 2010-09-11 | Epistar Corp | A light-emitting device |
US20050033638A1 (en) | 2003-08-08 | 2005-02-10 | Toni-Diane Donnet | System and method for advertising compliance |
DE10339985B4 (de) * | 2003-08-29 | 2008-12-04 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement mit einer transparenten Kontaktschicht und Verfahren zu dessen Herstellung |
DE10353679A1 (de) | 2003-11-17 | 2005-06-02 | Siemens Ag | Kostengünstige, miniaturisierte Aufbau- und Verbindungstechnik für LEDs und andere optoelektronische Module |
US7341882B2 (en) * | 2003-11-18 | 2008-03-11 | Uni Light Technology Inc. | Method for forming an opto-electronic device |
JP4496774B2 (ja) | 2003-12-22 | 2010-07-07 | 日亜化学工業株式会社 | 半導体装置の製造方法 |
JP4368225B2 (ja) | 2004-03-10 | 2009-11-18 | 三洋電機株式会社 | 窒化物系半導体発光素子の製造方法 |
KR100880812B1 (ko) | 2004-03-29 | 2009-01-30 | 아티큘레이티드 테크놀러지스 엘엘씨 | 롤-투-롤 제조된 광 시트 및 캡슐화된 반도체 회로디바이스들 |
US7427782B2 (en) | 2004-03-29 | 2008-09-23 | Articulated Technologies, Llc | Roll-to-roll fabricated light sheet and encapsulated semiconductor circuit devices |
EP1735149A2 (de) | 2004-04-16 | 2006-12-27 | Lucea AG | Lichtemittierendes paneel und optisch wirksame folie |
US6956246B1 (en) | 2004-06-03 | 2005-10-18 | Lumileds Lighting U.S., Llc | Resonant cavity III-nitride light emitting devices fabricated by growth substrate removal |
US7781789B2 (en) | 2006-11-15 | 2010-08-24 | The Regents Of The University Of California | Transparent mirrorless light emitting diode |
US20050274971A1 (en) | 2004-06-10 | 2005-12-15 | Pai-Hsiang Wang | Light emitting diode and method of making the same |
DE102005013894B4 (de) | 2004-06-30 | 2010-06-17 | Osram Opto Semiconductors Gmbh | Elektromagnetische Strahlung erzeugender Halbleiterchip und Verfahren zu dessen Herstellung |
DE102004036962A1 (de) | 2004-07-30 | 2006-03-23 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von Halbleiterchips in Dünnfilmtechnik und Halbleiterchip in Dünnfilmtechnik |
EP1774599B1 (de) | 2004-07-30 | 2015-11-04 | OSRAM Opto Semiconductors GmbH | Verfahren zur herstellung von halbleiterchips in dünnfilmtechnik und halbleiterchip in dünnfilmtechnik |
KR100616600B1 (ko) | 2004-08-24 | 2006-08-28 | 삼성전기주식회사 | 수직구조 질화물 반도체 발광소자 |
JP4254669B2 (ja) | 2004-09-07 | 2009-04-15 | 豊田合成株式会社 | 発光装置 |
US7476910B2 (en) | 2004-09-10 | 2009-01-13 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device and method for manufacturing the same |
DE102004050371A1 (de) | 2004-09-30 | 2006-04-13 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement mit einer drahtlosen Kontaktierung |
US7256483B2 (en) | 2004-10-28 | 2007-08-14 | Philips Lumileds Lighting Company, Llc | Package-integrated thin film LED |
JP4906256B2 (ja) | 2004-11-10 | 2012-03-28 | 株式会社沖データ | 半導体複合装置の製造方法 |
JP2006147787A (ja) | 2004-11-18 | 2006-06-08 | Sony Corp | 発光素子及びその製造方法 |
KR100638666B1 (ko) | 2005-01-03 | 2006-10-30 | 삼성전기주식회사 | 질화물 반도체 발광소자 |
JP5328159B2 (ja) | 2005-03-01 | 2013-10-30 | セルカコア・ラボラトリーズ・インコーポレーテッド | 多波長センサ発光体 |
US8622578B2 (en) | 2005-03-30 | 2014-01-07 | Koninklijke Philips N.V. | Flexible LED array |
US20060237735A1 (en) | 2005-04-22 | 2006-10-26 | Jean-Yves Naulin | High-efficiency light extraction structures and methods for solid-state lighting |
KR100599012B1 (ko) | 2005-06-29 | 2006-07-12 | 서울옵토디바이스주식회사 | 열전도성 기판을 갖는 발광 다이오드 및 그것을 제조하는방법 |
DE102005055293A1 (de) | 2005-08-05 | 2007-02-15 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von Halbleiterchips und Dünnfilm-Halbleiterchip |
DE102007004301A1 (de) | 2006-08-04 | 2008-02-07 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements und Dünnfilm-Halbleiterbauelement |
DE102007004303A1 (de) | 2006-08-04 | 2008-02-07 | Osram Opto Semiconductors Gmbh | Dünnfilm-Halbleiterbauelement und Bauelement-Verbund |
DE102007004304A1 (de) | 2007-01-29 | 2008-07-31 | Osram Opto Semiconductors Gmbh | Dünnfilm-Leuchtdioden-Chip und Verfahren zur Herstellung eines Dünnfilm-Leuchtdioden-Chips |
-
2005
- 2005-11-21 DE DE102005055293A patent/DE102005055293A1/de not_active Withdrawn
-
2006
- 2006-08-04 JP JP2008524355A patent/JP5361381B2/ja active Active
- 2006-08-04 TW TW095128566A patent/TWI319591B/zh active
- 2006-08-04 EP EP06775806.0A patent/EP1911104B1/de active Active
- 2006-08-04 US US11/990,099 patent/US8058147B2/en active Active
- 2006-08-04 KR KR1020087005494A patent/KR101330455B1/ko active IP Right Grant
- 2006-08-04 CN CN2006800287081A patent/CN101238593B/zh active Active
- 2006-08-04 WO PCT/DE2006/001367 patent/WO2007016908A1/de active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1351308A1 (en) * | 1996-08-27 | 2003-10-08 | Seiko Epson Corporation | Exfoliating method, transferring method of thin film device, and thin film device, thin film integrated circuit device, and liquid crystal display device produced by the same |
CN1271182A (zh) * | 1999-04-15 | 2000-10-25 | 住友电气工业株式会社 | 半导体发光器件及其制造方法和制造透明导体膜的方法 |
US20050148106A1 (en) * | 2000-12-14 | 2005-07-07 | Toshiaki Iwafuchi | Method of transferring a device, a method of producing a device holding substrate, and a device holding substrate |
Also Published As
Publication number | Publication date |
---|---|
WO2007016908A1 (de) | 2007-02-15 |
DE102005055293A1 (de) | 2007-02-15 |
TW200746231A (en) | 2007-12-16 |
KR101330455B1 (ko) | 2013-11-15 |
US20100133564A1 (en) | 2010-06-03 |
TWI319591B (en) | 2010-01-11 |
CN101238593A (zh) | 2008-08-06 |
US8058147B2 (en) | 2011-11-15 |
EP1911104B1 (de) | 2019-05-15 |
KR20080035679A (ko) | 2008-04-23 |
EP1911104A1 (de) | 2008-04-16 |
JP2009503878A (ja) | 2009-01-29 |
JP5361381B2 (ja) | 2013-12-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101238593B (zh) | 用于制造半导体器件的方法和薄膜半导体器件 | |
US8872330B2 (en) | Thin-film semiconductor component and component assembly | |
EP1496551B1 (en) | Light emitting diode, method of manufacturing the same and lighting equipment incorporating the same | |
CN101517757B (zh) | Led半导体及led半导体的应用 | |
KR101921345B1 (ko) | 광원을 포함하는 절연 유리(ig)또는 진공 절연 유리(vig)유닛, 및/또는 그 제조방법 | |
KR101704036B1 (ko) | GaN LED 및 그 형성 방법 | |
CN101218687B (zh) | 发光二极管及其制造方法 | |
CN101855733B (zh) | 发光器件及其制造方法 | |
JP5538416B2 (ja) | 光放出素子及び該素子の製造方法 | |
TWI343662B (en) | Radiation-emitting semiconductor body with carrier substrate and the method for fabricating the same | |
CN103081137B (zh) | 发光二极管芯片 | |
CN103339749A (zh) | 晶片级发光二极管封装件及制造此的方法 | |
KR20100074100A (ko) | 광전 반도체칩,광전 소자,및 광전 소자의 제조 방법 | |
CN101305477A (zh) | 具有氧化铟锡层的发光二极管及其制造方法 | |
CN103840040A (zh) | 半导体发光器件及其制造方法 | |
CN101273468B (zh) | 具有电流扩展层的光电子半导体器件及其制造方法 | |
CN105374915A (zh) | 高功率发光装置 | |
KR20110000730A (ko) | 표면 실장 led 모듈 및 표면 실장 led 모듈의 제조 방법 | |
CN104205374A (zh) | 具有波长转换侧面涂层的发光器件 | |
US7196348B2 (en) | GaN system semiconductor light emitting device excellent in light emission efficiency and light extracting efficiency | |
CN105702832A (zh) | 用于发光器件的载体 | |
US7705709B2 (en) | Varistor and light-emitting apparatus | |
CN101807557A (zh) | 用于接纳至少一个元件的衬底及制造衬底的方法 | |
CN102237348B (zh) | Led微阵列封装结构及其制造方法 | |
CN101179103A (zh) | 发光芯片封装体及其制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |