JP5301177B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5301177B2
JP5301177B2 JP2008059730A JP2008059730A JP5301177B2 JP 5301177 B2 JP5301177 B2 JP 5301177B2 JP 2008059730 A JP2008059730 A JP 2008059730A JP 2008059730 A JP2008059730 A JP 2008059730A JP 5301177 B2 JP5301177 B2 JP 5301177B2
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JP
Japan
Prior art keywords
film
insulating film
region
memory
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008059730A
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English (en)
Japanese (ja)
Other versions
JP2008263181A (ja
JP2008263181A5 (enExample
Inventor
健吾 秋元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2008059730A priority Critical patent/JP5301177B2/ja
Publication of JP2008263181A publication Critical patent/JP2008263181A/ja
Publication of JP2008263181A5 publication Critical patent/JP2008263181A5/ja
Application granted granted Critical
Publication of JP5301177B2 publication Critical patent/JP5301177B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • H10D30/683Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP2008059730A 2007-03-19 2008-03-10 半導体装置 Expired - Fee Related JP5301177B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008059730A JP5301177B2 (ja) 2007-03-19 2008-03-10 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007070421 2007-03-19
JP2007070421 2007-03-19
JP2008059730A JP5301177B2 (ja) 2007-03-19 2008-03-10 半導体装置

Publications (3)

Publication Number Publication Date
JP2008263181A JP2008263181A (ja) 2008-10-30
JP2008263181A5 JP2008263181A5 (enExample) 2011-03-24
JP5301177B2 true JP5301177B2 (ja) 2013-09-25

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008059730A Expired - Fee Related JP5301177B2 (ja) 2007-03-19 2008-03-10 半導体装置

Country Status (3)

Country Link
US (3) US7791172B2 (enExample)
JP (1) JP5301177B2 (enExample)
KR (1) KR101467389B1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101453829B1 (ko) * 2007-03-23 2014-10-22 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치 및 그 제조 방법
KR101520284B1 (ko) * 2007-06-25 2015-05-14 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치
JP2010060262A (ja) * 2008-08-04 2010-03-18 Sanden Corp 冷凍回路用樹脂材料
JP5835771B2 (ja) * 2011-10-21 2015-12-24 国立大学法人北海道大学 論理回路
SG10201803464XA (en) 2017-06-12 2019-01-30 Samsung Electronics Co Ltd Semiconductor memory device and method of manufacturing the same
JP6563988B2 (ja) * 2017-08-24 2019-08-21 ウィンボンド エレクトロニクス コーポレーション 不揮発性半導体記憶装置
JP6623247B2 (ja) * 2018-04-09 2019-12-18 ウィンボンド エレクトロニクス コーポレーション フラッシュメモリおよびその製造方法

Family Cites Families (25)

* Cited by examiner, † Cited by third party
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US1997132A (en) 1930-11-14 1935-04-09 Collorio Felix Packing core for earth dams
US3878549A (en) * 1970-10-27 1975-04-15 Shumpei Yamazaki Semiconductor memories
JPH07114184B2 (ja) * 1987-07-27 1995-12-06 日本電信電話株式会社 薄膜形シリコン半導体装置およびその製造方法
US5248630A (en) * 1987-07-27 1993-09-28 Nippon Telegraph And Telephone Corporation Thin film silicon semiconductor device and process for producing thereof
JPH0613627A (ja) * 1991-10-08 1994-01-21 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP3186708B2 (ja) * 1997-09-11 2001-07-11 日本電気株式会社 半導体装置の製造方法
KR100316707B1 (ko) * 1999-02-05 2001-12-28 윤종용 모스 트랜지스터 및 그 제조방법
JP4666783B2 (ja) * 2000-02-01 2011-04-06 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5068402B2 (ja) * 2000-12-28 2012-11-07 公益財団法人国際科学振興財団 誘電体膜およびその形成方法、半導体装置、不揮発性半導体メモリ装置、および半導体装置の製造方法
US6858480B2 (en) * 2001-01-18 2005-02-22 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
JP4071005B2 (ja) * 2001-01-29 2008-04-02 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7115453B2 (en) * 2001-01-29 2006-10-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method of the same
JP4993810B2 (ja) * 2001-02-16 2012-08-08 株式会社半導体エネルギー研究所 半導体装置の作製方法
TW541584B (en) * 2001-06-01 2003-07-11 Semiconductor Energy Lab Semiconductor film, semiconductor device and method for manufacturing same
CN1306599C (zh) * 2002-03-26 2007-03-21 松下电器产业株式会社 半导体装置及其制造方法
JP4360798B2 (ja) * 2002-11-28 2009-11-11 シャープ株式会社 半導体膜およびその製造方法、ならびに半導体装置、その製造方法および半導体製造装置
JP4942950B2 (ja) 2004-05-28 2012-05-30 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7504663B2 (en) * 2004-05-28 2009-03-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device with a floating gate electrode that includes a plurality of particles
JP4657016B2 (ja) 2004-06-14 2011-03-23 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7335556B2 (en) * 2004-06-14 2008-02-26 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
KR100642898B1 (ko) * 2004-07-21 2006-11-03 에스티마이크로일렉트로닉스 엔.브이. 반도체 장치의 트랜지스터 및 그 제조방법
US20060118869A1 (en) * 2004-12-03 2006-06-08 Je-Hsiung Lan Thin-film transistors and processes for forming the same
KR100699830B1 (ko) * 2004-12-16 2007-03-27 삼성전자주식회사 이레이즈 효율을 개선하는 비휘발성 메모리 소자 및 제조방법
KR100609587B1 (ko) * 2004-12-30 2006-08-08 매그나칩 반도체 유한회사 비휘발성 메모리 장치의 제조방법
US7968932B2 (en) * 2005-12-26 2011-06-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
US20120043549A1 (en) 2012-02-23
KR101467389B1 (ko) 2014-12-01
US20080230825A1 (en) 2008-09-25
US7791172B2 (en) 2010-09-07
JP2008263181A (ja) 2008-10-30
US8395201B2 (en) 2013-03-12
KR20080085698A (ko) 2008-09-24
US8072017B2 (en) 2011-12-06
US20100314624A1 (en) 2010-12-16

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