JP5297083B2 - はんだバンプ形成方法 - Google Patents

はんだバンプ形成方法 Download PDF

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Publication number
JP5297083B2
JP5297083B2 JP2008125761A JP2008125761A JP5297083B2 JP 5297083 B2 JP5297083 B2 JP 5297083B2 JP 2008125761 A JP2008125761 A JP 2008125761A JP 2008125761 A JP2008125761 A JP 2008125761A JP 5297083 B2 JP5297083 B2 JP 5297083B2
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JP
Japan
Prior art keywords
pads
metal film
film
solder bump
conductive ball
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2008125761A
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English (en)
Japanese (ja)
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JP2009044128A (ja
JP2009044128A5 (https=
Inventor
桂 今藤
昌夫 中沢
昌樹 真田
祥子 織田
正司 小平
欣司 永田
勝 山崎
建次郎 榎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2008125761A priority Critical patent/JP5297083B2/ja
Priority to US12/173,985 priority patent/US7807560B2/en
Priority to KR1020080068999A priority patent/KR20090008146A/ko
Priority to TW097127081A priority patent/TWI427720B/zh
Publication of JP2009044128A publication Critical patent/JP2009044128A/ja
Publication of JP2009044128A5 publication Critical patent/JP2009044128A5/ja
Application granted granted Critical
Publication of JP5297083B2 publication Critical patent/JP5297083B2/ja
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Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP2008125761A 2007-07-17 2008-05-13 はんだバンプ形成方法 Active JP5297083B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2008125761A JP5297083B2 (ja) 2007-07-17 2008-05-13 はんだバンプ形成方法
US12/173,985 US7807560B2 (en) 2007-07-17 2008-07-16 Solder bump forming method
KR1020080068999A KR20090008146A (ko) 2007-07-17 2008-07-16 솔더 범프 형성 방법
TW097127081A TWI427720B (zh) 2007-07-17 2008-07-17 焊料凸塊形成方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007186020 2007-07-17
JP2007186020 2007-07-17
JP2008125761A JP5297083B2 (ja) 2007-07-17 2008-05-13 はんだバンプ形成方法

Publications (3)

Publication Number Publication Date
JP2009044128A JP2009044128A (ja) 2009-02-26
JP2009044128A5 JP2009044128A5 (https=) 2011-03-24
JP5297083B2 true JP5297083B2 (ja) 2013-09-25

Family

ID=40269039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008125761A Active JP5297083B2 (ja) 2007-07-17 2008-05-13 はんだバンプ形成方法

Country Status (4)

Country Link
JP (1) JP5297083B2 (https=)
KR (1) KR20090008146A (https=)
CN (1) CN101350323A (https=)
TW (1) TWI427720B (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101122140B1 (ko) 2010-05-11 2012-03-16 엘지이노텍 주식회사 단일층 인쇄회로기판 및 그 제조방법
TW201233280A (en) * 2011-01-25 2012-08-01 Taiwan Uyemura Co Ltd Chemical palladium-gold plating film method
TW201233279A (en) * 2011-01-25 2012-08-01 Taiwan Uyemura Co Ltd Copper or palladium-copper wire package process and structure thereof
TWI464929B (zh) * 2011-03-16 2014-12-11 Lextar Electronics Corp 提昇散熱效率之光源模組及其嵌入式封裝結構
TWI555452B (zh) * 2014-08-12 2016-10-21 南亞電路板股份有限公司 電路板及其製造方法
CN108513433A (zh) * 2018-04-24 2018-09-07 苏州维信电子有限公司 一种隔锡的柔性线路板pad及其制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3838672B2 (ja) * 1993-06-07 2006-10-25 昭和電工株式会社 はんだ回路基板の形成方法
JPH11121495A (ja) * 1997-10-16 1999-04-30 Ricoh Co Ltd 半導体装置製造方法
WO1999034654A1 (en) * 1997-12-29 1999-07-08 Ibiden Co., Ltd. Multilayer printed wiring board
JP2001267731A (ja) * 2000-01-13 2001-09-28 Hitachi Ltd バンプ付き電子部品の製造方法および電子部品の製造方法
EP1601017A4 (en) * 2003-02-26 2009-04-29 Ibiden Co Ltd MULTILAYER PRINTED PCB
JP4409990B2 (ja) * 2003-02-28 2010-02-03 昭和電工株式会社 ハンダ回路基板の製造方法。
JP2005117035A (ja) * 2003-09-19 2005-04-28 Showa Denko Kk フリップチップ型窒化ガリウム系半導体発光素子およびその製造方法
US7224056B2 (en) * 2003-09-26 2007-05-29 Tessera, Inc. Back-face and edge interconnects for lidded package
US7626829B2 (en) * 2004-10-27 2009-12-01 Ibiden Co., Ltd. Multilayer printed wiring board and manufacturing method of the multilayer printed wiring board

Also Published As

Publication number Publication date
JP2009044128A (ja) 2009-02-26
KR20090008146A (ko) 2009-01-21
TWI427720B (zh) 2014-02-21
TW200908180A (en) 2009-02-16
CN101350323A (zh) 2009-01-21

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