KR20090008146A - 솔더 범프 형성 방법 - Google Patents

솔더 범프 형성 방법 Download PDF

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Publication number
KR20090008146A
KR20090008146A KR1020080068999A KR20080068999A KR20090008146A KR 20090008146 A KR20090008146 A KR 20090008146A KR 1020080068999 A KR1020080068999 A KR 1020080068999A KR 20080068999 A KR20080068999 A KR 20080068999A KR 20090008146 A KR20090008146 A KR 20090008146A
Authority
KR
South Korea
Prior art keywords
metal film
film
pad
substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020080068999A
Other languages
English (en)
Korean (ko)
Inventor
게이 이마후지
마사오 나카자와
마사키 사나다
사치코 오다
다다시 고다이라
긴지 나가타
마사루 야마자키
겐지로 에노키
Original Assignee
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 신꼬오덴기 고교 가부시키가이샤 filed Critical 신꼬오덴기 고교 가부시키가이샤
Publication of KR20090008146A publication Critical patent/KR20090008146A/ko
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
KR1020080068999A 2007-07-17 2008-07-16 솔더 범프 형성 방법 Withdrawn KR20090008146A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JPJP-P-2007-00186020 2007-07-17
JP2007186020 2007-07-17
JPJP-P-2008-00125761 2008-05-13
JP2008125761A JP5297083B2 (ja) 2007-07-17 2008-05-13 はんだバンプ形成方法

Publications (1)

Publication Number Publication Date
KR20090008146A true KR20090008146A (ko) 2009-01-21

Family

ID=40269039

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020080068999A Withdrawn KR20090008146A (ko) 2007-07-17 2008-07-16 솔더 범프 형성 방법

Country Status (4)

Country Link
JP (1) JP5297083B2 (https=)
KR (1) KR20090008146A (https=)
CN (1) CN101350323A (https=)
TW (1) TWI427720B (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101122140B1 (ko) 2010-05-11 2012-03-16 엘지이노텍 주식회사 단일층 인쇄회로기판 및 그 제조방법
TW201233280A (en) * 2011-01-25 2012-08-01 Taiwan Uyemura Co Ltd Chemical palladium-gold plating film method
TW201233279A (en) * 2011-01-25 2012-08-01 Taiwan Uyemura Co Ltd Copper or palladium-copper wire package process and structure thereof
TWI464929B (zh) * 2011-03-16 2014-12-11 Lextar Electronics Corp 提昇散熱效率之光源模組及其嵌入式封裝結構
TWI555452B (zh) * 2014-08-12 2016-10-21 南亞電路板股份有限公司 電路板及其製造方法
CN108513433A (zh) * 2018-04-24 2018-09-07 苏州维信电子有限公司 一种隔锡的柔性线路板pad及其制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3838672B2 (ja) * 1993-06-07 2006-10-25 昭和電工株式会社 はんだ回路基板の形成方法
JPH11121495A (ja) * 1997-10-16 1999-04-30 Ricoh Co Ltd 半導体装置製造方法
WO1999034654A1 (en) * 1997-12-29 1999-07-08 Ibiden Co., Ltd. Multilayer printed wiring board
JP2001267731A (ja) * 2000-01-13 2001-09-28 Hitachi Ltd バンプ付き電子部品の製造方法および電子部品の製造方法
EP1601017A4 (en) * 2003-02-26 2009-04-29 Ibiden Co Ltd MULTILAYER PRINTED PCB
JP4409990B2 (ja) * 2003-02-28 2010-02-03 昭和電工株式会社 ハンダ回路基板の製造方法。
JP2005117035A (ja) * 2003-09-19 2005-04-28 Showa Denko Kk フリップチップ型窒化ガリウム系半導体発光素子およびその製造方法
US7224056B2 (en) * 2003-09-26 2007-05-29 Tessera, Inc. Back-face and edge interconnects for lidded package
US7626829B2 (en) * 2004-10-27 2009-12-01 Ibiden Co., Ltd. Multilayer printed wiring board and manufacturing method of the multilayer printed wiring board

Also Published As

Publication number Publication date
JP2009044128A (ja) 2009-02-26
TWI427720B (zh) 2014-02-21
JP5297083B2 (ja) 2013-09-25
TW200908180A (en) 2009-02-16
CN101350323A (zh) 2009-01-21

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Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000