JP5289921B2 - 半導体装置、及び、半導体装置の製造方法 - Google Patents
半導体装置、及び、半導体装置の製造方法 Download PDFInfo
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- JP5289921B2 JP5289921B2 JP2008316750A JP2008316750A JP5289921B2 JP 5289921 B2 JP5289921 B2 JP 5289921B2 JP 2008316750 A JP2008316750 A JP 2008316750A JP 2008316750 A JP2008316750 A JP 2008316750A JP 5289921 B2 JP5289921 B2 JP 5289921B2
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- Prior art keywords
- solder
- heat sink
- mounting
- semiconductor device
- semiconductor element
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
図1は、実施の形態1の半導体装置の断面構造を示す図である。
図5は、実施の形態2の半導体装置の断面構造を示す図である。
図7は、実施の形態3の半導体装置の要部の断面構造を示す図である。
図8は、実施の形態4の半導体装置の要部の断面構造を示す図である。
10A 実装面
11 金属部
12 放熱部
13 ビア
14 放熱部
15 電極
16 はんだ
20 ヒートシンク
20A フレーム部材
21 突出部
22 信号ピン
23 DAF
24 ボンディングワイヤ
25 カバー
26 はんだボール
30 半導体素子
220 ヒートシンク
220A フレーム部材
221 ヒートスプレッダ
320 ヒートシンク
322 信号ピン
327 ソルダレジスト
426 はんだ
426A コア部材
426B はんだ材料
Claims (4)
- 放熱用又は配線用にパターニングされた金属部が実装面に配列される実装基板と、
前記実装基板に搭載され、前記金属部に接続されるヒートシンクと、
前記ヒートシンクの前記実装基板への実装面とは反対側の面に搭載される半導体素子と、
前記ヒートシンクの前記実装基板への実装面がある側とは反対側において前記半導体素子を覆う樹脂製のカバーと
を含み、
前記ヒートシンクは、前記実装基板への実装面側に、エリアアレイ状に配列され、前記実装基板への実装面側に突出する複数の突出部を有し、前記複数の突出部のみが前記カバーから表出され、
前記ヒートシンクと前記実装基板とは、前記突出部の先端に配設される第1はんだ部と、前記金属部に配設される第2はんだ部とが溶融接続されることによって接続される、半導体装置。 - 前記エリアアレイ状に配列される前記突起部の各々は互いに分離されており、
前記分離された突起部の各々を保持する保持部材をさらに含む、請求項1に記載の半導体装置。 - 前記第1はんだ部ははんだボールであり、前記第2はんだ部は印刷はんだである、請求項1又は2に記載の半導体装置。
- フレーム部材の一方の面に半導体素子を搭載する工程と、
モールド成型技術により、前記フレーム部材の前記一方の面側で前記半導体素子を覆い、前記フレーム部材の他方の面側を表出する樹脂製のカバーを作製する工程と、
前記フレーム部材の前記他方の面側をエッチングして、エリアアレイ状に配列され、前記一方の面側から前記他方の面側への方向に突出するとともに、前記カバーから表出する複数の突出部を形成することにより、前記半導体素子を冷却するヒートシンクを前記フレーム部材から形成する工程と、
前記複数の突出部の先端にはんだ部を配設する工程と
を含む、半導体装置の製造方法。
Priority Applications (1)
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JP2008316750A JP5289921B2 (ja) | 2008-12-12 | 2008-12-12 | 半導体装置、及び、半導体装置の製造方法 |
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JP2008316750A JP5289921B2 (ja) | 2008-12-12 | 2008-12-12 | 半導体装置、及び、半導体装置の製造方法 |
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JP2010141175A JP2010141175A (ja) | 2010-06-24 |
JP5289921B2 true JP5289921B2 (ja) | 2013-09-11 |
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Families Citing this family (1)
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JP5050111B1 (ja) * | 2011-03-30 | 2012-10-17 | 株式会社東芝 | テレビジョン装置および電子機器 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06132441A (ja) * | 1992-10-19 | 1994-05-13 | Sony Corp | 樹脂封止型半導体装置及びその製造方法 |
JPH08255851A (ja) * | 1995-03-17 | 1996-10-01 | Toshiba Corp | 半導体用パッケージ |
JP2679681B2 (ja) * | 1995-04-28 | 1997-11-19 | 日本電気株式会社 | 半導体装置、半導体装置用パッケージ及びその製造方法 |
JPH10200010A (ja) * | 1997-01-10 | 1998-07-31 | Dainippon Printing Co Ltd | 表面実装型半導体装置用のリードフレーム部材および該リードフレーム部材を用いた表面実装型半導体装置 |
JP3947292B2 (ja) * | 1998-02-10 | 2007-07-18 | 大日本印刷株式会社 | 樹脂封止型半導体装置の製造方法 |
KR100250145B1 (ko) * | 1997-08-18 | 2000-03-15 | 유무성 | 비지에이반도체패키지와그제조방법 |
JPH1174404A (ja) * | 1997-08-28 | 1999-03-16 | Nec Corp | ボールグリッドアレイ型半導体装置 |
JP2001352021A (ja) * | 2000-06-07 | 2001-12-21 | Sony Corp | 半導体パッケージ、半導体パッケージの実装構造及び半導体パッケージの製造方法 |
JP2002158315A (ja) * | 2000-09-06 | 2002-05-31 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP4248528B2 (ja) * | 2002-10-24 | 2009-04-02 | パナソニック株式会社 | リードフレーム及び該リードフレームを用いる樹脂封止型半導体装置の製造方法 |
JP3988629B2 (ja) * | 2002-11-21 | 2007-10-10 | 株式会社日立製作所 | 電子装置 |
JP4533875B2 (ja) * | 2006-09-12 | 2010-09-01 | 株式会社三井ハイテック | 半導体装置およびこの半導体装置に使用するリードフレーム製品並びにこの半導体装置の製造方法 |
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