JP5249483B2 - 半導体デバイス及びマスク設計方法 - Google Patents

半導体デバイス及びマスク設計方法 Download PDF

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Publication number
JP5249483B2
JP5249483B2 JP2001506596A JP2001506596A JP5249483B2 JP 5249483 B2 JP5249483 B2 JP 5249483B2 JP 2001506596 A JP2001506596 A JP 2001506596A JP 2001506596 A JP2001506596 A JP 2001506596A JP 5249483 B2 JP5249483 B2 JP 5249483B2
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JP
Japan
Prior art keywords
feature
polishing
features
polishing dummy
layer
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Expired - Lifetime
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JP2001506596A
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English (en)
Japanese (ja)
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JP2003503847A (ja
JP2003503847A5 (https=
Inventor
オー． トラビス、エドワード
デンギ、アイクト
チェダ、セジャール
ユ、タックワン
エス． ロバートン、マーク
チアーン、ルイキ
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NXP USA Inc
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NXP USA Inc
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Publication of JP2003503847A5 publication Critical patent/JP2003503847A5/ja
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/403—Chemomechanical polishing [CMP] of conductive or resistive materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/926—Dummy metallization

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Semiconductor Memories (AREA)
JP2001506596A 1999-06-29 2000-05-24 半導体デバイス及びマスク設計方法 Expired - Lifetime JP5249483B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/340,697 US6396158B1 (en) 1999-06-29 1999-06-29 Semiconductor device and a process for designing a mask
US09/340,697 1999-06-29
PCT/US2000/014293 WO2001001469A2 (en) 1999-06-29 2000-05-24 Process for designing a mask

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011174607A Division JP2011228750A (ja) 1999-06-29 2011-08-10 半導体デバイス及びマスク設計方法

Publications (3)

Publication Number Publication Date
JP2003503847A JP2003503847A (ja) 2003-01-28
JP2003503847A5 JP2003503847A5 (https=) 2007-09-13
JP5249483B2 true JP5249483B2 (ja) 2013-07-31

Family

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Family Applications (2)

Application Number Title Priority Date Filing Date
JP2001506596A Expired - Lifetime JP5249483B2 (ja) 1999-06-29 2000-05-24 半導体デバイス及びマスク設計方法
JP2011174607A Pending JP2011228750A (ja) 1999-06-29 2011-08-10 半導体デバイス及びマスク設計方法

Family Applications After (1)

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JP2011174607A Pending JP2011228750A (ja) 1999-06-29 2011-08-10 半導体デバイス及びマスク設計方法

Country Status (7)

Country Link
US (2) US6396158B1 (https=)
EP (1) EP1196948A2 (https=)
JP (2) JP5249483B2 (https=)
KR (1) KR100722177B1 (https=)
CN (1) CN1274013C (https=)
TW (1) TW523831B (https=)
WO (1) WO2001001469A2 (https=)

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Also Published As

Publication number Publication date
KR20020012298A (ko) 2002-02-15
WO2001001469A3 (en) 2001-12-27
JP2011228750A (ja) 2011-11-10
TW523831B (en) 2003-03-11
KR100722177B1 (ko) 2007-05-29
CN1365516A (zh) 2002-08-21
EP1196948A2 (en) 2002-04-17
CN1274013C (zh) 2006-09-06
US6593226B2 (en) 2003-07-15
US6396158B1 (en) 2002-05-28
JP2003503847A (ja) 2003-01-28
US20020050655A1 (en) 2002-05-02
WO2001001469A2 (en) 2001-01-04

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