JP5235960B2 - 電力用半導体装置及びその製造方法 - Google Patents
電力用半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP5235960B2 JP5235960B2 JP2010203423A JP2010203423A JP5235960B2 JP 5235960 B2 JP5235960 B2 JP 5235960B2 JP 2010203423 A JP2010203423 A JP 2010203423A JP 2010203423 A JP2010203423 A JP 2010203423A JP 5235960 B2 JP5235960 B2 JP 5235960B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/051—Forming charge compensation regions, e.g. superjunctions
- H10D62/058—Forming charge compensation regions, e.g. superjunctions by using trenches, e.g. implanting into sidewalls of trenches or refilling trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/109—Reduced surface field [RESURF] PN junction structures
- H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/156—Drain regions of DMOS transistors
- H10D62/157—Impurity concentrations or distributions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/051—Forming charge compensation regions, e.g. superjunctions
- H10D62/054—Forming charge compensation regions, e.g. superjunctions by high energy implantations in bulk semiconductor bodies, e.g. forming pillars
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010203423A JP5235960B2 (ja) | 2010-09-10 | 2010-09-10 | 電力用半導体装置及びその製造方法 |
| CN201110254492.3A CN102403357B (zh) | 2010-09-10 | 2011-08-31 | 半导体装置及其制造方法 |
| US13/229,203 US8643056B2 (en) | 2010-09-10 | 2011-09-09 | Power semiconductor device and method of manufacturing the same |
| US14/138,940 US9136324B2 (en) | 2010-09-10 | 2013-12-23 | Power semiconductor device and method for manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010203423A JP5235960B2 (ja) | 2010-09-10 | 2010-09-10 | 電力用半導体装置及びその製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013060978A Division JP2013149999A (ja) | 2013-03-22 | 2013-03-22 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012060017A JP2012060017A (ja) | 2012-03-22 |
| JP2012060017A5 JP2012060017A5 (enExample) | 2012-09-27 |
| JP5235960B2 true JP5235960B2 (ja) | 2013-07-10 |
Family
ID=45805789
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010203423A Expired - Fee Related JP5235960B2 (ja) | 2010-09-10 | 2010-09-10 | 電力用半導体装置及びその製造方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US8643056B2 (enExample) |
| JP (1) | JP5235960B2 (enExample) |
| CN (1) | CN102403357B (enExample) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105789271B (zh) * | 2011-09-27 | 2019-01-01 | 株式会社电装 | 半导体器件 |
| TWI587503B (zh) | 2012-01-11 | 2017-06-11 | 世界先進積體電路股份有限公司 | 半導體裝置及其製造方法 |
| US9614043B2 (en) | 2012-02-09 | 2017-04-04 | Vishay-Siliconix | MOSFET termination trench |
| JP5701802B2 (ja) * | 2012-03-23 | 2015-04-15 | 株式会社東芝 | 電力用半導体装置 |
| US9842911B2 (en) | 2012-05-30 | 2017-12-12 | Vishay-Siliconix | Adaptive charge balanced edge termination |
| US8866221B2 (en) * | 2012-07-02 | 2014-10-21 | Infineon Technologies Austria Ag | Super junction semiconductor device comprising a cell area and an edge area |
| CN103035723A (zh) * | 2012-10-26 | 2013-04-10 | 上海华虹Nec电子有限公司 | 一种超级结深沟槽结构 |
| JP6197294B2 (ja) * | 2013-01-16 | 2017-09-20 | 富士電機株式会社 | 半導体素子 |
| US9209292B2 (en) * | 2013-07-18 | 2015-12-08 | Infineon Technologies Austria Ag | Charge compensation semiconductor devices |
| JP2015133380A (ja) | 2014-01-10 | 2015-07-23 | 株式会社東芝 | 半導体装置 |
| JP5918288B2 (ja) * | 2014-03-03 | 2016-05-18 | トヨタ自動車株式会社 | 半導体装置 |
| JP6485034B2 (ja) * | 2014-06-16 | 2019-03-20 | 富士電機株式会社 | 半導体装置の製造方法 |
| US20150372132A1 (en) * | 2014-06-23 | 2015-12-24 | Vishay-Siliconix | Semiconductor device with composite trench and implant columns |
| US9887259B2 (en) | 2014-06-23 | 2018-02-06 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
| KR20160005928A (ko) * | 2014-07-08 | 2016-01-18 | 삼성전기주식회사 | 전력 반도체 소자 |
| JP6375743B2 (ja) * | 2014-07-15 | 2018-08-22 | 富士電機株式会社 | 半導体装置の製造方法 |
| KR102098996B1 (ko) | 2014-08-19 | 2020-04-08 | 비쉐이-실리코닉스 | 초접합 금속 산화물 반도체 전계 효과 트랜지스터 |
| JP6185440B2 (ja) * | 2014-09-16 | 2017-08-23 | 株式会社東芝 | 半導体装置 |
| JP6534813B2 (ja) * | 2015-01-08 | 2019-06-26 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
| JP6510280B2 (ja) | 2015-03-11 | 2019-05-08 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| CN104900702A (zh) * | 2015-05-08 | 2015-09-09 | 西安西奈电子科技有限公司 | 一种纵向高压半导体器件 |
| DE102016207117A1 (de) * | 2016-04-27 | 2017-11-02 | Robert Bosch Gmbh | Leistungshalbleiterbauelement und Verfahren zur Herstellung des Leistungshalbleiterbauelements |
| JP2024113997A (ja) | 2023-02-10 | 2024-08-23 | 三菱電機株式会社 | 半導体装置、電力変換装置及び半導体装置の製造方法 |
| WO2025158983A1 (ja) * | 2024-01-26 | 2025-07-31 | ローム株式会社 | 半導体装置 |
| US20250311318A1 (en) * | 2024-04-01 | 2025-10-02 | Wolfspeed, Inc. | Power silicon carbide based semiconductor devices having super junction drift regions and methods of forming such devices |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999023703A1 (de) * | 1997-11-03 | 1999-05-14 | Infineon Technologies Ag | Hochspannungsfeste randstruktur für halbleiterbauelemente |
| US6936892B2 (en) * | 1998-07-24 | 2005-08-30 | Fuji Electric Co., Ltd. | Semiconductor device with alternating conductivity type layer and method of manufacturing the same |
| JP4483001B2 (ja) | 2000-02-17 | 2010-06-16 | 富士電機システムズ株式会社 | 半導体素子 |
| JP2006005275A (ja) * | 2004-06-21 | 2006-01-05 | Toshiba Corp | 電力用半導体素子 |
| JP2007036213A (ja) * | 2005-06-20 | 2007-02-08 | Toshiba Corp | 半導体素子 |
| US7462909B2 (en) * | 2005-06-20 | 2008-12-09 | Kabushiki Kaisha Toshiba | Semiconductor device and method of fabricating the same |
| JP2007012858A (ja) * | 2005-06-30 | 2007-01-18 | Toshiba Corp | 半導体素子及びその製造方法 |
| JP2007173418A (ja) * | 2005-12-20 | 2007-07-05 | Toshiba Corp | 半導体装置 |
| JP2007243092A (ja) * | 2006-03-13 | 2007-09-20 | Toyota Motor Corp | 半導体装置とその製造方法 |
| JP5342752B2 (ja) * | 2006-05-16 | 2013-11-13 | 株式会社東芝 | 半導体装置 |
| US7737469B2 (en) * | 2006-05-16 | 2010-06-15 | Kabushiki Kaisha Toshiba | Semiconductor device having superjunction structure formed of p-type and n-type pillar regions |
| JP4844371B2 (ja) * | 2006-12-04 | 2011-12-28 | 富士電機株式会社 | 縦型超接合半導体素子 |
| JP4844605B2 (ja) * | 2008-09-10 | 2011-12-28 | ソニー株式会社 | 半導体装置 |
| JP5606019B2 (ja) | 2009-07-21 | 2014-10-15 | 株式会社東芝 | 電力用半導体素子およびその製造方法 |
| JP2011204796A (ja) | 2010-03-24 | 2011-10-13 | Toshiba Corp | 半導体装置およびその製造方法 |
| US8786010B2 (en) * | 2011-04-27 | 2014-07-22 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
-
2010
- 2010-09-10 JP JP2010203423A patent/JP5235960B2/ja not_active Expired - Fee Related
-
2011
- 2011-08-31 CN CN201110254492.3A patent/CN102403357B/zh not_active Expired - Fee Related
- 2011-09-09 US US13/229,203 patent/US8643056B2/en not_active Expired - Fee Related
-
2013
- 2013-12-23 US US14/138,940 patent/US9136324B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN102403357A (zh) | 2012-04-04 |
| CN102403357B (zh) | 2014-09-10 |
| US8643056B2 (en) | 2014-02-04 |
| US20140117445A1 (en) | 2014-05-01 |
| US20120061721A1 (en) | 2012-03-15 |
| JP2012060017A (ja) | 2012-03-22 |
| US9136324B2 (en) | 2015-09-15 |
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