JP4981245B2 - 半導体素子製造方法 - Google Patents
半導体素子製造方法 Download PDFInfo
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- JP4981245B2 JP4981245B2 JP2004136486A JP2004136486A JP4981245B2 JP 4981245 B2 JP4981245 B2 JP 4981245B2 JP 2004136486 A JP2004136486 A JP 2004136486A JP 2004136486 A JP2004136486 A JP 2004136486A JP 4981245 B2 JP4981245 B2 JP 4981245B2
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- 239000004065 semiconductor Substances 0.000 title claims description 98
- 238000004519 manufacturing process Methods 0.000 title claims description 49
- 239000000758 substrate Substances 0.000 claims description 96
- 238000000034 method Methods 0.000 claims description 62
- 238000002955 isolation Methods 0.000 claims description 41
- 239000012535 impurity Substances 0.000 claims description 39
- 238000009792 diffusion process Methods 0.000 claims description 33
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 23
- 229910052710 silicon Inorganic materials 0.000 claims description 22
- 239000010703 silicon Substances 0.000 claims description 22
- 239000011810 insulating material Substances 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 14
- 150000004767 nitrides Chemical class 0.000 claims description 12
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 11
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 11
- WUKWITHWXAAZEY-UHFFFAOYSA-L calcium difluoride Chemical compound [F-].[F-].[Ca+2] WUKWITHWXAAZEY-UHFFFAOYSA-L 0.000 claims description 6
- 229910001634 calcium fluoride Inorganic materials 0.000 claims description 6
- 229910000420 cerium oxide Inorganic materials 0.000 claims description 6
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 5
- 229910004261 CaF 2 Inorganic materials 0.000 claims description 4
- 229910008310 Si—Ge Inorganic materials 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims 1
- 230000000694 effects Effects 0.000 description 17
- 230000005669 field effect Effects 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 6
- 238000005468 ion implantation Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 1
- 239000002784 hot electron Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66651—Lateral single gate silicon transistors with a single crystalline channel formed on the silicon substrate after insulating device isolation
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76289—Lateral isolation by air gap
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/764—Air gaps
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/802—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with heterojunction gate, e.g. transistors with semiconductor layer acting as gate insulating layer, MIS-like transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Element Separation (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
Description
303,1103 エピタキシャル犠牲膜
303a,1103a エピタキシャル犠牲膜パターン
305,1105 エピタキシャル膜
305a,1105a エピタキシャル膜パターン
307a,1107a マスクパターン
300,1109 トレンチ
311,1111 空の空間領域
313,1113 熱酸化膜
315,1115 ライナ窒化膜
317,1117 素子分離領域
319,1119 ゲート電極
321,1121 不純物拡散領域
Claims (9)
- 半導体基板上にエピタキシャル犠牲膜パターンを形成する段階と、
前記エピタキシャル犠牲膜パターン及びそれにより露出した基板上にエピタキシャル膜を形成する段階と、
前記エピタキシャル膜、エピタキシャル犠牲膜パターン及び基板の一部の厚さをエッチングして、エピタキシャル膜パターン及び素子分離トレンチを形成する段階と、
前記トレンチにより露出したエッチングされたエピタキシャル犠牲膜パターンを除去する段階と、
前記トレンチを満たし、前記エピタキシャル膜パターンの上部の表面よりもさらに低い素子分離領域を形成する段階と、
前記エピタキシャル膜パターンを横切るゲート電極を形成する段階と、
前記ゲート電極の両側のエピタキシャル膜パターンに不純物拡散領域を形成する段階と、を順次遂行し、
前記エッチングされたエピタキシャル犠牲膜パターンが除去された領域は前記ゲート電極の下部の前記エピタキシャル膜パターンと前記基板との間に位置する
ことを特徴とする半導体素子製造方法。 - 前記エピタキシャル膜パターン及び素子分離トレンチを形成する段階は、
前記エピタキシャル膜上にマスクパターンを形成する段階と、
前記マスクパターンをエッチングマスクとして使用して、前記エピタキシャル膜、エピタキシャル犠牲膜パターン及び基板の一部の厚さをエッチングする段階と、を含み、
前記素子分離領域を形成する段階は、
前記エッチングトレンチを満たすように、前記マスクパターン上に絶縁物質を形成する段階と、
前記マスクパターンが露出するまで前記絶縁物質を平坦化エッチングする段階と、
前記露出したマスクパターンを除去する段階と、
前記エピタキシャル膜パターンよりも低くなるように前記絶縁物質をエッチングする段階と、を含む
ことを特徴とする請求項1に記載の半導体素子製造方法。 - 前記絶縁物質を形成する段階の前に、
熱酸化工程を進行して、前記エッチングされたエピタキシャル犠牲膜パターン及び前記トレンチ上に熱酸化膜を形成する段階と、
前記熱酸化膜上にライナ窒化膜を形成する段階と、をさらに含む
ことを特徴とする請求項2に記載の半導体素子製造方法。 - 前記絶縁物質は前記エッチングされたエピタキシャル犠牲膜パターンが除去された領域も満たす
ことを特徴とする請求項2に記載の半導体素子製造方法。 - 前記エピタキシャル膜はシリコン膜で形成される
ことを特徴とする請求項1に記載の半導体素子製造方法。 - 前記エピタキシャル犠牲膜はシリコンと結晶構造が同一であり、格子定数が類似な物質である、シリコン−ゲルマニウムSi−Ge、酸化セリウムCeO2、フッ化カルシウムCaF2のうちのいずれか一つ、またはこれらの組み合わせ膜で形成される
ことを特徴とする請求項5に記載の半導体素子製造方法。 - 前記エピタキシャル犠牲膜はシリコン−ゲルマニウム、酸化セリウム、フッ化カルシウムのうちのいずれか一つ、またはこれらの組み合わせ膜で形成される
ことを特徴とする請求項6に記載の半導体素子製造方法。 - 前記エピタキシャル犠牲膜はシリコン−ゲルマニウム、酸化セリウム、フッ化カルシウムのうちのいずれか一つ、またはこれらの組み合わせ膜で形成される
ことを特徴とする請求項1に記載の半導体素子製造方法。 - 前記エピタキシャル犠牲膜はシリコンからなり、前記エピタキシャル膜はシリコン−ゲルマニウムからなる
ことを特徴とする請求項1に記載の半導体素子製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2003-028287 | 2003-05-02 | ||
KR1020030028287A KR100553683B1 (ko) | 2003-05-02 | 2003-05-02 | 반도체 소자 및 그 제조 방법 |
Publications (2)
Publication Number | Publication Date |
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JP2004336052A JP2004336052A (ja) | 2004-11-25 |
JP4981245B2 true JP4981245B2 (ja) | 2012-07-18 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2004136486A Expired - Fee Related JP4981245B2 (ja) | 2003-05-02 | 2004-04-30 | 半導体素子製造方法 |
Country Status (4)
Country | Link |
---|---|
US (2) | US20040217434A1 (ja) |
JP (1) | JP4981245B2 (ja) |
KR (1) | KR100553683B1 (ja) |
CN (1) | CN100479159C (ja) |
Families Citing this family (66)
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CN100433257C (zh) * | 2004-01-15 | 2008-11-12 | 野田优 | 制造单晶薄膜的方法 |
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KR100699843B1 (ko) * | 2005-06-09 | 2007-03-27 | 삼성전자주식회사 | 트렌치 분리영역을 갖는 모스 전계효과 트랜지스터 및 그제조방법 |
KR100637692B1 (ko) * | 2005-06-27 | 2006-10-25 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
JP2007027232A (ja) * | 2005-07-13 | 2007-02-01 | Seiko Epson Corp | 半導体装置及びその製造方法 |
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KR100673016B1 (ko) | 2005-12-06 | 2007-01-24 | 삼성전자주식회사 | 반도체 소자 및 그 형성 방법 |
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KR100849186B1 (ko) * | 2006-04-28 | 2008-07-30 | 주식회사 하이닉스반도체 | 엘에스오아이 공정을 이용한 반도체소자의 제조 방법 |
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JP4360413B2 (ja) * | 2007-03-28 | 2009-11-11 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP5348916B2 (ja) * | 2007-04-25 | 2013-11-20 | 株式会社半導体エネルギー研究所 | 半導体装置 |
JP5350655B2 (ja) | 2007-04-27 | 2013-11-27 | 株式会社半導体エネルギー研究所 | 半導体装置 |
JP2009182114A (ja) * | 2008-01-30 | 2009-08-13 | Elpida Memory Inc | 半導体装置およびその製造方法 |
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US20080194065A1 (en) | 2008-08-14 |
CN100479159C (zh) | 2009-04-15 |
KR20040094498A (ko) | 2004-11-10 |
KR100553683B1 (ko) | 2006-02-24 |
US20040217434A1 (en) | 2004-11-04 |
JP2004336052A (ja) | 2004-11-25 |
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