JP4975944B2 - 静電気放電保護のためのツェナーダイオードを備える二重拡散金属酸化膜半導体トランジスタ - Google Patents
静電気放電保護のためのツェナーダイオードを備える二重拡散金属酸化膜半導体トランジスタ Download PDFInfo
- Publication number
- JP4975944B2 JP4975944B2 JP2002592201A JP2002592201A JP4975944B2 JP 4975944 B2 JP4975944 B2 JP 4975944B2 JP 2002592201 A JP2002592201 A JP 2002592201A JP 2002592201 A JP2002592201 A JP 2002592201A JP 4975944 B2 JP4975944 B2 JP 4975944B2
- Authority
- JP
- Japan
- Prior art keywords
- trench
- body region
- metal oxide
- oxide semiconductor
- semiconductor transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims description 27
- 229910044991 metal oxide Inorganic materials 0.000 title claims description 22
- 150000004706 metal oxides Chemical class 0.000 title claims description 22
- 238000009792 diffusion process Methods 0.000 title claims description 16
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 44
- 229920005591 polysilicon Polymers 0.000 claims description 42
- 210000000746 body region Anatomy 0.000 claims description 35
- 239000000758 substrate Substances 0.000 claims description 20
- 238000004519 manufacturing process Methods 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 15
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 6
- 230000015556 catabolic process Effects 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- 239000002019 doping agent Substances 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 230000006378 damage Effects 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 229910052785 arsenic Inorganic materials 0.000 description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 230000007935 neutral effect Effects 0.000 description 2
- FAIAAWCVCHQXDN-UHFFFAOYSA-N phosphorus trichloride Chemical compound ClP(Cl)Cl FAIAAWCVCHQXDN-UHFFFAOYSA-N 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- -1 that is Inorganic materials 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/62—Protection against overvoltage, e.g. fuses, shunts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7808—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a breakdown diode, e.g. Zener diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
Claims (15)
- トレンチDMOS構造部と、該トレンチDMOS構造部に対する過電圧保護としてのツェナーダイオードとを有する二重拡散金属酸化膜半導体トランジスタにおいて、
第1の伝導型の基板と、
上記基板上に形成された第2の伝導型のボディ領域と、
上記ボディ領域及び上記基板に亘って延びる複数のトレンチと、
上記トレンチの内壁及び上記ボディ領域上に形成された酸化物層と、
上記トレンチ内の酸化物層上に形成され、該トレンチ内の酸化物層上に堆積されたドーピングされていないポリシリコン層と、該ドーピングされていないポリシリコン層上に堆積されたドーピングされたポリシリコン層とを有する導電性電極と、
上記トレンチに隣接するボディ領域に形成された第1の伝導型のソース領域と、
上記ボディ領域の表面を直接覆う酸化物層上の、上記トレンチDMOS構造部に重ならない所定の位置に形成され、上記ツェナーダイオードが完全に形成されたドーピングされていないポリシリコン層とを備え、
上記ツェナーダイオードは、第1の伝導型の複数のカソード領域と、該複数のカソード領域のうちの隣接するカソード領域に接する少なくとも1つのアノード領域とを有し、
上記トレンチDMOS構造部は、少なくとも、上記導電性電極と、該導電性電極が形成されたトレンチに隣接するボディ領域と、上記ソース領域とを有することを特徴とする二重拡散金属酸化膜半導体トランジスタ。 - 上記基板の背面に配置されたドレイン電極を更に備える請求項1記載の二重拡散金属酸化膜半導体トランジスタ。
- 上記ソース領域に接続されたソース電極を更に備える請求項2記載の二重拡散金属酸化膜半導体トランジスタ。
- 上記酸化物層の厚さは、500〜800Åであることを特徴とする請求項1記載の二重拡散金属酸化膜半導体トランジスタ。
- 上記ツェナーダイオードが完全に形成されたドーピングされていないポリシリコン層の厚さは、5000〜10000Åであることを特徴とする請求項1記載の二重拡散金属酸化膜半導体トランジスタ。
- 上記ツェナーダイオードが完全に形成されたドーピングされていないポリシリコン層は、上記少なくとも1つのトレンチがボディ領域及び基板に亘って延びる方向に対して垂直な方向に位置し、上記ボディ領域の表面を直接覆う酸化物層上の、上記トレンチDMOS構造部に重ならない所定の位置に形成されていることを特徴とする請求項1記載の二重拡散金属酸化膜半導体トランジスタ。
- 上記複数のカソード領域には、ホウ素が注入されていることを特徴とする請求項1記載の二重拡散金属酸化膜半導体トランジスタ。
- トレンチDMOS構造部と、該トレンチDMOS構造部に対する過電圧保護としてのツェナーダイオードとを有する二重拡散金属酸化膜半導体トランジスタの製造方法において、
第1の伝導型の基板を準備するステップと、
上記基板上に、第2の伝導型のボディ領域を堆積するステップと、
上記ボディ領域及び上記基板に亘って延びる複数のトレンチを形成するステップと、
上記トレンチの内壁及び上記ボディ領域上に酸化物層を堆積するステップと、
上記トレンチ内の酸化物層上にドーピングされていないポリシリコン層を堆積し、該ドーピングされていないポリシリコン層上にドーピングされたポリシリコン層を堆積することにより、該トレンチ内の酸化物層上に導電性電極を形成するステップと、
上記ボディ領域の表面を直接覆う酸化物層上の、上記トレンチDMOS構造部に重ならない所定の位置にドーピングされていないポリシリコン層を堆積するステップと、
上記トレンチに隣接するボディ領域と、該ボディ領域の表面を直接覆う酸化物層上の上記ドーピングされていないポリシリコン層内の上記ツェナーダイオードの複数のカソード領域を完全に形成する位置とに第1の伝導型のドーパントを注入して、該トレンチに隣接するボディ領域内にソース領域を形成するとともに、該ボディ領域の表面を直接覆う酸化物層上の上記ドーピングされていないポリシリコン層内に該ツェナーダイオードの少なくとも1つのアノード領域によって分離される複数のカソード領域を完全に形成するステップとを有する二重拡散金属酸化膜半導体トランジスタの製造方法。 - 上記ボディ領域及び上記ドーピングされていないポリシリコン層上にフォトリソグラフマスクを画定するステップを更に有する請求項8記載の二重拡散金属酸化膜半導体トランジスタの製造方法。
- 上記導電性電極を形成するステップでは、上記導電性電極をエッチングして、上記ボディ領域上の酸化物層の一部を露出させることを特徴とする請求項8記載の二重拡散金属酸化膜半導体トランジスタの製造方法。
- 上記ボディ領域の表面を直接覆う酸化物層上にドーピングされていないポリシリコン層を堆積するステップでは、上記ボディ領域の表面を覆う酸化物層上の上記トレンチDMOS構造部に重なる位置にあるドーピングされていないポリシリコン層をエッチング除去することを特徴とする請求項8記載の二重拡散金属酸化膜半導体トランジスタの製造方法。
- 上記基板の背面に、ドレイン電極を形成するステップを更に有する請求項8記載の二重拡散金属酸化膜半導体トランジスタの製造方法。
- 上記ソース領域に接続されたソース電極を形成するステップを更に有する請求項12記載の二重拡散金属酸化膜半導体トランジスタの製造方法。
- 上記酸化物層の厚さは、500〜800Åであることを特徴とする請求項8記載の二重拡散金属酸化膜半導体トランジスタの製造方法。
- 所定のダイオード降伏電圧が実現されるように、上記複数のカソード領域及び上記アノード領域にホウ素を注入するステップを更に有する請求項8記載の二重拡散金属酸化膜半導体トランジスタの製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/862,541 | 2001-05-22 | ||
US09/862,541 US6657256B2 (en) | 2001-05-22 | 2001-05-22 | Trench DMOS transistor having a zener diode for protection from electro-static discharge |
PCT/US2002/016169 WO2002095836A1 (en) | 2001-05-22 | 2002-05-22 | Dmos with zener diode for esd protection |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2004528719A JP2004528719A (ja) | 2004-09-16 |
JP2004528719A5 JP2004528719A5 (ja) | 2006-01-05 |
JP4975944B2 true JP4975944B2 (ja) | 2012-07-11 |
Family
ID=25338718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002592201A Expired - Lifetime JP4975944B2 (ja) | 2001-05-22 | 2002-05-22 | 静電気放電保護のためのツェナーダイオードを備える二重拡散金属酸化膜半導体トランジスタ |
Country Status (7)
Country | Link |
---|---|
US (2) | US6657256B2 (ja) |
EP (1) | EP1396031A4 (ja) |
JP (1) | JP4975944B2 (ja) |
KR (1) | KR100862941B1 (ja) |
CN (1) | CN100399583C (ja) |
TW (1) | TW546845B (ja) |
WO (1) | WO2002095836A1 (ja) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6576506B2 (en) * | 2001-06-29 | 2003-06-10 | Agere Systems Inc. | Electrostatic discharge protection in double diffused MOS transistors |
TW584935B (en) * | 2003-03-11 | 2004-04-21 | Mosel Vitelic Inc | Termination structure of DMOS device |
DE102004026100B4 (de) * | 2004-05-25 | 2007-10-25 | Infineon Technologies Ag | ESD-Schutzstrukturen für Halbleiterbauelemente |
JP4907862B2 (ja) * | 2004-12-10 | 2012-04-04 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US7544545B2 (en) * | 2005-12-28 | 2009-06-09 | Vishay-Siliconix | Trench polysilicon diode |
JP4978014B2 (ja) * | 2006-01-30 | 2012-07-18 | サンケン電気株式会社 | 半導体発光装置及びその製造方法 |
US20080042222A1 (en) * | 2006-08-16 | 2008-02-21 | Force Mos Technology Co., Ltd. | Trench mosfet with copper metal connections |
US7629646B2 (en) | 2006-08-16 | 2009-12-08 | Force Mos Technology Co., Ltd. | Trench MOSFET with terraced gate and manufacturing method thereof |
US20080042208A1 (en) * | 2006-08-16 | 2008-02-21 | Force Mos Technology Co., Ltd. | Trench mosfet with esd trench capacitor |
JP4249774B2 (ja) * | 2006-10-13 | 2009-04-08 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
US8093621B2 (en) | 2008-12-23 | 2012-01-10 | Power Integrations, Inc. | VTS insulated gate bipolar transistor |
JP5196794B2 (ja) | 2007-01-29 | 2013-05-15 | 三菱電機株式会社 | 半導体装置 |
KR100827479B1 (ko) * | 2007-05-18 | 2008-05-06 | 주식회사 동부하이텍 | 반도체 소자의 정전 방지 회로 구조 및 이의 제조 방법 |
US7825431B2 (en) * | 2007-12-31 | 2010-11-02 | Alpha & Omega Semicondictor, Ltd. | Reduced mask configuration for power MOSFETs with electrostatic discharge (ESD) circuit protection |
US20090212354A1 (en) * | 2008-02-23 | 2009-08-27 | Force Mos Technology Co. Ltd | Trench moseft with trench gates underneath contact areas of esd diode for prevention of gate and source shortate |
KR200449539Y1 (ko) * | 2008-05-14 | 2010-07-20 | (주)홀랜드코리아 | 투광판이 부설된 매입형 천정등 |
US20100155831A1 (en) * | 2008-12-20 | 2010-06-24 | Power Integrations, Inc. | Deep trench insulated gate bipolar transistor |
US7871882B2 (en) * | 2008-12-20 | 2011-01-18 | Power Integrations, Inc. | Method of fabricating a deep trench insulated gate bipolar transistor |
CN102074561B (zh) * | 2009-11-24 | 2013-05-29 | 力士科技股份有限公司 | 一种沟槽金属氧化物半导体场效应管及其制造方法 |
CN101901829A (zh) * | 2010-05-07 | 2010-12-01 | 深圳深爱半导体有限公司 | 静电释放保护结构及制造方法 |
CN102263105B (zh) * | 2010-05-26 | 2013-04-03 | 茂达电子股份有限公司 | 沟渠式半导体组件及其制作方法 |
CN102376568B (zh) * | 2010-08-19 | 2015-08-05 | 北大方正集团有限公司 | 在深沟槽肖特基二极管晶圆的深沟槽内淀积多晶硅的方法 |
EP2498280B1 (en) * | 2011-03-11 | 2020-04-29 | Soitec | DRAM with trench capacitors and logic back-biased transistors integrated on an SOI substrate comprising an intrinsic semiconductor layer and manufacturing method thereof |
CN103928513B (zh) * | 2013-01-15 | 2017-03-29 | 无锡华润上华半导体有限公司 | 一种沟槽dmos器件及其制作方法 |
US9728529B2 (en) | 2014-04-14 | 2017-08-08 | Infineon Technologies Dresden Gmbh | Semiconductor device with electrostatic discharge protection structure |
CN105185709A (zh) * | 2014-05-28 | 2015-12-23 | 北大方正集团有限公司 | 在沟槽型vdmos中制作防静电结构的方法 |
EP2996156A1 (en) * | 2014-09-10 | 2016-03-16 | Ipdia | Semiconductor device comprising a diode and electrostatic discharge protection device |
CN106653842B (zh) * | 2015-10-28 | 2019-05-17 | 无锡华润上华科技有限公司 | 一种具有静电释放保护结构的半导体器件 |
US10522674B2 (en) | 2016-05-18 | 2019-12-31 | Rohm Co., Ltd. | Semiconductor with unified transistor structure and voltage regulator diode |
HK1244177A2 (zh) | 2018-03-27 | 2018-07-27 | Yeuk Yin Mong | 用於溝道型dmos的集成堆叠在溝道中的防靜電網絡 |
US11869986B2 (en) | 2021-08-27 | 2024-01-09 | Texas Instruments Incorporated | Vertical deep trench and deep trench island based deep n-type well diode and diode triggered protection device |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5072266A (en) | 1988-12-27 | 1991-12-10 | Siliconix Incorporated | Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry |
US5100829A (en) * | 1989-08-22 | 1992-03-31 | Motorola, Inc. | Process for forming a semiconductor structure with closely coupled substrate temperature sense element |
JPH0393265A (ja) * | 1989-09-06 | 1991-04-18 | Nissan Motor Co Ltd | 半導体集積回路 |
JPH05335585A (ja) * | 1992-06-03 | 1993-12-17 | Fuji Electric Co Ltd | 絶縁ゲート型電力用半導体素子の製造方法 |
US5410170A (en) | 1993-04-14 | 1995-04-25 | Siliconix Incorporated | DMOS power transistors with reduced number of contacts using integrated body-source connections |
JP2710197B2 (ja) * | 1993-12-16 | 1998-02-10 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3400846B2 (ja) | 1994-01-20 | 2003-04-28 | 三菱電機株式会社 | トレンチ構造を有する半導体装置およびその製造方法 |
JPH09162399A (ja) * | 1995-12-12 | 1997-06-20 | Toshiba Corp | 半導体装置 |
US5770878A (en) * | 1996-04-10 | 1998-06-23 | Harris Corporation | Trench MOS gate device |
US5602046A (en) | 1996-04-12 | 1997-02-11 | National Semiconductor Corporation | Integrated zener diode protection structures and fabrication methods for DMOS power devices |
US5959345A (en) * | 1997-11-28 | 1999-09-28 | Delco Electronics Corporation | Edge termination for zener-clamped power device |
US6268242B1 (en) * | 1997-12-31 | 2001-07-31 | Richard K. Williams | Method of forming vertical mosfet device having voltage clamped gate and self-aligned contact |
JPH11251594A (ja) * | 1997-12-31 | 1999-09-17 | Siliconix Inc | 電圧クランプされたゲ―トを有するパワ―mosfet |
GB9818182D0 (en) * | 1998-08-21 | 1998-10-14 | Zetex Plc | Gated semiconductor device |
JP3413569B2 (ja) * | 1998-09-16 | 2003-06-03 | 株式会社日立製作所 | 絶縁ゲート型半導体装置およびその製造方法 |
JP2000150664A (ja) * | 1998-11-16 | 2000-05-30 | Toshiba Corp | 高耐圧半導体装置 |
US6706604B2 (en) * | 1999-03-25 | 2004-03-16 | Hitachi, Ltd. | Method of manufacturing a trench MOS gate device |
US6413822B2 (en) * | 1999-04-22 | 2002-07-02 | Advanced Analogic Technologies, Inc. | Super-self-aligned fabrication process of trench-gate DMOS with overlying device layer |
US6518621B1 (en) * | 1999-09-14 | 2003-02-11 | General Semiconductor, Inc. | Trench DMOS transistor having reduced punch-through |
US6455378B1 (en) * | 1999-10-26 | 2002-09-24 | Hitachi, Ltd. | Method of manufacturing a trench gate power transistor with a thick bottom insulator |
JP2001352067A (ja) * | 2000-06-06 | 2001-12-21 | Sanyo Electric Co Ltd | Mosfetの保護装置 |
JP2002208702A (ja) * | 2001-01-10 | 2002-07-26 | Mitsubishi Electric Corp | パワー半導体装置 |
JP4932088B2 (ja) * | 2001-02-19 | 2012-05-16 | ルネサスエレクトロニクス株式会社 | 絶縁ゲート型半導体装置の製造方法 |
-
2001
- 2001-05-22 US US09/862,541 patent/US6657256B2/en not_active Expired - Lifetime
-
2002
- 2002-05-21 TW TW091110668A patent/TW546845B/zh not_active IP Right Cessation
- 2002-05-22 CN CNB028104285A patent/CN100399583C/zh not_active Expired - Fee Related
- 2002-05-22 JP JP2002592201A patent/JP4975944B2/ja not_active Expired - Lifetime
- 2002-05-22 WO PCT/US2002/016169 patent/WO2002095836A1/en active Application Filing
- 2002-05-22 EP EP02751992A patent/EP1396031A4/en not_active Ceased
- 2002-05-22 KR KR1020037015126A patent/KR100862941B1/ko active IP Right Grant
-
2003
- 2003-11-18 US US10/714,807 patent/US6884683B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR20040030621A (ko) | 2004-04-09 |
TW546845B (en) | 2003-08-11 |
US6884683B2 (en) | 2005-04-26 |
EP1396031A4 (en) | 2008-04-09 |
CN1524298A (zh) | 2004-08-25 |
KR100862941B1 (ko) | 2008-10-14 |
US6657256B2 (en) | 2003-12-02 |
EP1396031A1 (en) | 2004-03-10 |
WO2002095836A1 (en) | 2002-11-28 |
US20020175367A1 (en) | 2002-11-28 |
JP2004528719A (ja) | 2004-09-16 |
US20040097042A1 (en) | 2004-05-20 |
CN100399583C (zh) | 2008-07-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4975944B2 (ja) | 静電気放電保護のためのツェナーダイオードを備える二重拡散金属酸化膜半導体トランジスタ | |
JP2004528719A5 (ja) | ||
KR100816253B1 (ko) | 트렌치 게이트 전계 효과 트랜지스터 및 그의 제조 방법 | |
US5689128A (en) | High density trenched DMOS transistor | |
EP0798785B1 (en) | High-voltage-resistant MOS transistor, and corresponding manufacturing process | |
US5614751A (en) | Edge termination structure for power MOSFET | |
KR101144025B1 (ko) | 반도체 장치 및 그 제조 방법 | |
JP4094945B2 (ja) | トレンチ二重拡散金属酸化膜半導体セル | |
KR101531882B1 (ko) | 반도체 소자 및 그 제조 방법 | |
KR20180110703A (ko) | 낮은 소스-드레인 저항을 갖는 반도체 소자 구조 및 그 제조 방법 | |
JP2006510206A (ja) | 集積回路構造体 | |
KR100295685B1 (ko) | 반도체 메모리 소자 및 그 제조방법 | |
US7230300B2 (en) | Semiconductor device with peripheral trench | |
US6762458B2 (en) | High voltage transistor and method for fabricating the same | |
KR20010014742A (ko) | 반도체장치 및 그 제조방법 | |
US6710404B2 (en) | High voltage device and method for fabricating the same | |
EP1949446A2 (en) | Transistor device | |
US7179712B2 (en) | Multibit ROM cell and method therefor | |
EP0698295B1 (en) | Method of fabricating an electrically programmable read-only memory | |
KR20010059530A (ko) | 반도체소자의 트랜지스터 형성방법 | |
KR0165347B1 (ko) | 고내압 트랜지스터 및 그 제조방법 | |
CN111092113A (zh) | 金氧半场效应晶体管的终端区结构及其制造方法 | |
KR20000066450A (ko) | 정전기 보호용 트랜지스터 및 그의 제조 방법 | |
KR20010065743A (ko) | 게이트 보호용 다이오드 및 그의 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20050518 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20050518 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080826 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20081126 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20081203 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20081226 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20090109 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20090126 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20090202 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090226 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20090414 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090813 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090901 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20090907 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20090925 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20111026 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20111101 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20111128 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20111201 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20111226 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20120104 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120126 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120412 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 4975944 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150420 Year of fee payment: 3 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |