JP4907178B2 - 半導体装置およびそれを備えた電子機器 - Google Patents
半導体装置およびそれを備えた電子機器 Download PDFInfo
- Publication number
- JP4907178B2 JP4907178B2 JP2006018003A JP2006018003A JP4907178B2 JP 4907178 B2 JP4907178 B2 JP 4907178B2 JP 2006018003 A JP2006018003 A JP 2006018003A JP 2006018003 A JP2006018003 A JP 2006018003A JP 4907178 B2 JP4907178 B2 JP 4907178B2
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- Prior art keywords
- semiconductor device
- external terminal
- solder
- mounting
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 239000004065 semiconductor Substances 0.000 title claims description 128
- 229910000679 solder Inorganic materials 0.000 claims description 88
- 229910052751 metal Inorganic materials 0.000 claims description 72
- 239000002184 metal Substances 0.000 claims description 72
- 239000000758 substrate Substances 0.000 claims description 53
- 238000007747 plating Methods 0.000 claims description 47
- 229920005989 resin Polymers 0.000 claims description 42
- 239000011347 resin Substances 0.000 claims description 42
- 238000005476 soldering Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 description 20
- 238000010586 diagram Methods 0.000 description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 7
- 230000001070 adhesive effect Effects 0.000 description 7
- 239000004020 conductor Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 6
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- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
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- 239000000956 alloy Substances 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 238000005562 fading Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- 229910003811 SiGeC Inorganic materials 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000010365 information processing Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910003465 moissanite Inorganic materials 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
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- 230000008878 coupling Effects 0.000 description 1
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- 238000010168 coupling process Methods 0.000 description 1
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- 230000007547 defect Effects 0.000 description 1
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- 230000005611 electricity Effects 0.000 description 1
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- 238000009713 electroplating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
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- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
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- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H05K3/341—Surface mounted components
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- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- Engineering & Computer Science (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Description
(第1の実施の形態)
図1は、本発明の第1の実施の形態を示す図である。図1(a)は本実施の形態の半導体装置22の半導体素子の実装面を表す概略構成図、(b)は図1(a)のA−A線で切断した断面図である。なお、図1(a)については、上部電極や半導体素子の配置がよくわかるようにパッケージ上部に相当するモールド樹脂部28は除去した状態で示している。
図6は本発明の第2の実施の形態を示す図である。図1および図2の第1の実施の形態と異なるのは、外部端子14の形状である。すなわち、外部端子14の形状は、金属めっき層16が段差になった形状をしている。この段差形状は、金属めっきの工程を2回繰り返すか、金属めっきを厚く形成した後に一部をエッチング等により除去することで実現できる。その結果、半導体装置用基板5の第2の表面38を高さの基準とした場合、第2の絶縁膜27の高さ20が、外部端子14の表面30までの高さ21と段差31の高さ32の間に位置する。以下に本実施の形態について、第1の実施の形態と異なる点について詳細に述べる。
2 配線パターン
3 実装用ランド
4,18 ソルダーレジスト
5 半導体装置用基板
6,15 金属パターン
7,16 金属めっき層
8,17 表層金属めっき層
9 接着剤
10,22,25,33 半導体装置
11 パッケージ下部(配線基板)
12 導電性ワイヤ
13 上部電極
14 外部端子
19,47 ハンダ接続部
20,21,32 高さ
23,24 ハンダはみ出し部
26 第1の絶縁膜
27 第2の絶縁膜
28 モールド樹脂部
29 貫通電極
30 表面
31 段差
34,35 半導体素子
36 ビアホール
37 第1の表面
38 第2の表面
41 絶縁基板
42 回路配線部
43 ランド
44 導電体
45 絶縁性樹脂
46 回路部品
48 突出部
50,55 実装回路基板
106 グランド端子
107 グランドパターン
Claims (7)
- 第一の面と前記第一の面に対向する第二の面を備える基板と、
前記基板の第一の面と第二の面に形成された金属パターンと、
前記第一の面において前記金属パターン上に突出した上部電極と、
前記第二の面において前記金属パターン上に突出した外部端子と、
前記基板を前記第一の面から前記第二の面まで貫通して前記上部電極と前記外部端子とを接続する金属めっき層が形成された貫通電極と、
前記上部電極を除いて、少なくとも前記金属パターンを覆う第1の絶縁膜と、
前記外部端子を除いて、少なくとも前記金属パターンを覆う第2の絶縁膜と
を有する配線基板の上に、
前記第一の面上に前記上部電極と接続された半導体素子を備え、
前記上部電極および前記外部端子は前記金属めっき層が形成されて、前記上部電極の表面の高さが前記第1の絶縁膜の表面より高く、かつ前記外部端子の表面の高さが前記第2の絶縁膜の表面より高くなるように配置され、
前記第二の面において、前記第2の絶縁膜で覆われた前記金属パターンが2つの前記外部端子の間に挟まれるように配置され、該金属パターンはグランドパターンに接続されていることを特徴とする半導体装置。 - 前記半導体素子は前記第1の絶縁膜上に配置されて、前記上部電極と共に樹脂で覆われることを特徴とする請求項1に記載の半導体装置。
- 前記外部端子が段差を有することを特徴とする請求項1または請求項2に記載の半導体
装置。 - 前記外部端子の前記金属めっき層が段差を有し、前記第2の絶縁膜の表面の位置が、前記外部端子のハンダ接続主面と前記段差の面との二つの面の間に配置されることを特徴とする請求項3に記載の半導体装置。
- 前記第1の絶縁膜で覆われた金属パターンの少なくとも一部が前記グランドパターンに接続されていることを特徴とする請求項1から請求項4までのいずれか1項に記載の半導体装置。
- 請求項1から請求項4のいずれか1項に記載された半導体装置を、ハンダにより接続した実装回路基板を備えたことを特徴とする電子機器。
- 前記実装回路基板と前記半導体装置の外部端子とが、ハンダにより接続された接続部に
おいて、前記外部端子の段差部分の一部もしくは全部が、ハンダで充填されていることを
特徴とする請求項5に記載の電子機器。
Priority Applications (3)
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JP2006018003A JP4907178B2 (ja) | 2006-01-26 | 2006-01-26 | 半導体装置およびそれを備えた電子機器 |
CNA2006101416448A CN101009270A (zh) | 2006-01-26 | 2006-10-09 | 半导体装置、电子设备及半导体装置用衬底的制造方法 |
US11/584,518 US7719119B2 (en) | 2006-01-26 | 2006-10-23 | Semiconductor device, electronic apparatus comprising the same, and method for fabrication of substrate for semiconductor device used therein |
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JP2006018003A JP4907178B2 (ja) | 2006-01-26 | 2006-01-26 | 半導体装置およびそれを備えた電子機器 |
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JP2007201175A JP2007201175A (ja) | 2007-08-09 |
JP4907178B2 true JP4907178B2 (ja) | 2012-03-28 |
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US (1) | US7719119B2 (ja) |
JP (1) | JP4907178B2 (ja) |
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JP4991637B2 (ja) * | 2008-06-12 | 2012-08-01 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP5239779B2 (ja) * | 2008-11-25 | 2013-07-17 | セイコーエプソン株式会社 | 電子部品用のパッケージ本体、及び振動子 |
JP5339968B2 (ja) * | 2009-03-04 | 2013-11-13 | パナソニック株式会社 | 実装構造体及びモータ |
KR101633398B1 (ko) * | 2010-02-16 | 2016-06-24 | 삼성전자주식회사 | 랜드와 솔더 레지스트의 단차를 감소할 수 있는 랜드 그리드 어레이 패키지. |
JP5273073B2 (ja) * | 2010-03-15 | 2013-08-28 | オムロン株式会社 | 電極構造及び当該電極構造を備えたマイクロデバイス用パッケージ |
JP6370652B2 (ja) * | 2014-09-16 | 2018-08-08 | 東芝メモリ株式会社 | 半導体装置 |
KR102117477B1 (ko) * | 2015-04-23 | 2020-06-01 | 삼성전기주식회사 | 반도체 패키지 및 반도체 패키지의 제조방법 |
US10201087B2 (en) * | 2017-03-30 | 2019-02-05 | Infineon Technologies Austria Ag | Discrete device |
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JP3026450B2 (ja) | 1990-07-31 | 2000-03-27 | 株式会社東芝 | 紙葉類搬送装置 |
JPH07114315B2 (ja) | 1992-05-22 | 1995-12-06 | 富士機工電子株式会社 | 狭ピッチ電極をもつ電子部品の実装用プリント基板 |
JP4616968B2 (ja) * | 2000-06-05 | 2011-01-19 | 新日本無線株式会社 | インターポーザを使用した高周波用半導体装置 |
JP2002009194A (ja) * | 2000-06-26 | 2002-01-11 | Kyocera Corp | 半導体素子搭載用基板 |
JP2003007922A (ja) * | 2001-06-19 | 2003-01-10 | Sanyo Electric Co Ltd | 回路装置の製造方法 |
JP4044769B2 (ja) * | 2002-02-22 | 2008-02-06 | 富士通株式会社 | 半導体装置用基板及びその製造方法及び半導体パッケージ |
JP2004055978A (ja) * | 2002-07-23 | 2004-02-19 | Ngk Spark Plug Co Ltd | 配線基板、配線基板と中継基板との接続体 |
JP2005032931A (ja) | 2003-07-10 | 2005-02-03 | Toshiba Corp | 回路基板、回路基板の製造方法及び電子回路装置 |
JP4141403B2 (ja) * | 2004-04-01 | 2008-08-27 | 富士通株式会社 | 半導体装置及び半導体装置の製造方法 |
JP4404684B2 (ja) * | 2004-04-27 | 2010-01-27 | 京セラ株式会社 | 配線基板 |
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US20070170578A1 (en) | 2007-07-26 |
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US7719119B2 (en) | 2010-05-18 |
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