JP4860231B2 - メモリシステム、半導体メモリ装置、及びこのシステムと装置の出力データストローブ信号発生方法 - Google Patents

メモリシステム、半導体メモリ装置、及びこのシステムと装置の出力データストローブ信号発生方法 Download PDF

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JP4860231B2
JP4860231B2 JP2005304593A JP2005304593A JP4860231B2 JP 4860231 B2 JP4860231 B2 JP 4860231B2 JP 2005304593 A JP2005304593 A JP 2005304593A JP 2005304593 A JP2005304593 A JP 2005304593A JP 4860231 B2 JP4860231 B2 JP 4860231B2
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signal
semiconductor memory
preamble
read
cycles
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JP2006120307A5 (enExample
JP2006120307A (ja
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朴光一
張星珍
宋鎬永
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Samsung Electronics Co Ltd
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066Output synchronization
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2254Calibration

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JP2005304593A 2004-10-19 2005-10-19 メモリシステム、半導体メモリ装置、及びこのシステムと装置の出力データストローブ信号発生方法 Expired - Fee Related JP4860231B2 (ja)

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KR1020040083745A KR100568546B1 (ko) 2004-10-19 2004-10-19 메모리 시스템, 반도체 메모리 장치, 및 이 시스템과장치의 출력 데이터 스트로우브 신호 발생 방법
KR10-2004-0083745 2004-10-19

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JP2006120307A JP2006120307A (ja) 2006-05-11
JP2006120307A5 JP2006120307A5 (enExample) 2008-12-04
JP4860231B2 true JP4860231B2 (ja) 2012-01-25

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US (3) US7362648B2 (enExample)
JP (1) JP4860231B2 (enExample)
KR (1) KR100568546B1 (enExample)
CN (1) CN100405327C (enExample)
DE (1) DE102005051206B4 (enExample)
TW (1) TWI291701B (enExample)

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CN103312302B (zh) * 2013-06-24 2016-02-03 浙江禾川科技股份有限公司 单主站多从站结构的通信系统和多路扫描选通信号发生器
CN109343794B (zh) * 2018-09-12 2021-11-09 杭州晨晓科技股份有限公司 一种存储器的配置方法及配置装置
KR102787562B1 (ko) * 2019-11-21 2025-03-31 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법
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Also Published As

Publication number Publication date
KR100568546B1 (ko) 2006-04-07
US8004911B2 (en) 2011-08-23
CN100405327C (zh) 2008-07-23
DE102005051206B4 (de) 2009-08-27
CN1783028A (zh) 2006-06-07
TWI291701B (en) 2007-12-21
DE102005051206A1 (de) 2006-04-27
US20100284231A1 (en) 2010-11-11
US20080144406A1 (en) 2008-06-19
US7362648B2 (en) 2008-04-22
JP2006120307A (ja) 2006-05-11
US20060083081A1 (en) 2006-04-20
TW200625334A (en) 2006-07-16
US7733715B2 (en) 2010-06-08

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