JP4852319B2 - 回路基板及び半導体装置 - Google Patents
回路基板及び半導体装置 Download PDFInfo
- Publication number
- JP4852319B2 JP4852319B2 JP2006044135A JP2006044135A JP4852319B2 JP 4852319 B2 JP4852319 B2 JP 4852319B2 JP 2006044135 A JP2006044135 A JP 2006044135A JP 2006044135 A JP2006044135 A JP 2006044135A JP 4852319 B2 JP4852319 B2 JP 4852319B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- semiconductor chip
- bonding pad
- bonding
- solder resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
11 回路基板
111 ボンディングパッド
1111 第1の領域
1112 第2の領域
113 貫通孔
114 裏面電極
115 ダイパッド
116 インデックスマーク
117 ソルダーレジスト
1171 第1のソルダーレジスト
1172 第2のソルダーレジスト
12 半導体チップ
121 電極パッド
13 DAF
15 半導体基板
20 ボンディングワイヤー
Claims (10)
- 半導体チップが搭載される回路基板であって、
当該回路基板の端面に開口し当該回路基板を貫通して形成される複数の貫通孔と、
前記各貫通孔を塞ぐように前記端面に沿って前記各貫通孔が形成されている部分に形成され、前記半導体チップの電極と電気的に接続するためのボンディングパッドと、
前記ボンディングパッドの表面の前記貫通孔が形成されている部分に形成される第1のソルダーレジストと、
前記半導体チップの電極と、前記ボンディングパッドにおける前記第1のソルダーレジストが形成されていない部分とを接合するボンディングワイヤーと、を備えたこと
を特徴とする回路基板。 - 請求項1に記載の回路基板であって、
前記ボンディングパッドは、前記半導体チップが搭載される領域の周囲に設けられ、前記貫通孔を塞ぐように設けられた第1の領域と、当該回路基板の端面に接することなく前記半導体チップの外形に沿って延出する、前記第1の領域に連続する第2の領域とを有すること、
を特徴とする回路基板。 - 請求項1に記載の回路基板であって、
前記貫通孔によって、前記ボンディングパッドと、前記回路基板の前記ボンディングパッドが設けられている面とは逆の面に形成されている他の電極とが電気的に接続されていること
を特徴とする回路基板。 - 請求項1乃至3のいずれか一項に記載の回路基板であって、
前記半導体チップが搭載される領域を囲んで環状に第2のソルダーレジストが施されていること、
を特徴とする回路基板。 - 請求項4に記載の回路基板であって、
前記第1のソルダーレジストは、前記第2のソルダーレジストに連続していること
を特徴とする回路基板。 - 半導体チップと、
前記半導体チップが搭載される回路基板と
を含み、
前記回路基板は、
前記回路基板の端面に開口し、当該回路基板を貫通して形成される貫通孔と、
前記各貫通孔を塞ぐように前記端面に沿って前記各貫通孔が形成されている部分に形成され、前記半導体チップの電極と電気的に接続するためのボンディングパッドと、
前記ボンディングパッドの表面の前記貫通孔が形成されている部分に形成される第1のソルダーレジストと、
前記半導体チップの電極と、前記ボンディングパッドにおける前記第1のソルダーレジストが形成されていない部分とを接合するボンディングワイヤーと、を有すること
を特徴とする半導体装置。 - 請求項6に記載の半導体装置であって、
前記ボンディングパッドは、前記半導体チップが搭載される領域の周囲に設けられ、前記貫通孔を塞ぐように設けられた第1の領域と、当該回路基板の端面に接することなく前記半導体チップの外形に沿って延出する、前記第1の領域に連続する第2の領域とを有すること、
を特徴とする半導体装置。 - 請求項6に記載の半導体装置であって、
前記貫通孔によって、前記ボンディングパッドと、前記回路基板の前記ボンディングパッドが設けられている面とは逆の面に形成されている他の電極とが電気的に接続されていること
を特徴とする半導体装置。 - 請求項6乃至8のいずれか一項に記載の半導体装置であって、
前記回路基板には、前記半導体チップが搭載される領域を囲んで環状に第2のソルダーレジストが施されていること、
を特徴とする半導体装置。 - 請求項9に記載の半導体装置であって、
前記第1のソルダーレジストは、前記第2のソルダーレジストに連続していること
を特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006044135A JP4852319B2 (ja) | 2006-02-21 | 2006-02-21 | 回路基板及び半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006044135A JP4852319B2 (ja) | 2006-02-21 | 2006-02-21 | 回路基板及び半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007227462A JP2007227462A (ja) | 2007-09-06 |
JP4852319B2 true JP4852319B2 (ja) | 2012-01-11 |
Family
ID=38549015
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006044135A Expired - Fee Related JP4852319B2 (ja) | 2006-02-21 | 2006-02-21 | 回路基板及び半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4852319B2 (ja) |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3507251B2 (ja) * | 1995-09-01 | 2004-03-15 | キヤノン株式会社 | 光センサicパッケージおよびその組立方法 |
JP3311914B2 (ja) * | 1995-12-27 | 2002-08-05 | 株式会社シチズン電子 | チップ型発光ダイオード |
JP3694255B2 (ja) * | 2001-06-19 | 2005-09-14 | 株式会社シチズン電子 | Smd部品の構造および製造方法 |
JP3951185B2 (ja) * | 2003-08-08 | 2007-08-01 | 日立エーアイシー株式会社 | 電子部品 |
JP2005093927A (ja) * | 2003-09-19 | 2005-04-07 | Hamamatsu Photonics Kk | 半導体装置及び半導体装置の製造方法 |
JP2007116046A (ja) * | 2005-10-24 | 2007-05-10 | Rohm Co Ltd | モールド体を備えた電子部品とその製造方法 |
JP4776012B2 (ja) * | 2006-01-27 | 2011-09-21 | オンセミコンダクター・トレーディング・リミテッド | 回路基板及び半導体装置 |
-
2006
- 2006-02-21 JP JP2006044135A patent/JP4852319B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2007227462A (ja) | 2007-09-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100407595B1 (ko) | 반도체 장치 및 그 제조 방법 | |
TWI454199B (zh) | 印刷電路板之製造方法 | |
JP2008016818A (ja) | 半導体装置およびその製造方法 | |
JP6027001B2 (ja) | 放熱回路基板 | |
KR20090056824A (ko) | 배선 기판 및 전자 부품 장치 | |
JP4498378B2 (ja) | 基板およびその製造方法、回路装置およびその製造方法 | |
JP2006019361A (ja) | 回路装置およびその製造方法 | |
JP3869849B2 (ja) | 半導体装置の製造方法 | |
JP2005286057A (ja) | 回路装置およびその製造方法 | |
JP6336298B2 (ja) | 半導体装置 | |
JP4776012B2 (ja) | 回路基板及び半導体装置 | |
JP4852319B2 (ja) | 回路基板及び半導体装置 | |
JP2008198916A (ja) | 半導体装置及びその製造方法 | |
JP2007250675A (ja) | 回路基板及び半導体装置 | |
JPH07302859A (ja) | 半導体チップ搭載用多層配線基板の製造方法及び半導体チップ搭載装置の製造方法 | |
JP2016192447A (ja) | 半導体装置 | |
US6731511B2 (en) | Wiring board, method of manufacturing the same, electronic component, and electronic instrument | |
JP4605176B2 (ja) | 半導体搭載基板及び半導体パッケージの製造方法並びに半導体パッケージ | |
TW201922069A (zh) | 印刷電路板 | |
JP2010021392A (ja) | 半導体装置及びその製造方法 | |
JP4454422B2 (ja) | リードフレーム | |
JP4549318B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP4605177B2 (ja) | 半導体搭載基板 | |
US20090309208A1 (en) | Semiconductor device and method of manufacturing the same | |
KR100593763B1 (ko) | 회로 장치 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090130 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20090714 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20110531 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110712 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110905 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110927 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20111024 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 4852319 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20141028 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20141028 Year of fee payment: 3 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20141028 Year of fee payment: 3 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |